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-rw-r--r--sys/dev/mii/brgphy.c4
-rw-r--r--sys/dev/pci/if_bge.c85
-rw-r--r--sys/dev/pci/if_bgereg.h8
3 files changed, 41 insertions, 56 deletions
diff --git a/sys/dev/mii/brgphy.c b/sys/dev/mii/brgphy.c
index 197203b8004..9c02c6657c1 100644
--- a/sys/dev/mii/brgphy.c
+++ b/sys/dev/mii/brgphy.c
@@ -1,4 +1,4 @@
-/* $OpenBSD: brgphy.c,v 1.85 2009/05/21 23:04:20 sthen Exp $ */
+/* $OpenBSD: brgphy.c,v 1.86 2009/06/04 00:59:21 naddy Exp $ */
/*
* Copyright (c) 2000
@@ -666,7 +666,7 @@ brgphy_reset(struct mii_softc *sc)
brgphy_crc_bug(sc);
/* Set Jumbo frame settings in the PHY. */
- if (bge_sc->bge_flags & BGE_JUMBO_CAP)
+ if (bge_sc->bge_flags & BGE_JUMBO_CAPABLE)
brgphy_jumbo_settings(sc);
/* Adjust output voltage */
diff --git a/sys/dev/pci/if_bge.c b/sys/dev/pci/if_bge.c
index 06f77d4478a..0668231d164 100644
--- a/sys/dev/pci/if_bge.c
+++ b/sys/dev/pci/if_bge.c
@@ -1,4 +1,4 @@
-/* $OpenBSD: if_bge.c,v 1.269 2009/06/03 20:54:45 naddy Exp $ */
+/* $OpenBSD: if_bge.c,v 1.270 2009/06/04 00:59:21 naddy Exp $ */
/*
* Copyright (c) 2001 Wind River Systems
@@ -295,55 +295,11 @@ const struct pci_matchid bge_devices[] = {
{ PCI_VENDOR_3COM, PCI_PRODUCT_3COM_3C996 }
};
-#define BGE_IS_5705_PLUS(sc) \
- (BGE_ASICREV(sc->bge_chipid) == BGE_ASICREV_BCM5705 || \
- BGE_ASICREV(sc->bge_chipid) == BGE_ASICREV_BCM5750 || \
- BGE_ASICREV(sc->bge_chipid) == BGE_ASICREV_BCM5714_A0 || \
- BGE_ASICREV(sc->bge_chipid) == BGE_ASICREV_BCM5780 || \
- BGE_ASICREV(sc->bge_chipid) == BGE_ASICREV_BCM5714 || \
- BGE_ASICREV(sc->bge_chipid) == BGE_ASICREV_BCM5752 || \
- BGE_ASICREV(sc->bge_chipid) == BGE_ASICREV_BCM5755 || \
- BGE_ASICREV(sc->bge_chipid) == BGE_ASICREV_BCM5761 || \
- BGE_ASICREV(sc->bge_chipid) == BGE_ASICREV_BCM5784 || \
- BGE_ASICREV(sc->bge_chipid) == BGE_ASICREV_BCM5785 || \
- BGE_ASICREV(sc->bge_chipid) == BGE_ASICREV_BCM5787 || \
- BGE_ASICREV(sc->bge_chipid) == BGE_ASICREV_BCM5906 || \
- BGE_ASICREV(sc->bge_chipid) == BGE_ASICREV_BCM57780)
-
-#define BGE_IS_5750_PLUS(sc) \
- (BGE_ASICREV(sc->bge_chipid) == BGE_ASICREV_BCM5750 || \
- BGE_ASICREV(sc->bge_chipid) == BGE_ASICREV_BCM5714_A0 || \
- BGE_ASICREV(sc->bge_chipid) == BGE_ASICREV_BCM5780 || \
- BGE_ASICREV(sc->bge_chipid) == BGE_ASICREV_BCM5714 || \
- BGE_ASICREV(sc->bge_chipid) == BGE_ASICREV_BCM5752 || \
- BGE_ASICREV(sc->bge_chipid) == BGE_ASICREV_BCM5755 || \
- BGE_ASICREV(sc->bge_chipid) == BGE_ASICREV_BCM5761 || \
- BGE_ASICREV(sc->bge_chipid) == BGE_ASICREV_BCM5784 || \
- BGE_ASICREV(sc->bge_chipid) == BGE_ASICREV_BCM5785 || \
- BGE_ASICREV(sc->bge_chipid) == BGE_ASICREV_BCM5787 || \
- BGE_ASICREV(sc->bge_chipid) == BGE_ASICREV_BCM5906 || \
- BGE_ASICREV(sc->bge_chipid) == BGE_ASICREV_BCM57780)
-
-/* Intentionally exlcude BGE_ASICREV_BCM5906 */
-#define BGE_IS_5755_PLUS(sc) \
- (BGE_ASICREV(sc->bge_chipid) == BGE_ASICREV_BCM5755 || \
- BGE_ASICREV(sc->bge_chipid) == BGE_ASICREV_BCM5761 || \
- BGE_ASICREV(sc->bge_chipid) == BGE_ASICREV_BCM5784 || \
- BGE_ASICREV(sc->bge_chipid) == BGE_ASICREV_BCM5785 || \
- BGE_ASICREV(sc->bge_chipid) == BGE_ASICREV_BCM5787 || \
- BGE_ASICREV(sc->bge_chipid) == BGE_ASICREV_BCM57780)
-
-#define BGE_IS_5714_FAMILY(sc) \
- (BGE_ASICREV(sc->bge_chipid) == BGE_ASICREV_BCM5714_A0 || \
- BGE_ASICREV(sc->bge_chipid) == BGE_ASICREV_BCM5780 || \
- BGE_ASICREV(sc->bge_chipid) == BGE_ASICREV_BCM5714)
-
-#define BGE_IS_JUMBO_CAPABLE(sc) \
- (BGE_ASICREV(sc->bge_chipid) == BGE_ASICREV_BCM5700 || \
- BGE_ASICREV(sc->bge_chipid) == BGE_ASICREV_BCM5701 || \
- BGE_ASICREV(sc->bge_chipid) == BGE_ASICREV_BCM5703 || \
- BGE_ASICREV(sc->bge_chipid) == BGE_ASICREV_BCM5704)
-
+#define BGE_IS_5705_PLUS(sc) ((sc)->bge_flags & BGE_5705_PLUS)
+#define BGE_IS_5750_PLUS(sc) ((sc)->bge_flags & BGE_5750_PLUS)
+#define BGE_IS_5755_PLUS(sc) ((sc)->bge_flags & BGE_5755_PLUS)
+#define BGE_IS_5714_FAMILY(sc) ((sc)->bge_flags & BGE_5714_FAMILY)
+#define BGE_IS_JUMBO_CAPABLE(sc) ((sc)->bge_flags & BGE_JUMBO_CAPABLE)
static const struct bge_revision {
u_int32_t br_chipid;
@@ -1908,6 +1864,31 @@ bge_attach(struct device *parent, struct device *self, void *aux)
sc->bge_flags |= BGE_NO_EEPROM;
#endif
+ if (BGE_ASICREV(sc->bge_chipid) == BGE_ASICREV_BCM5714_A0 ||
+ BGE_ASICREV(sc->bge_chipid) == BGE_ASICREV_BCM5780 ||
+ BGE_ASICREV(sc->bge_chipid) == BGE_ASICREV_BCM5714)
+ sc->bge_flags |= BGE_5714_FAMILY;
+
+ /* Intentionally exclude BGE_ASICREV_BCM5906 */
+ if (BGE_ASICREV(sc->bge_chipid) == BGE_ASICREV_BCM5755 ||
+ BGE_ASICREV(sc->bge_chipid) == BGE_ASICREV_BCM5761 ||
+ BGE_ASICREV(sc->bge_chipid) == BGE_ASICREV_BCM5784 ||
+ BGE_ASICREV(sc->bge_chipid) == BGE_ASICREV_BCM5785 ||
+ BGE_ASICREV(sc->bge_chipid) == BGE_ASICREV_BCM5787 ||
+ BGE_ASICREV(sc->bge_chipid) == BGE_ASICREV_BCM57780)
+ sc->bge_flags |= BGE_5755_PLUS;
+
+ if (BGE_ASICREV(sc->bge_chipid) == BGE_ASICREV_BCM5750 ||
+ BGE_ASICREV(sc->bge_chipid) == BGE_ASICREV_BCM5752 ||
+ BGE_ASICREV(sc->bge_chipid) == BGE_ASICREV_BCM5906 ||
+ BGE_IS_5755_PLUS(sc) ||
+ BGE_IS_5714_FAMILY(sc))
+ sc->bge_flags |= BGE_5750_PLUS;
+
+ if (BGE_ASICREV(sc->bge_chipid) == BGE_ASICREV_BCM5705 ||
+ BGE_IS_5750_PLUS(sc))
+ sc->bge_flags |= BGE_5705_PLUS;
+
/*
* When using the BCM5701 in PCI-X mode, data corruption has
* been observed in the first few bytes of some received packets.
@@ -1920,8 +1901,8 @@ bge_attach(struct device *parent, struct device *self, void *aux)
sc->bge_flags & BGE_PCIX)
sc->bge_flags |= BGE_RX_ALIGNBUG;
- if (BGE_IS_JUMBO_CAPABLE(sc))
- sc->bge_flags |= BGE_JUMBO_CAP;
+ if (!(BGE_IS_5705_PLUS(sc)))
+ sc->bge_flags |= BGE_JUMBO_CAPABLE;
if ((BGE_ASICREV(sc->bge_chipid) == BGE_ASICREV_BCM5700 ||
BGE_ASICREV(sc->bge_chipid) == BGE_ASICREV_BCM5701) &&
diff --git a/sys/dev/pci/if_bgereg.h b/sys/dev/pci/if_bgereg.h
index 7f19cf2c521..4948caf1df5 100644
--- a/sys/dev/pci/if_bgereg.h
+++ b/sys/dev/pci/if_bgereg.h
@@ -1,4 +1,4 @@
-/* $OpenBSD: if_bgereg.h,v 1.94 2009/06/03 05:19:21 naddy Exp $ */
+/* $OpenBSD: if_bgereg.h,v 1.95 2009/06/04 00:59:21 naddy Exp $ */
/*
* Copyright (c) 2001 Wind River Systems
@@ -2455,7 +2455,7 @@ struct bge_softc {
#define BGE_PCIE 0x00000040
#define BGE_ASF_MODE 0x00000080
#define BGE_NO_EEPROM 0x00000100
-#define BGE_JUMBO_CAP 0x00000200
+#define BGE_JUMBO_CAPABLE 0x00000200
#define BGE_10_100_ONLY 0x00000400
#define BGE_PHY_FIBER_TBI 0x00000800
#define BGE_PHY_FIBER_MII 0x00001000
@@ -2467,6 +2467,10 @@ struct bge_softc {
#define BGE_PHY_ADJUST_TRIM 0x00040000
#define BGE_NO_ETH_WIRE_SPEED 0x00080000
#define BGE_IS_5788 0x00100000
+#define BGE_5705_PLUS 0x00200000
+#define BGE_5750_PLUS 0x00400000
+#define BGE_5755_PLUS 0x00800000
+#define BGE_5714_FAMILY 0x01000000
bus_dma_tag_t bge_dmatag;
u_int32_t bge_chipid;