diff options
Diffstat (limited to 'sys/dev')
43 files changed, 122 insertions, 122 deletions
diff --git a/sys/dev/fdt/dwpcie.c b/sys/dev/fdt/dwpcie.c index 13b3d455bda..ebcf6749f4f 100644 --- a/sys/dev/fdt/dwpcie.c +++ b/sys/dev/fdt/dwpcie.c @@ -1,4 +1,4 @@ -/* $OpenBSD: dwpcie.c,v 1.56 2024/07/09 08:47:10 kettenis Exp $ */ +/* $OpenBSD: dwpcie.c,v 1.57 2024/09/01 03:08:56 jsg Exp $ */ /* * Copyright (c) 2018 Mark Kettenis <kettenis@openbsd.org> * @@ -739,9 +739,9 @@ dwpcie_attach_deferred(struct device *self) pba.pba_flags |= PCI_FLAGS_MSI_ENABLED; /* - * Only support mutiple MSI vectors if we have enough MSI + * Only support multiple MSI vectors if we have enough MSI * interrupts (or are using an external interrupt controller - * that hopefully suppors plenty of MSI interripts). + * that hopefully supports plenty of MSI interrupts). */ if (OF_getproplen(sc->sc_node, "msi-map") > 0 || sc->sc_num_msi > 32) diff --git a/sys/dev/fdt/imxehci.c b/sys/dev/fdt/imxehci.c index effa9f9a551..1bc34406dca 100644 --- a/sys/dev/fdt/imxehci.c +++ b/sys/dev/fdt/imxehci.c @@ -1,4 +1,4 @@ -/* $OpenBSD: imxehci.c,v 1.6 2022/04/06 18:59:28 naddy Exp $ */ +/* $OpenBSD: imxehci.c,v 1.7 2024/09/01 03:08:56 jsg Exp $ */ /* * Copyright (c) 2012-2013 Patrick Wildt <patrick@blueri.se> * @@ -361,7 +361,7 @@ imx23_usb_init(struct imxehci_softc *sc, uint32_t *cells) anatop, sizeof(anatop)) == sizeof(anatop)) rm = regmap_byphandle(anatop[0]); - /* Disable the carger detection, else signal on DP will be poor */ + /* Disable the charger detection, else signal on DP will be poor */ switch (sc->sc_unit) { case 0: if (rm != NULL) diff --git a/sys/dev/hid/hidkbd.c b/sys/dev/hid/hidkbd.c index cf1c03b6579..d4a3c432bd7 100644 --- a/sys/dev/hid/hidkbd.c +++ b/sys/dev/hid/hidkbd.c @@ -1,4 +1,4 @@ -/* $OpenBSD: hidkbd.c,v 1.13 2024/07/02 05:50:02 gkoehler Exp $ */ +/* $OpenBSD: hidkbd.c,v 1.14 2024/09/01 03:08:56 jsg Exp $ */ /* $NetBSD: ukbd.c,v 1.85 2003/03/11 16:44:00 augustss Exp $ */ /* @@ -147,7 +147,7 @@ static const struct hidkbd_translation apple_fn_trans[] = { { 67, 235 }, /* F10 -> backlight raise */ { 39, 84 }, /* keypad divide */ { 19, 85 }, /* keypad multiply */ - { 51, 86 }, /* keypad substract */ + { 51, 86 }, /* keypad subtract */ { 56, 87 }, /* keypad add */ { 13, 89 }, /* keypad 1 */ { 14, 90 }, /* keypad 2 */ diff --git a/sys/dev/ic/aac.c b/sys/dev/ic/aac.c index fbbac2b070a..4abaf52fa1e 100644 --- a/sys/dev/ic/aac.c +++ b/sys/dev/ic/aac.c @@ -1,4 +1,4 @@ -/* $OpenBSD: aac.c,v 1.96 2023/09/11 12:10:47 mvs Exp $ */ +/* $OpenBSD: aac.c,v 1.97 2024/09/01 03:08:56 jsg Exp $ */ /*- * Copyright (c) 2000 Michael Smith @@ -2677,7 +2677,7 @@ aac_print_aif(struct aac_softc *sc, struct aac_aif_command *aif) break; case AifJobFsVerify: /* File System Verify operation */ - printf("\t(FsVerivy)\n"); + printf("\t(FsVerify)\n"); break; case AifJobFsExtend: /* File System Extend operation */ diff --git a/sys/dev/ic/acx111.c b/sys/dev/ic/acx111.c index 2826b4431a4..33b94486423 100644 --- a/sys/dev/ic/acx111.c +++ b/sys/dev/ic/acx111.c @@ -1,4 +1,4 @@ -/* $OpenBSD: acx111.c,v 1.24 2022/01/09 05:42:38 jsg Exp $ */ +/* $OpenBSD: acx111.c,v 1.25 2024/09/01 03:08:56 jsg Exp $ */ /* * Copyright (c) 2006 Jonathan Gray <jsg@openbsd.org> @@ -80,7 +80,7 @@ #define ACX111_INTR_ENABLE (ACXRV_INTR_TX_FINI | ACXRV_INTR_RX_FINI) /* - * XXX do we really care about fowlling interrupts? + * XXX do we really care about the following interrupts? * * ACXRV_INTR_IV_ICV_FAILURE | ACXRV_INTR_INFO | * ACXRV_INTR_SCAN_FINI | ACXRV_INTR_FCS_THRESHOLD diff --git a/sys/dev/ic/aic79xx.c b/sys/dev/ic/aic79xx.c index c61152696f8..6ad091f3aa8 100644 --- a/sys/dev/ic/aic79xx.c +++ b/sys/dev/ic/aic79xx.c @@ -1,4 +1,4 @@ -/* $OpenBSD: aic79xx.c,v 1.67 2022/01/09 05:42:38 jsg Exp $ */ +/* $OpenBSD: aic79xx.c,v 1.68 2024/09/01 03:08:56 jsg Exp $ */ /* * Copyright (c) 2004 Milos Urbanek, Kenneth R. Westerback & Marco Peereboom @@ -2060,7 +2060,7 @@ ahd_handle_pkt_busfree(struct ahd_softc *ahd, u_int busfreetime) * SCB that encountered the failure. Clean * up the queue, clear SELDO and LQOBUSFREE, * and allow the sequencer to restart the select - * out at its lesure. + * out at its leisure. */ ahd_set_modes(ahd, AHD_MODE_SCSI, AHD_MODE_SCSI); scbid = ahd_inw(ahd, CURRSCB); diff --git a/sys/dev/ic/aic79xx.h b/sys/dev/ic/aic79xx.h index 291aef605be..250ac9f15cf 100644 --- a/sys/dev/ic/aic79xx.h +++ b/sys/dev/ic/aic79xx.h @@ -1,4 +1,4 @@ -/* $OpenBSD: aic79xx.h,v 1.31 2024/05/29 00:48:15 jsg Exp $ */ +/* $OpenBSD: aic79xx.h,v 1.32 2024/09/01 03:08:56 jsg Exp $ */ /* * Copyright (c) 2004 Milos Urbanek, Kenneth R. Westerback & Marco Peereboom @@ -409,7 +409,7 @@ typedef enum { */ /* - * Status information embedded in the shared poriton of + * Status information embedded in the shared portion of * an SCB after passing the cdb to the target. The kernel * driver will only read this data for transactions that * complete abnormally. diff --git a/sys/dev/ic/aic7xxx_seeprom.c b/sys/dev/ic/aic7xxx_seeprom.c index 832f98b406b..aac6460f1d3 100644 --- a/sys/dev/ic/aic7xxx_seeprom.c +++ b/sys/dev/ic/aic7xxx_seeprom.c @@ -1,4 +1,4 @@ -/* $OpenBSD: aic7xxx_seeprom.c,v 1.9 2021/03/07 06:21:38 jsg Exp $ */ +/* $OpenBSD: aic7xxx_seeprom.c,v 1.10 2024/09/01 03:08:56 jsg Exp $ */ /* $NetBSD: aic7xxx_seeprom.c,v 1.8 2003/05/02 19:12:19 dyoung Exp $ */ /* @@ -47,7 +47,7 @@ * from the FreeBSD source file aic7xxx_pci.c by Frank van der Linden * <fvdl@netbsd.org> * - * $Id: aic7xxx_seeprom.c,v 1.9 2021/03/07 06:21:38 jsg Exp $ + * $Id: aic7xxx_seeprom.c,v 1.10 2024/09/01 03:08:56 jsg Exp $ * * $FreeBSD: src/sys/dev/aic7xxx/aic7xxx_pci.c,v 1.22 2003/01/20 20:44:55 gibbs Exp $ */ @@ -88,7 +88,7 @@ static void ahc_parse_pci_eeprom(struct ahc_softc *, struct seeprom_config *); /* * Check the external port logic for a serial eeprom - * and termination/cable detection contrls. + * and termination/cable detection controls. */ void ahc_check_extport(struct ahc_softc *ahc, u_int *sxfrctl1) diff --git a/sys/dev/ic/am79900reg.h b/sys/dev/ic/am79900reg.h index 947159aaccd..4ec7a9c31c2 100644 --- a/sys/dev/ic/am79900reg.h +++ b/sys/dev/ic/am79900reg.h @@ -1,4 +1,4 @@ -/* $OpenBSD: am79900reg.h,v 1.2 2008/06/26 05:42:15 ray Exp $ */ +/* $OpenBSD: am79900reg.h,v 1.3 2024/09/01 03:08:56 jsg Exp $ */ /* $NetBSD: am79900reg.h,v 1.7 2005/02/27 00:27:00 perry Exp $ */ /*- @@ -131,7 +131,7 @@ struct leinit { /* Transmit message descriptor 3 (tmd3) */ #define LE_T2_BUFF (1<<31) /* buffer error */ #define LE_T2_UFLO (1<<30) /* underflow error */ -#define LE_T2_EXDEF (1<<29) /* excessive defferral */ +#define LE_T2_EXDEF (1<<29) /* excessive deferral */ #define LE_T2_LCOL (1<<28) /* late collision */ #define LE_T2_LCAR (1<<27) /* loss of carrier */ #define LE_T2_RTRY (1<<26) /* retry error */ diff --git a/sys/dev/ic/bt485.c b/sys/dev/ic/bt485.c index 263742f45cd..d56e08053f4 100644 --- a/sys/dev/ic/bt485.c +++ b/sys/dev/ic/bt485.c @@ -1,4 +1,4 @@ -/* $OpenBSD: bt485.c,v 1.14 2014/07/08 17:19:25 deraadt Exp $ */ +/* $OpenBSD: bt485.c,v 1.15 2024/09/01 03:08:56 jsg Exp $ */ /* $NetBSD: bt485.c,v 1.2 2000/04/02 18:55:01 nathanw Exp $ */ /* @@ -210,7 +210,7 @@ bt485_init(rc) regval |= 0x02; data->ramdac_wr(data->cookie, BT485_REG_COMMAND_0, regval); - /* Set the RAMDAC to 8BPP (no interestion options). */ + /* Set the RAMDAC to 8BPP (no interesting options). */ data->ramdac_wr(data->cookie, BT485_REG_COMMAND_1, 0x40); /* Disable the cursor (for now) */ diff --git a/sys/dev/ic/ccp.c b/sys/dev/ic/ccp.c index 5981ae43450..0625b905a24 100644 --- a/sys/dev/ic/ccp.c +++ b/sys/dev/ic/ccp.c @@ -1,4 +1,4 @@ -/* $OpenBSD: ccp.c,v 1.6 2024/08/13 20:48:00 bluhm Exp $ */ +/* $OpenBSD: ccp.c,v 1.7 2024/09/01 03:08:56 jsg Exp $ */ /* * Copyright (c) 2018 David Gwynne <dlg@openbsd.org> @@ -129,7 +129,7 @@ psp_attach(struct ccp_softc *sc) /* * create and map Trusted Memory Region (TMR); size 1 Mbyte, - * needs to be aligend to 1 Mbyte. + * needs to be aligned to 1 Mbyte. */ sc->sc_tmr_size = size = PSP_TMR_SIZE; if (bus_dmamap_create(sc->sc_dmat, size, 1, size, 0, @@ -646,7 +646,7 @@ pspioctl(dev_t dev, u_long cmd, caddr_t data, int flag, struct proc *p) psp_snp_get_pstatus((struct psp_snp_platform_status *)data); break; default: - printf("%s: unkown ioctl code 0x%lx\n", __func__, cmd); + printf("%s: unknown ioctl code 0x%lx\n", __func__, cmd); ret = ENOTTY; } diff --git a/sys/dev/ic/cyreg.h b/sys/dev/ic/cyreg.h index 9a4263604c5..4028007c37c 100644 --- a/sys/dev/ic/cyreg.h +++ b/sys/dev/ic/cyreg.h @@ -1,4 +1,4 @@ -/* $OpenBSD: cyreg.h,v 1.8 2002/09/14 15:00:02 art Exp $ */ +/* $OpenBSD: cyreg.h,v 1.9 2024/09/01 03:08:56 jsg Exp $ */ /* $FreeBSD: cyreg.h,v 1.1 1995/07/05 12:15:51 bde Exp $ */ /*- @@ -45,7 +45,7 @@ #define CY8_SVCACKT 0x200 #define CY8_SVCACKM 0x300 -/* twice this in PCI mode (shifed BUSTYPE bits left) */ +/* twice this in PCI mode (shifted BUSTYPE bits left) */ #define CY_CD1400_MEMSPACING 0x400 /* adjustment value for accessing the last 4 cd1400s on Cyclom-32 */ diff --git a/sys/dev/ic/gdtvar.h b/sys/dev/ic/gdtvar.h index fce26c7c9ce..f907447bd4f 100644 --- a/sys/dev/ic/gdtvar.h +++ b/sys/dev/ic/gdtvar.h @@ -1,4 +1,4 @@ -/* $OpenBSD: gdtvar.h,v 1.26 2021/08/30 14:44:39 jasper Exp $ */ +/* $OpenBSD: gdtvar.h,v 1.27 2024/09/01 03:08:56 jsg Exp $ */ /* * Copyright (c) 1999, 2000 Niklas Hallqvist. All rights reserved. @@ -66,7 +66,7 @@ struct gdt_intr_ctx { }; /* - * A command contol block, one for each corresponding command index of the + * A command control block, one for each corresponding command index of the * controller. */ struct gdt_ccb { diff --git a/sys/dev/ic/ics2101reg.h b/sys/dev/ic/ics2101reg.h index 7ccc3b3a76a..d2adf6d4f87 100644 --- a/sys/dev/ic/ics2101reg.h +++ b/sys/dev/ic/ics2101reg.h @@ -1,4 +1,4 @@ -/* $OpenBSD: ics2101reg.h,v 1.3 2008/06/26 05:42:15 ray Exp $ */ +/* $OpenBSD: ics2101reg.h,v 1.4 2024/09/01 03:08:56 jsg Exp $ */ /* $NetBSD: ics2101reg.h,v 1.3 1996/02/05 02:18:52 jtc Exp $ */ /*- @@ -61,7 +61,7 @@ #define ICSMIX_CTRL_LEFT 0x00 /* Control left channel */ #define ICSMIX_CTRL_RIGHT 0x01 /* Control right channel */ #define ICSMIX_ATTN_LEFT 0x02 /* Attenuate left channel */ -#define ICSMIX_ATTN_RIGHT 0x03 /* Attenutate right channel */ +#define ICSMIX_ATTN_RIGHT 0x03 /* Attenuate right channel */ #define ICSMIX_PAEN 0x04 /* Panning control */ #define ICSMIX_CHAN_0 0 /* Values for mixer channels */ #define ICSMIX_CHAN_1 1 diff --git a/sys/dev/ic/mtd8xxreg.h b/sys/dev/ic/mtd8xxreg.h index f1a18f3990d..efd46258375 100644 --- a/sys/dev/ic/mtd8xxreg.h +++ b/sys/dev/ic/mtd8xxreg.h @@ -1,4 +1,4 @@ -/* $OpenBSD: mtd8xxreg.h,v 1.2 2003/10/21 18:58:49 jmc Exp $ */ +/* $OpenBSD: mtd8xxreg.h,v 1.3 2024/09/01 03:08:56 jsg Exp $ */ /* * Copyright (c) 2003 Oleg Safiullin <form@pdp11.org.ru> @@ -92,7 +92,7 @@ #define TCR_BACKOPT 0x10000000U /* Optional back-off */ #define TCR_FBACK 0x08000000U /* Fast back-off */ #define TCR_ENHANCED 0x02000000U /* Enhanced transmit mode */ -#define TCR_TFCEN 0x01000000U /* Ttansmit flow control enable */ +#define TCR_TFCEN 0x01000000U /* Transmit flow control enable */ #define TCR_TFT64 0x00000000U /* 64 bytes */ #define TCR_TFT32 0x00200000U /* 32 bytes */ #define TCR_TFT128 0x00400000U /* 128 bytes */ @@ -144,7 +144,7 @@ #define ISR_ROVF 0x00000200U /* Receive overflow */ #define ISR_ETI 0x00000100U /* Early transfer interrupt */ #define ISR_ERI 0x00000080U /* Early receive interrupt */ -#define ISR_CNTOVF 0x00000040U /* CRC or MPA tally ounter overflow */ +#define ISR_CNTOVF 0x00000040U /* CRC or MPA tally counter overflow */ #define ISR_RBU 0x00000020U /* Receive buffer unavailable */ #define ISR_TBU 0x00000010U /* Transmit buffer unavailable */ #define ISR_TI 0x00000008U /* Transmit interrupt */ @@ -167,7 +167,7 @@ #define IMR_MROVF 0x00000200U /* Receive overflow */ #define IMR_METI 0x00000100U /* Early transfer interrupt */ #define IMR_MERI 0x00000080U /* Early receive interrupt */ -#define IMR_MCNTOVF 0x00000040U /* CRC or MPA tally ounter overflow */ +#define IMR_MCNTOVF 0x00000040U /* CRC or MPA tally counter overflow */ #define IMR_MRBU 0x00000020U /* Receive buffer unavailable */ #define IMR_MTBU 0x00000010U /* Transmit buffer unavailable */ #define IMR_MTI 0x00000008U /* Transmit interrupt */ diff --git a/sys/dev/ic/nvme.c b/sys/dev/ic/nvme.c index a37f0f74587..7e74d293152 100644 --- a/sys/dev/ic/nvme.c +++ b/sys/dev/ic/nvme.c @@ -1,4 +1,4 @@ -/* $OpenBSD: nvme.c,v 1.121 2024/07/13 08:59:41 dv Exp $ */ +/* $OpenBSD: nvme.c,v 1.122 2024/09/01 03:08:56 jsg Exp $ */ /* * Copyright (c) 2014 David Gwynne <dlg@openbsd.org> @@ -1946,7 +1946,7 @@ nvme_bioctl_inq(struct nvme_softc *sc, struct bioc_inq *bi) nvme_bio_status(bs, "Max i/o %zu bytes%s%s%s, Sanitize 0x%b", sc->sc_mdts, ISSET(idctrl->lpa, NVM_ID_CTRL_LPA_PE) ? - ", Persisent Event Log" : "", + ", Persistent Event Log" : "", ISSET(idctrl->fna, NVM_ID_CTRL_FNA_CRYPTOFORMAT) ? ", CryptoFormat" : "", ISSET(idctrl->vwc, NVM_ID_CTRL_VWC_PRESENT) ? diff --git a/sys/dev/ic/qwx.c b/sys/dev/ic/qwx.c index bd017454ae6..898e15e1fcb 100644 --- a/sys/dev/ic/qwx.c +++ b/sys/dev/ic/qwx.c @@ -1,4 +1,4 @@ -/* $OpenBSD: qwx.c,v 1.66 2024/08/19 08:22:30 jsg Exp $ */ +/* $OpenBSD: qwx.c,v 1.67 2024/09/01 03:08:56 jsg Exp $ */ /* * Copyright 2023 Stefan Sperling <stsp@openbsd.org> @@ -6691,7 +6691,7 @@ qwx_qmi_decode_msg(struct qwx_softc *sc, void *output, size_t output_len, /* Related EIs must have the same type. */ if (ei->tlv_type != elem_type) { - printf("%s: unexepected element type 0x%x; " + printf("%s: unexpected element type 0x%x; " "expected 0x%x\n", __func__, ei->tlv_type, elem_type); return -1; @@ -7471,7 +7471,7 @@ qwx_qrtr_recv_msg(struct qwx_softc *sc, struct mbuf *m) qwx_qrtr_resume_tx(sc); } -// Not needed because we don't implenent QMI as a network service. +// Not needed because we don't implement QMI as a network service. #define qwx_qmi_init_service(sc) (0) #define qwx_qmi_deinit_service(sc) (0) @@ -14261,7 +14261,7 @@ qwx_dp_htt_htc_tx_complete(struct qwx_softc *sc, struct mbuf *m) static inline void qwx_dp_get_mac_addr(uint32_t addr_l32, uint16_t addr_h16, uint8_t *addr) { -#if 0 /* Not needed on OpenBSD? We do swapping in sofware... */ +#if 0 /* Not needed on OpenBSD? We do swapping in software... */ if (IS_ENABLED(CONFIG_CPU_BIG_ENDIAN)) { addr_l32 = swab32(addr_l32); addr_h16 = swab16(addr_h16); @@ -20790,7 +20790,7 @@ qwx_hal_srng_setup(struct qwx_softc *sc, enum hal_ring_type type, memset(srng->ring_base_vaddr, 0, (srng->entry_size * srng->num_entries) << 2); -#if 0 /* Not needed on OpenBSD? We do swapping in sofware... */ +#if 0 /* Not needed on OpenBSD? We do swapping in software... */ /* TODO: Add comments on these swap configurations */ if (IS_ENABLED(CONFIG_CPU_BIG_ENDIAN)) srng->flags |= HAL_SRNG_FLAGS_MSI_SWAP | HAL_SRNG_FLAGS_DATA_TLV_SWAP | @@ -22252,7 +22252,7 @@ qwx_reg_update_chan_list(struct qwx_softc *sc, uint8_t pdev_id) ch->antennamax, ch->phy_mode); ch++; - /* TODO: use quarrter/half rate, cfreq12, dfs_cfreq2 + /* TODO: use quarter/half rate, cfreq12, dfs_cfreq2 * set_agile, reg_class_idx */ } diff --git a/sys/dev/ic/qwxreg.h b/sys/dev/ic/qwxreg.h index 8d98629d563..01c8e827bbd 100644 --- a/sys/dev/ic/qwxreg.h +++ b/sys/dev/ic/qwxreg.h @@ -1,4 +1,4 @@ -/* $OpenBSD: qwxreg.h,v 1.7 2024/02/21 14:40:50 kevlo Exp $ */ +/* $OpenBSD: qwxreg.h,v 1.8 2024/09/01 03:08:56 jsg Exp $ */ /* * Copyright (c) 2021-2022, Qualcomm Innovation Center, Inc. @@ -163,7 +163,7 @@ struct wmi_tlv { * to be communicated separately. * @WMI_HOST_HW_MODE_DBS_SBS: 3 PHYs, with 2 on the same band doing SBS * as in WMI_HW_MODE_SBS, and 3rd on the other band - * @WMI_HOST_HW_MODE_DBS_OR_SBS: Two PHY with one PHY capabale of both 2G and + * @WMI_HOST_HW_MODE_DBS_OR_SBS: Two PHY with one PHY capable of both 2G and * 5G. It can support SBS (5G + 5G) OR DBS (5G + 2G). * @WMI_HOST_HW_MODE_MAX: Max hw_mode_id. Used to indicate invalid mode. */ @@ -2233,9 +2233,9 @@ enum { #define WMI_VDEV_SLOT_TIME_LONG 0x1 /* slot time short */ #define WMI_VDEV_SLOT_TIME_SHORT 0x2 -/* preablbe long */ +/* preamble long */ #define WMI_VDEV_PREAMBLE_LONG 0x1 -/* preablbe short */ +/* preamble short */ #define WMI_VDEV_PREAMBLE_SHORT 0x2 enum wmi_peer_smps_state { @@ -4224,7 +4224,7 @@ enum wmi_vdev_start_resp_status_code { WMI_VDEV_START_RESPONSE_INVALID_REGDOMAIN = 4, }; -/* Regaulatory Rule Flags Passed by FW */ +/* Regulatory Rule Flags Passed by FW */ #define REGULATORY_CHAN_DISABLED BIT(0) #define REGULATORY_CHAN_NO_IR BIT(1) #define REGULATORY_CHAN_RADAR BIT(3) @@ -8273,7 +8273,7 @@ struct hal_reo_cmd_hdr { #define HAL_REO_CMD_FLG_UNBLK_RESOURCE BIT(7) #define HAL_REO_CMD_FLG_UNBLK_CACHE BIT(8) -/* Should be matching with HAL_REO_UPD_RX_QUEUE_INFO0_UPD_* feilds */ +/* Should be matching with HAL_REO_UPD_RX_QUEUE_INFO0_UPD_* fields */ #define HAL_REO_CMD_UPD0_RX_QUEUE_NUM BIT(8) #define HAL_REO_CMD_UPD0_VLD BIT(9) #define HAL_REO_CMD_UPD0_ALDC BIT(10) @@ -8298,7 +8298,7 @@ struct hal_reo_cmd_hdr { #define HAL_REO_CMD_UPD0_PN_VALID BIT(29) #define HAL_REO_CMD_UPD0_PN BIT(30) -/* Should be matching with HAL_REO_UPD_RX_QUEUE_INFO1_* feilds */ +/* Should be matching with HAL_REO_UPD_RX_QUEUE_INFO1_* fields */ #define HAL_REO_CMD_UPD1_VLD BIT(16) #define HAL_REO_CMD_UPD1_ALDC GENMASK(18, 17) #define HAL_REO_CMD_UPD1_DIS_DUP_DETECTION BIT(19) @@ -8314,7 +8314,7 @@ struct hal_reo_cmd_hdr { #define HAL_REO_CMD_UPD1_PN_HANDLE_ENABLE BIT(30) #define HAL_REO_CMD_UPD1_IGNORE_AMPDU_FLG BIT(31) -/* Should be matching with HAL_REO_UPD_RX_QUEUE_INFO2_* feilds */ +/* Should be matching with HAL_REO_UPD_RX_QUEUE_INFO2_* fields */ #define HAL_REO_CMD_UPD2_SVLD BIT(10) #define HAL_REO_CMD_UPD2_SSN GENMASK(22, 11) #define HAL_REO_CMD_UPD2_SEQ_2K_ERR BIT(23) @@ -10677,7 +10677,7 @@ struct rx_attention { * msdu_limit_error * Indicates that the MSDU threshold was exceeded and thus * all the rest of the MSDUs will not be scattered and will not - * be decasulated but will be DMA'ed in RAW format as a single + * be decapsulated but will be DMA'ed in RAW format as a single * MSDU buffer. * * da_is_valid diff --git a/sys/dev/ic/qwz.c b/sys/dev/ic/qwz.c index 061019ef6ce..e8f6b366b21 100644 --- a/sys/dev/ic/qwz.c +++ b/sys/dev/ic/qwz.c @@ -1,4 +1,4 @@ -/* $OpenBSD: qwz.c,v 1.7 2024/08/20 21:24:15 patrick Exp $ */ +/* $OpenBSD: qwz.c,v 1.8 2024/09/01 03:08:56 jsg Exp $ */ /* * Copyright 2023 Stefan Sperling <stsp@openbsd.org> @@ -5589,7 +5589,7 @@ qwz_qmi_decode_msg(struct qwz_softc *sc, void *output, size_t output_len, /* Related EIs must have the same type. */ if (ei->tlv_type != elem_type) { - printf("%s: unexepected element type 0x%x; " + printf("%s: unexpected element type 0x%x; " "expected 0x%x\n", __func__, ei->tlv_type, elem_type); return -1; @@ -6423,7 +6423,7 @@ qwz_qrtr_recv_msg(struct qwz_softc *sc, struct mbuf *m) qwz_qrtr_resume_tx(sc); } -// Not needed because we don't implenent QMI as a network service. +// Not needed because we don't implement QMI as a network service. #define qwz_qmi_init_service(sc) (0) #define qwz_qmi_deinit_service(sc) (0) @@ -13495,7 +13495,7 @@ qwz_dp_htt_htc_tx_complete(struct qwz_softc *sc, struct mbuf *m) static inline void qwz_dp_get_mac_addr(uint32_t addr_l32, uint16_t addr_h16, uint8_t *addr) { -#if 0 /* Not needed on OpenBSD? We do swapping in sofware... */ +#if 0 /* Not needed on OpenBSD? We do swapping in software... */ if (IS_ENABLED(CONFIG_CPU_BIG_ENDIAN)) { addr_l32 = swab32(addr_l32); addr_h16 = swab16(addr_h16); @@ -20034,7 +20034,7 @@ qwz_hal_srng_setup(struct qwz_softc *sc, enum hal_ring_type type, memset(srng->ring_base_vaddr, 0, (srng->entry_size * srng->num_entries) << 2); -#if 0 /* Not needed on OpenBSD? We do swapping in sofware... */ +#if 0 /* Not needed on OpenBSD? We do swapping in software... */ /* TODO: Add comments on these swap configurations */ if (IS_ENABLED(CONFIG_CPU_BIG_ENDIAN)) srng->flags |= HAL_SRNG_FLAGS_MSI_SWAP | HAL_SRNG_FLAGS_DATA_TLV_SWAP | @@ -21466,7 +21466,7 @@ qwz_reg_update_chan_list(struct qwz_softc *sc, uint8_t pdev_id) ch->antennamax, ch->phy_mode); ch++; - /* TODO: use quarrter/half rate, cfreq12, dfs_cfreq2 + /* TODO: use quarter/half rate, cfreq12, dfs_cfreq2 * set_agile, reg_class_idx */ } diff --git a/sys/dev/ic/qwzreg.h b/sys/dev/ic/qwzreg.h index 02050a404a6..0196db342c1 100644 --- a/sys/dev/ic/qwzreg.h +++ b/sys/dev/ic/qwzreg.h @@ -1,4 +1,4 @@ -/* $OpenBSD: qwzreg.h,v 1.4 2024/08/16 00:26:54 patrick Exp $ */ +/* $OpenBSD: qwzreg.h,v 1.5 2024/09/01 03:08:56 jsg Exp $ */ /* * Copyright (c) 2021-2022, Qualcomm Innovation Center, Inc. @@ -159,7 +159,7 @@ struct wmi_tlv { * to be communicated separately. * @WMI_HOST_HW_MODE_DBS_SBS: 3 PHYs, with 2 on the same band doing SBS * as in WMI_HW_MODE_SBS, and 3rd on the other band - * @WMI_HOST_HW_MODE_DBS_OR_SBS: Two PHY with one PHY capabale of both 2G and + * @WMI_HOST_HW_MODE_DBS_OR_SBS: Two PHY with one PHY capable of both 2G and * 5G. It can support SBS (5G + 5G) OR DBS (5G + 2G). * @WMI_HOST_HW_MODE_MAX: Max hw_mode_id. Used to indicate invalid mode. */ @@ -2229,9 +2229,9 @@ enum { #define WMI_VDEV_SLOT_TIME_LONG 0x1 /* slot time short */ #define WMI_VDEV_SLOT_TIME_SHORT 0x2 -/* preablbe long */ +/* preamble long */ #define WMI_VDEV_PREAMBLE_LONG 0x1 -/* preablbe short */ +/* preamble short */ #define WMI_VDEV_PREAMBLE_SHORT 0x2 enum wmi_peer_smps_state { @@ -4220,7 +4220,7 @@ enum wmi_vdev_start_resp_status_code { WMI_VDEV_START_RESPONSE_INVALID_REGDOMAIN = 4, }; -/* Regaulatory Rule Flags Passed by FW */ +/* Regulatory Rule Flags Passed by FW */ #define REGULATORY_CHAN_DISABLED BIT(0) #define REGULATORY_CHAN_NO_IR BIT(1) #define REGULATORY_CHAN_RADAR BIT(3) @@ -8481,7 +8481,7 @@ struct ath12k_hal_reo_dest_ring { * and the MPDU was processed in the following way: * - NO re-order function is needed. * - MPDU delinking is determined by the setting of Entrance - * ring field: SW_excection_mpdu_delink + * ring field: SW_exception_mpdu_delink * - Destination ring selection is based on the setting of * the Entrance ring field SW_exception_destination _ring_valid * @@ -8633,7 +8633,7 @@ struct hal_reo_cmd_hdr { #define HAL_REO_CMD_FLG_UNBLK_RESOURCE BIT(7) #define HAL_REO_CMD_FLG_UNBLK_CACHE BIT(8) -/* Should be matching with HAL_REO_UPD_RX_QUEUE_INFO0_UPD_* feilds */ +/* Should be matching with HAL_REO_UPD_RX_QUEUE_INFO0_UPD_* fields */ #define HAL_REO_CMD_UPD0_RX_QUEUE_NUM BIT(8) #define HAL_REO_CMD_UPD0_VLD BIT(9) #define HAL_REO_CMD_UPD0_ALDC BIT(10) @@ -8658,7 +8658,7 @@ struct hal_reo_cmd_hdr { #define HAL_REO_CMD_UPD0_PN_VALID BIT(29) #define HAL_REO_CMD_UPD0_PN BIT(30) -/* Should be matching with HAL_REO_UPD_RX_QUEUE_INFO1_* feilds */ +/* Should be matching with HAL_REO_UPD_RX_QUEUE_INFO1_* fields */ #define HAL_REO_CMD_UPD1_VLD BIT(16) #define HAL_REO_CMD_UPD1_ALDC GENMASK(18, 17) #define HAL_REO_CMD_UPD1_DIS_DUP_DETECTION BIT(19) @@ -8674,7 +8674,7 @@ struct hal_reo_cmd_hdr { #define HAL_REO_CMD_UPD1_PN_HANDLE_ENABLE BIT(30) #define HAL_REO_CMD_UPD1_IGNORE_AMPDU_FLG BIT(31) -/* Should be matching with HAL_REO_UPD_RX_QUEUE_INFO2_* feilds */ +/* Should be matching with HAL_REO_UPD_RX_QUEUE_INFO2_* fields */ #define HAL_REO_CMD_UPD2_SVLD BIT(10) #define HAL_REO_CMD_UPD2_SSN GENMASK(22, 11) #define HAL_REO_CMD_UPD2_SEQ_2K_ERR BIT(23) @@ -11108,7 +11108,7 @@ struct rx_attention { * msdu_limit_error * Indicates that the MSDU threshold was exceeded and thus * all the rest of the MSDUs will not be scattered and will not - * be decasulated but will be DMA'ed in RAW format as a single + * be decapsulated but will be DMA'ed in RAW format as a single * MSDU buffer. * * da_is_valid diff --git a/sys/dev/ic/siop_common.c b/sys/dev/ic/siop_common.c index acc29c0fe32..545b5b32a01 100644 --- a/sys/dev/ic/siop_common.c +++ b/sys/dev/ic/siop_common.c @@ -1,4 +1,4 @@ -/* $OpenBSD: siop_common.c,v 1.45 2024/04/13 23:44:11 jsg Exp $ */ +/* $OpenBSD: siop_common.c,v 1.46 2024/09/01 03:08:56 jsg Exp $ */ /* $NetBSD: siop_common.c,v 1.37 2005/02/27 00:27:02 perry Exp $ */ /* @@ -784,7 +784,7 @@ siop_sdp(struct siop_common_cmd *siop_cmd, int offset) /* * First let see if we have a resid from a phase mismatch. If so, - * we have to adjst the table at offset to remove transferred data. + * we have to adjust the table at offset to remove transferred data. */ if (siop_cmd->flags & CMDFL_RESID) { siop_cmd->flags &= ~CMDFL_RESID; diff --git a/sys/dev/ic/w83l518d_sdmmc.c b/sys/dev/ic/w83l518d_sdmmc.c index 51d4fdde6a6..439e65893ce 100644 --- a/sys/dev/ic/w83l518d_sdmmc.c +++ b/sys/dev/ic/w83l518d_sdmmc.c @@ -1,4 +1,4 @@ -/* $OpenBSD: w83l518d_sdmmc.c,v 1.5 2020/01/22 03:26:02 cheloha Exp $ */ +/* $OpenBSD: w83l518d_sdmmc.c,v 1.6 2024/09/01 03:08:56 jsg Exp $ */ /* $NetBSD: w83l518d_sdmmc.c,v 1.1 2009/09/30 20:44:50 jmcneill Exp $ */ /* @@ -75,7 +75,7 @@ void wb_sdmmc_card_intr_ack(sdmmc_chipset_handle_t); struct sdmmc_chip_functions wb_sdmmc_chip_functions = { /* host controller reset */ wb_sdmmc_host_reset, - /* host controlle capabilities */ + /* host controller capabilities */ wb_sdmmc_host_ocr, wb_sdmmc_host_maxblklen, /* card detection */ diff --git a/sys/dev/pci/ahd_pci.c b/sys/dev/pci/ahd_pci.c index b6b6affafed..c86d7b396cc 100644 --- a/sys/dev/pci/ahd_pci.c +++ b/sys/dev/pci/ahd_pci.c @@ -1,4 +1,4 @@ -/* $OpenBSD: ahd_pci.c,v 1.29 2022/10/21 17:45:40 kn Exp $ */ +/* $OpenBSD: ahd_pci.c,v 1.30 2024/09/01 03:08:56 jsg Exp $ */ /* * Copyright (c) 2004 Milos Urbanek, Kenneth R. Westerback & Marco Peereboom @@ -649,7 +649,7 @@ fail: /* * Check the external port logic for a serial eeprom - * and termination/cable detection contrls. + * and termination/cable detection controls. */ int ahd_check_extport(struct ahd_softc *ahd) diff --git a/sys/dev/pci/cs4280.c b/sys/dev/pci/cs4280.c index fefe948c358..7d88fe0808a 100644 --- a/sys/dev/pci/cs4280.c +++ b/sys/dev/pci/cs4280.c @@ -1,4 +1,4 @@ -/* $OpenBSD: cs4280.c,v 1.62 2024/08/18 14:42:56 deraadt Exp $ */ +/* $OpenBSD: cs4280.c,v 1.63 2024/09/01 03:08:56 jsg Exp $ */ /* $NetBSD: cs4280.c,v 1.5 2000/06/26 04:56:23 simonb Exp $ */ /* @@ -470,7 +470,7 @@ cs4280_set_dac_rate(struct cs4280_softc *sc, int rate) * playback rate may range from 8000Hz to 48000Hz * * play_phase_increment = floor(rate*65536*1024/48000) - * px = round(rate*65536*1024 - play_phase_incremnt*48000) + * px = round(rate*65536*1024 - play_phase_increment*48000) * py=floor(px/200) * play_sample_rate_correction = px - 200*py * diff --git a/sys/dev/pci/eap.c b/sys/dev/pci/eap.c index 1668b98df8f..ec8673dbfb0 100644 --- a/sys/dev/pci/eap.c +++ b/sys/dev/pci/eap.c @@ -1,4 +1,4 @@ -/* $OpenBSD: eap.c,v 1.65 2024/05/24 06:02:53 jsg Exp $ */ +/* $OpenBSD: eap.c,v 1.66 2024/09/01 03:08:56 jsg Exp $ */ /* $NetBSD: eap.c,v 1.46 2001/09/03 15:07:37 reinoud Exp $ */ /* @@ -521,7 +521,7 @@ eap_attach(struct device *parent, struct device *self, void *aux) * or it locks up. * * We don't know how to program it (no documentation), - * and the linux/oss magic receipe doesn't work (breaks + * and the linux/oss magic recipe doesn't work (breaks * full-duplex, by selecting different play and record * rates). On the other hand, the sample rate converter * can't be disabled (disabling it would disable DMA), diff --git a/sys/dev/pci/gdt_pci.c b/sys/dev/pci/gdt_pci.c index 5c4d645c050..8c23e344f64 100644 --- a/sys/dev/pci/gdt_pci.c +++ b/sys/dev/pci/gdt_pci.c @@ -1,4 +1,4 @@ -/* $OpenBSD: gdt_pci.c,v 1.28 2024/05/24 06:02:53 jsg Exp $ */ +/* $OpenBSD: gdt_pci.c,v 1.29 2024/09/01 03:08:56 jsg Exp $ */ /* * Copyright (c) 1999, 2000 Niklas Hallqvist. All rights reserved. @@ -493,7 +493,7 @@ gdt_pci_attach(struct device *parent, struct device *self, void *aux) goto bail_out; } - /* special commnd to controller BIOS */ + /* special command to controller BIOS */ bus_space_write_4(dpmemt, dpmemh, GDT_MPR_IC + GDT_S_INFO, 0); bus_space_write_4(dpmemt, dpmemh, GDT_MPR_IC + GDT_S_INFO + sizeof (u_int32_t), 0); diff --git a/sys/dev/pci/if_bnxtreg.h b/sys/dev/pci/if_bnxtreg.h index 01d126b3da7..e9d616410a6 100644 --- a/sys/dev/pci/if_bnxtreg.h +++ b/sys/dev/pci/if_bnxtreg.h @@ -1,4 +1,4 @@ -/* $OpenBSD: if_bnxtreg.h,v 1.5 2022/01/28 07:11:14 guenther Exp $ */ +/* $OpenBSD: if_bnxtreg.h,v 1.6 2024/09/01 03:08:56 jsg Exp $ */ /*- * BSD LICENSE * @@ -8701,7 +8701,7 @@ struct hwrm_port_phy_cfg_input { uint32_t tx_lpi_timer; uint32_t unused_4; /* - * Reuested setting of TX LPI timer in microseconds. This field is valid + * Requested setting of TX LPI timer in microseconds. This field is valid * only when EEE is enabled and TX LPI is enabled. */ #define HWRM_PORT_PHY_CFG_INPUT_TX_LPI_TIMER_MASK UINT32_C(0xffffff) @@ -23260,7 +23260,7 @@ struct hwrm_nvm_raw_write_blk_input { */ uint64_t host_src_addr; /* - * 64-bit Host Source Address. This is the loation of the source data to + * 64-bit Host Source Address. This is the location of the source data to * be written. */ uint32_t dest_addr; @@ -27747,7 +27747,7 @@ struct creq_destroy_cq_resp { uint16_t cq_arm_lvl; /* * CQ ARM Level: 0 ? Not Armed 1 ? Arm SE Only, Generate CNQE only for - * incoming Solicted Events 2 ? Arm all, Generate CNQE for Rx and Tx + * incoming Solicited Events 2 ? Arm all, Generate CNQE for Rx and Tx */ #define CREQ_DESTROY_CQ_RESP_CQ_ARM_LVL_MASK UINT32_C(0x3) #define CREQ_DESTROY_CQ_RESP_CQ_ARM_LVL_SFT 0 diff --git a/sys/dev/pci/if_em_hw.h b/sys/dev/pci/if_em_hw.h index 41b03775272..efdf51f643f 100644 --- a/sys/dev/pci/if_em_hw.h +++ b/sys/dev/pci/if_em_hw.h @@ -31,7 +31,7 @@ *******************************************************************************/ -/* $OpenBSD: if_em_hw.h,v 1.95 2024/06/09 05:18:12 jsg Exp $ */ +/* $OpenBSD: if_em_hw.h,v 1.96 2024/09/01 03:08:56 jsg Exp $ */ /* $FreeBSD: if_em_hw.h,v 1.15 2005/05/26 23:32:02 tackerman Exp $ */ /* if_em_hw.h @@ -2436,7 +2436,7 @@ struct em_host_command_info { #define EEPROM_WRITE_OPCODE_MICROWIRE 0x5 /* EEPROM write opcode */ #define EEPROM_ERASE_OPCODE_MICROWIRE 0x7 /* EEPROM erase opcode */ #define EEPROM_EWEN_OPCODE_MICROWIRE 0x13 /* EEPROM erase/write enable */ -#define EEPROM_EWDS_OPCODE_MICROWIRE 0x10 /* EEPROM erast/write disable */ +#define EEPROM_EWDS_OPCODE_MICROWIRE 0x10 /* EEPROM erase/write disable */ /* EEPROM Commands - SPI */ #define EEPROM_MAX_RETRY_SPI 5000 /* Max wait of 5ms, for RDY signal */ diff --git a/sys/dev/pci/if_iwm.c b/sys/dev/pci/if_iwm.c index 80bb9e7c972..150cb23c3e8 100644 --- a/sys/dev/pci/if_iwm.c +++ b/sys/dev/pci/if_iwm.c @@ -1,4 +1,4 @@ -/* $OpenBSD: if_iwm.c,v 1.416 2024/05/24 06:02:53 jsg Exp $ */ +/* $OpenBSD: if_iwm.c,v 1.417 2024/09/01 03:08:59 jsg Exp $ */ /* * Copyright (c) 2014, 2016 genua gmbh <info@genua.de> @@ -9238,7 +9238,7 @@ iwm_calib_timeout(void *arg) ieee80211_amrr_choose(&sc->sc_amrr, &in->in_ni, &in->in_amn); /* * If AMRR has chosen a new TX rate we must update - * the firwmare's LQ rate table. + * the firmware's LQ rate table. * ni_txrate may change again before the task runs so * cache the chosen rate in the iwm_node structure. */ diff --git a/sys/dev/pci/if_iwmreg.h b/sys/dev/pci/if_iwmreg.h index 2d6fab53212..cc48057e059 100644 --- a/sys/dev/pci/if_iwmreg.h +++ b/sys/dev/pci/if_iwmreg.h @@ -1,4 +1,4 @@ -/* $OpenBSD: if_iwmreg.h,v 1.69 2024/01/16 12:21:02 kevlo Exp $ */ +/* $OpenBSD: if_iwmreg.h,v 1.70 2024/09/01 03:08:59 jsg Exp $ */ /****************************************************************************** * @@ -1762,7 +1762,7 @@ static inline unsigned int IWM_FH_MEM_CBBC_QUEUE(unsigned int chnl) #define IWM_RX_LOW_WATERMARK 8 /** - * struct iwm_rb_status - reseve buffer status + * struct iwm_rb_status - reserve buffer status * host memory mapped FH registers * @closed_rb_num [0:11] - Indicates the index of the RB which was closed * @closed_fr_num [0:11] - Indicates the index of the RX Frame which was closed diff --git a/sys/dev/pci/if_ngbereg.h b/sys/dev/pci/if_ngbereg.h index 12105bd8400..96673aaba39 100644 --- a/sys/dev/pci/if_ngbereg.h +++ b/sys/dev/pci/if_ngbereg.h @@ -1,4 +1,4 @@ -/* $OpenBSD: if_ngbereg.h,v 1.1 2023/03/31 08:19:41 kevlo Exp $ */ +/* $OpenBSD: if_ngbereg.h,v 1.2 2024/09/01 03:08:59 jsg Exp $ */ /* * Copyright (c) 2015-2017 Beijing WangXun Technology Co., Ltd. @@ -160,7 +160,7 @@ #define NGBE_PSR_MAX_SZ 0x15020 #define NGBE_PSR_VLAN_CTL 0x15088 -/* mcasst/ucast overflow tbl */ +/* mcast/ucast overflow tbl */ #define NGBE_PSR_MC_TBL(_i) (0x15200 + ((_i) * 4)) #define NGBE_PSR_UC_TBL(_i) (0x15400 + ((_i) * 4)) diff --git a/sys/dev/pci/if_skreg.h b/sys/dev/pci/if_skreg.h index 5e7091ce519..c2741fa9a80 100644 --- a/sys/dev/pci/if_skreg.h +++ b/sys/dev/pci/if_skreg.h @@ -1,4 +1,4 @@ -/* $OpenBSD: if_skreg.h,v 1.64 2022/02/21 07:15:42 jsg Exp $ */ +/* $OpenBSD: if_skreg.h,v 1.65 2024/09/01 03:08:59 jsg Exp $ */ /* * Copyright (c) 1997, 1998, 1999, 2000 @@ -1761,16 +1761,16 @@ struct msk_status_desc { /* Source Address High #2 (SAH2) */ #define YUKON_SAH2 0x0030 /* SA2[47:32] */ -/* Multicatst Address Hash Register 1 (MCAH1) */ +/* Multicast Address Hash Register 1 (MCAH1) */ #define YUKON_MCAH1 0x0034 -/* Multicatst Address Hash Register 2 (MCAH2) */ +/* Multicast Address Hash Register 2 (MCAH2) */ #define YUKON_MCAH2 0x0038 -/* Multicatst Address Hash Register 3 (MCAH3) */ +/* Multicast Address Hash Register 3 (MCAH3) */ #define YUKON_MCAH3 0x003c -/* Multicatst Address Hash Register 4 (MCAH4) */ +/* Multicast Address Hash Register 4 (MCAH4) */ #define YUKON_MCAH4 0x0040 /* Transmit Interrupt Register (TIR) */ diff --git a/sys/dev/pci/if_vmx.c b/sys/dev/pci/if_vmx.c index c3ad040ce9b..a66d8a3c207 100644 --- a/sys/dev/pci/if_vmx.c +++ b/sys/dev/pci/if_vmx.c @@ -1,4 +1,4 @@ -/* $OpenBSD: if_vmx.c,v 1.88 2024/06/17 11:13:43 bluhm Exp $ */ +/* $OpenBSD: if_vmx.c,v 1.89 2024/09/01 03:08:59 jsg Exp $ */ /* * Copyright (c) 2013 Tsubai Masanari @@ -1135,7 +1135,7 @@ vmxnet3_rxintr(struct vmxnet3_softc *sc, struct vmxnet3_rxqueue *rq) done[rid]++; /* - * A receive descriptor of type 4 which is flaged as start of + * A receive descriptor of type 4 which is flagged as start of * packet, contains the number of TCP segment of an LRO packet. */ if (letoh32((rxcd->rxc_word3 & VMXNET3_RXC_TYPE_M) >> diff --git a/sys/dev/pci/igc_i225.c b/sys/dev/pci/igc_i225.c index 521a10c622d..932e4104bbf 100644 --- a/sys/dev/pci/igc_i225.c +++ b/sys/dev/pci/igc_i225.c @@ -1,4 +1,4 @@ -/* $OpenBSD: igc_i225.c,v 1.4 2023/02/03 11:31:52 mbuhl Exp $ */ +/* $OpenBSD: igc_i225.c,v 1.5 2024/09/01 03:08:59 jsg Exp $ */ /*- * Copyright 2021 Intel Corp * Copyright 2021 Rubicon Communications, LLC (Netgate) @@ -763,7 +763,7 @@ igc_write_erase_flash_command_i225(struct igc_hw *hw, uint32_t opcode, /* igc_update_flash_i225 - Commit EEPROM to the flash * if fw_valid_bit is set, FW is active. setting FLUPD bit in EEC * register makes the FW load the internal shadow RAM into the flash. - * Otherwise, fw_valid_bit is 0. if FL_SECU.block_prtotected_sw = 0 + * Otherwise, fw_valid_bit is 0. if FL_SECU.block_protected_sw = 0 * then FW is not active so the SW is responsible shadow RAM dump. * * @hw: pointer to the HW structure diff --git a/sys/dev/pci/ixgb_ee.c b/sys/dev/pci/ixgb_ee.c index a0c5bbbd18e..9aea3e7a79d 100644 --- a/sys/dev/pci/ixgb_ee.c +++ b/sys/dev/pci/ixgb_ee.c @@ -31,7 +31,7 @@ *******************************************************************************/ -/* $OpenBSD: ixgb_ee.c,v 1.9 2024/05/24 06:02:57 jsg Exp $ */ +/* $OpenBSD: ixgb_ee.c,v 1.10 2024/09/01 03:08:59 jsg Exp $ */ #include <sys/param.h> #include <sys/systm.h> @@ -219,7 +219,7 @@ ixgb_standby_eeprom(struct ixgb_hw *hw) eecd_reg = IXGB_READ_REG(hw, EECD); - /* Deselct EEPROM */ + /* Deselect EEPROM */ eecd_reg &= ~(IXGB_EECD_CS | IXGB_EECD_SK); IXGB_WRITE_REG(hw, EECD, eecd_reg); usec_delay(50); diff --git a/sys/dev/pci/ixgbe_x550.c b/sys/dev/pci/ixgbe_x550.c index 5e5da281e3e..b3e147557d9 100644 --- a/sys/dev/pci/ixgbe_x550.c +++ b/sys/dev/pci/ixgbe_x550.c @@ -1,4 +1,4 @@ -/* $OpenBSD: ixgbe_x550.c,v 1.9 2024/05/13 01:15:51 jsg Exp $ */ +/* $OpenBSD: ixgbe_x550.c,v 1.10 2024/09/01 03:09:00 jsg Exp $ */ /****************************************************************************** @@ -1764,12 +1764,12 @@ int32_t ixgbe_get_link_capabilities_X550em(struct ixgbe_hw *hw, } /** - * ixgbe_get_lasi_ext_t_x550em - Determime external Base T PHY interrupt cause + * ixgbe_get_lasi_ext_t_x550em - Determine external Base T PHY interrupt cause * @hw: pointer to hardware structure * @lsc: pointer to boolean flag which indicates whether external Base T * PHY interrupt is lsc * - * Determime if external Base T PHY interrupt cause is high temperature + * Determine if external Base T PHY interrupt cause is high temperature * failure alarm or link status change. * * Return IXGBE_ERR_OVERTEMP if interrupt is high temperature diff --git a/sys/dev/pci/pcidevs b/sys/dev/pci/pcidevs index 74fbdeadc4c..1bd4092a4cd 100644 --- a/sys/dev/pci/pcidevs +++ b/sys/dev/pci/pcidevs @@ -1,4 +1,4 @@ -$OpenBSD: pcidevs,v 1.2085 2024/08/20 12:17:48 jsg Exp $ +$OpenBSD: pcidevs,v 1.2086 2024/09/01 03:09:00 jsg Exp $ /* $NetBSD: pcidevs,v 1.30 1997/06/24 06:20:24 thorpej Exp $ */ /* @@ -2295,7 +2295,7 @@ product ATI RV630_5 0x958f RV630 product ATI RADEON_HD3600 0x9590 Radeon HD 3600 product ATI RADEON_HD3650_M 0x9591 Mobility Radeon HD 3650 product ATI RADEON_HD3670_M 0x9593 Mobility Radeon HD 3670 -product ATI FIREGL_V5700_M 0x9595 Mobilty FireGL V5700 +product ATI FIREGL_V5700_M 0x9595 Mobility FireGL V5700 product ATI RADEON_HD3650_AGP 0x9596 Radeon HD 3650 AGP product ATI RV635_1 0x9597 RV635 product ATI RADEON_HD3650 0x9598 Radeon HD 3650 @@ -2833,7 +2833,7 @@ product CMI CMI8738B 0x0112 CMI8738B Audio product CMI HSP56 0x0211 HSP56 AMR product CMI CMI8788 0x8788 CMI8788 HD Audio -/* CNet produts */ +/* CNet products */ product CNET GIGACARD 0x434e GigaCard /* Cogent Data Technologies products */ diff --git a/sys/dev/pci/pciide_pdc202xx_reg.h b/sys/dev/pci/pciide_pdc202xx_reg.h index d8711cea45e..fded28bed05 100644 --- a/sys/dev/pci/pciide_pdc202xx_reg.h +++ b/sys/dev/pci/pciide_pdc202xx_reg.h @@ -1,4 +1,4 @@ -/* $OpenBSD: pciide_pdc202xx_reg.h,v 1.16 2022/01/09 05:42:58 jsg Exp $ */ +/* $OpenBSD: pciide_pdc202xx_reg.h,v 1.17 2024/09/01 03:09:00 jsg Exp $ */ /* $NetBSD: pciide_pdc202xx_reg.h,v 1.5 2001/07/05 08:38:27 toshii Exp $ */ /* @@ -101,7 +101,7 @@ #define PDC262_ATAPI_LBA48_WRITE 0x06000000 /* - * The timings provided here cmoes from the PDC20262 docs. I hope they are + * The timings provided here comes from the PDC20262 docs. I hope they are * right for the PDC20246 too ... */ diff --git a/sys/dev/usb/if_cuereg.h b/sys/dev/usb/if_cuereg.h index ebb463ae222..151674d2070 100644 --- a/sys/dev/usb/if_cuereg.h +++ b/sys/dev/usb/if_cuereg.h @@ -1,4 +1,4 @@ -/* $OpenBSD: if_cuereg.h,v 1.12 2013/04/15 09:23:01 mglocker Exp $ */ +/* $OpenBSD: if_cuereg.h,v 1.13 2024/09/01 03:09:00 jsg Exp $ */ /* $NetBSD: if_cuereg.h,v 1.14 2001/01/21 22:09:24 augustss Exp $ */ /* * Copyright (c) 1997, 1998, 1999, 2000 @@ -76,7 +76,7 @@ #define CUE_LEDCTL 0x81 -/* Advenced operating mode register */ +/* Advanced operating mode register */ #define CUE_AOP_SRAMWAITS 0x03 #define CUE_AOP_EMBED_RXLEN 0x08 #define CUE_AOP_RXCOMBINE 0x10 diff --git a/sys/dev/usb/if_urtw.c b/sys/dev/usb/if_urtw.c index 3902429e6f2..6bf38e86082 100644 --- a/sys/dev/usb/if_urtw.c +++ b/sys/dev/usb/if_urtw.c @@ -1,4 +1,4 @@ -/* $OpenBSD: if_urtw.c,v 1.73 2024/05/23 03:21:09 jsg Exp $ */ +/* $OpenBSD: if_urtw.c,v 1.74 2024/09/01 03:09:00 jsg Exp $ */ /*- * Copyright (c) 2009 Martynas Venckus <martynas@openbsd.org> @@ -3498,7 +3498,7 @@ urtw_task(void *arg) fail: if (error != 0) - DPRINTF(("%s: error duing processing RUN state.", + DPRINTF(("%s: error processing RUN state.", sc->sc_dev.dv_xname)); } diff --git a/sys/dev/usb/if_urtwn.c b/sys/dev/usb/if_urtwn.c index f6075bd9fba..a579dffb37f 100644 --- a/sys/dev/usb/if_urtwn.c +++ b/sys/dev/usb/if_urtwn.c @@ -1,4 +1,4 @@ -/* $OpenBSD: if_urtwn.c,v 1.110 2024/05/23 03:21:09 jsg Exp $ */ +/* $OpenBSD: if_urtwn.c,v 1.111 2024/09/01 03:09:00 jsg Exp $ */ /*- * Copyright (c) 2010 Damien Bergamini <damien.bergamini@free.fr> @@ -2494,7 +2494,7 @@ urtwn_burstlen_init(struct urtwn_softc *sc) urtwn_write_1(sc, R92C_USTIME_TSF, 0x28); urtwn_write_1(sc, R88F_USTIME_EDCA, 0x28); - /* To prevent mac is reseted by bus. */ + /* To prevent bus resetting the mac. */ urtwn_write_1(sc, R92C_RSV_CTRL, urtwn_read_1(sc, R92C_RSV_CTRL) | R92C_RSV_CTRL_R_DIS_PRST_0 | R92C_RSV_CTRL_R_DIS_PRST_1); diff --git a/sys/dev/usb/uaudio.c b/sys/dev/usb/uaudio.c index 8e8fd3f29bb..89b3ff60d8b 100644 --- a/sys/dev/usb/uaudio.c +++ b/sys/dev/usb/uaudio.c @@ -1,4 +1,4 @@ -/* $OpenBSD: uaudio.c,v 1.175 2024/07/23 08:59:21 ratchov Exp $ */ +/* $OpenBSD: uaudio.c,v 1.176 2024/09/01 03:09:00 jsg Exp $ */ /* * Copyright (c) 2018 Alexandre Ratchov <alex@caoua.org> * @@ -1999,7 +1999,7 @@ uaudio_process_header(struct uaudio_softc *sc, struct uaudio_blob *p) /* * Process AC interrupt endpoint descriptor, this is mainly to skip * the descriptor as we use neither of its properties. Our mixer - * interface doesn't support unsolicitated state changes, so we've no + * interface doesn't support unsolicited state changes, so we've no * use of it yet. */ int @@ -2313,7 +2313,7 @@ uaudio_process_ac(struct uaudio_softc *sc, struct uaudio_blob *p, int ifnum) * to adapt to software's desired rate * * - * For usb1.1 ival is cardcoded to 1 for isochronous + * For usb1.1 ival is hardcoded to 1 for isochronous * transfers, which means one transfer every ms. I.e one * transfer every frame period. * diff --git a/sys/dev/usb/uvideo.c b/sys/dev/usb/uvideo.c index 5793a9ec661..41d98780231 100644 --- a/sys/dev/usb/uvideo.c +++ b/sys/dev/usb/uvideo.c @@ -1,4 +1,4 @@ -/* $OpenBSD: uvideo.c,v 1.221 2024/07/20 12:34:52 jsg Exp $ */ +/* $OpenBSD: uvideo.c,v 1.222 2024/09/01 03:09:00 jsg Exp $ */ /* * Copyright (c) 2008 Robert Nagy <robert@openbsd.org> @@ -3810,7 +3810,7 @@ uvideo_ucode_loader_ricoh(struct uvideo_softc *sc) /* * The iSight first generation device will first attach as - * 0x8300 non-UVC. After the firmware gots uploaded, the device + * 0x8300 non-UVC. After the firmware is uploaded, the device * will reset and come back as 0x8501 UVC compatible. */ usbd_status |