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-rw-r--r--sys/arch/arm/arm/cpufunc.c4
-rw-r--r--sys/dev/fdt/bcm2835_aux.c4
2 files changed, 4 insertions, 4 deletions
diff --git a/sys/arch/arm/arm/cpufunc.c b/sys/arch/arm/arm/cpufunc.c
index f528e20662b..114aeaf0a79 100644
--- a/sys/arch/arm/arm/cpufunc.c
+++ b/sys/arch/arm/arm/cpufunc.c
@@ -1,4 +1,4 @@
-/* $OpenBSD: cpufunc.c,v 1.52 2017/09/08 05:36:51 deraadt Exp $ */
+/* $OpenBSD: cpufunc.c,v 1.53 2018/02/25 01:45:01 guenther Exp $ */
/* $NetBSD: cpufunc.c,v 1.65 2003/11/05 12:53:15 scw Exp $ */
/*
@@ -418,7 +418,7 @@ armv7_setup()
cpu_idcache_wbinv_all();
/*
- * Set the auxilliary control register first, as the SMP bit
+ * Set the auxiliary control register first, as the SMP bit
* needs to be set to 1 before the caches and the MMU are
* enabled.
*/
diff --git a/sys/dev/fdt/bcm2835_aux.c b/sys/dev/fdt/bcm2835_aux.c
index 973222644c7..692c3362828 100644
--- a/sys/dev/fdt/bcm2835_aux.c
+++ b/sys/dev/fdt/bcm2835_aux.c
@@ -1,4 +1,4 @@
-/* $OpenBSD: bcm2835_aux.c,v 1.1 2017/07/29 17:25:20 kettenis Exp $ */
+/* $OpenBSD: bcm2835_aux.c,v 1.2 2018/02/25 01:45:01 guenther Exp $ */
/*
* Copyright (c) 2017 Mark kettenis <kettenis@openbsd.org>
*
@@ -27,7 +27,7 @@
#include <dev/ofw/fdt.h>
/*
- * This auxilliary device handles interrupts and clocks for one UART
+ * This auxiliary device handles interrupts and clocks for one UART
* and two SPI controllers. For now we only support the UART, so we
* simply register its interrupt handler directly with our parent
* interrupt controller.