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-rw-r--r--sys/arch/sparc64/conf/GENERIC7
-rw-r--r--sys/arch/sparc64/include/bppioctl.h63
-rw-r--r--sys/arch/sparc64/include/conf.h10
-rw-r--r--sys/arch/sparc64/sparc64/conf.c12
-rw-r--r--sys/dev/sbus/files.sbus10
-rw-r--r--sys/dev/sbus/magma.c1855
-rw-r--r--sys/dev/sbus/magmareg.h236
7 files changed, 2184 insertions, 9 deletions
diff --git a/sys/arch/sparc64/conf/GENERIC b/sys/arch/sparc64/conf/GENERIC
index 3bc26cdc741..f615b05bc56 100644
--- a/sys/arch/sparc64/conf/GENERIC
+++ b/sys/arch/sparc64/conf/GENERIC
@@ -1,4 +1,4 @@
-# $OpenBSD: GENERIC,v 1.37 2002/01/06 22:18:39 jason Exp $
+# $OpenBSD: GENERIC,v 1.38 2002/01/12 20:19:40 jason Exp $
# $NetBSD: GENERIC32,v 1.18 2001/07/20 00:07:12 eeh Exp $
machine sparc64
@@ -91,6 +91,11 @@ be* at qec?
hme* at sbus? slot ? offset ?
+# Magma serial/parallel port devices
+magma* at sbus? slot ? offset ?
+mtty* at magma?
+mbpp* at magma?
+
pciide* at pci? dev ? function ? flags 0x0000
wd* at pciide? channel ? drive ? flags 0x0a00
atapiscsi* at pciide? channel ?
diff --git a/sys/arch/sparc64/include/bppioctl.h b/sys/arch/sparc64/include/bppioctl.h
new file mode 100644
index 00000000000..94227c32ab8
--- /dev/null
+++ b/sys/arch/sparc64/include/bppioctl.h
@@ -0,0 +1,63 @@
+/* $OpenBSD: bppioctl.h,v 1.1 2002/01/12 20:19:40 jason Exp $ */
+
+/*
+ * Copyright (c) 1998 Iain Hibbert
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * 1. Redistributions of source code must retain the above copyright
+ * notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ * notice, this list of conditions and the following disclaimer in the
+ * documentation and/or other materials provided with the distribution.
+ * 3. The name Iain Hibbert may not be used to endorse or promote products
+ * derived from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY ``AS IS'' AND ANY EXPRESS OR IMPLIED
+ * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
+ * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN
+ * NO EVENT SHALL I BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
+ * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
+ * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR
+ * PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF
+ * LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING
+ * NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
+ * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ *
+ * bppioctl.h
+ */
+
+#ifndef _IOCTL_
+#include <sys/ioctl.h>
+#endif
+
+struct bpp_param {
+ int bp_burst; /* chars to send/recv in one call */
+ int bp_timeout; /* timeout: -1 blocking, 0 non blocking >0 ms */
+ int bp_delay; /* delay between polls (ms) */
+};
+
+#define BPP_BLOCK -1
+#define BPP_NOBLOCK 0
+
+/* defaults */
+#define BPP_BURST 1024
+#define BPP_TIMEOUT BPP_BLOCK
+#define BPP_DELAY 10
+
+/* limits */
+#define BPP_BURST_MIN 1
+#define BPP_BURST_MAX 1024
+#define BPP_DELAY_MIN 0
+#define BPP_DELAY_MAX 30000
+
+/* status bits */
+#define BPP_BUSY (1<<0)
+#define BPP_PAPER (1<<1)
+
+/* ioctl commands */
+#define BPPIOCSPARAM _IOW('P', 0x1, struct bpp_param)
+#define BPPIOCGPARAM _IOR('P', 0x2, struct bpp_param)
+#define BPPIOCGSTAT _IOR('P', 0x4, int)
diff --git a/sys/arch/sparc64/include/conf.h b/sys/arch/sparc64/include/conf.h
index b0c50871568..e1c75c7d628 100644
--- a/sys/arch/sparc64/include/conf.h
+++ b/sys/arch/sparc64/include/conf.h
@@ -1,4 +1,4 @@
-/* $OpenBSD: conf.h,v 1.7 2002/01/04 16:00:34 jason Exp $ */
+/* $OpenBSD: conf.h,v 1.8 2002/01/12 20:19:40 jason Exp $ */
/* $NetBSD: conf.h,v 1.9 2001/03/26 12:33:26 lukem Exp $ */
/*-
@@ -54,6 +54,11 @@ cdev_decl(openprom);
(dev_type_stop((*))) nullop, 0, (dev_type_select((*))) enodev, \
(dev_type_mmap((*))) enodev }
+#define cdev_gen_init(c,n) { \
+ dev_init(c,n,open), dev_init(c,n,close), dev_init(c,n,read), \
+ dev_init(c,n,write), dev_init(c,n,ioctl), (dev_type_stop((*))) nullop, \
+ 0, dev_init(c,n,select), (dev_type_mmap((*))) enodev }
+
cdev_decl(cn);
cdev_decl(zs);
@@ -105,3 +110,6 @@ cdev_decl(ulpt);
cdev_decl(urio);
cdev_decl(ucom);
cdev_decl(uscanner);
+
+cdev_decl(mtty);
+cdev_decl(mbpp);
diff --git a/sys/arch/sparc64/sparc64/conf.c b/sys/arch/sparc64/sparc64/conf.c
index 30fe8856d4e..efb3ba01a2c 100644
--- a/sys/arch/sparc64/sparc64/conf.c
+++ b/sys/arch/sparc64/sparc64/conf.c
@@ -1,4 +1,4 @@
-/* $OpenBSD: conf.c,v 1.19 2002/01/04 16:00:34 jason Exp $ */
+/* $OpenBSD: conf.c,v 1.20 2002/01/12 20:19:40 jason Exp $ */
/* $NetBSD: conf.c,v 1.17 2001/03/26 12:33:26 lukem Exp $ */
/*
@@ -89,10 +89,10 @@
#include "com.h"
#ifdef notyet
#include "bpp.h"
-#include "magma.h" /* has NMTTY and NMBPP */
+#else
+#define NBPP 0
#endif
-#define NBPP 0
-#define NMAGMA 0
+#include "magma.h" /* has NMTTY and NMBPP */
#ifdef notyet
#include "fdc.h" /* has NFDC and NFD; see files.sparc */
@@ -236,8 +236,8 @@ struct cdevsw cdevsw[] =
cdev_notdef(), /* 68 */
cdev_audio_init(NAUDIO,audio), /* 69: /dev/audio */
cdev_openprom_init(1,openprom), /* 70: /dev/openprom */
- cdev_notdef(), /* 71 */
- cdev_notdef(), /* 72 */
+ cdev_tty_init(NMTTY,mtty), /* 71: magma serial ports */
+ cdev_gen_init(NMBPP,mbpp), /* 72: magma parallel ports */
cdev_pf_init(NPF,pf), /* 73: packet filter */
cdev_altq_init(NALTQ,altq), /* 74: ALTQ control interface */
cdev_crypto_init(NCRYPTO,crypto), /* 75: /dev/crypto */
diff --git a/sys/dev/sbus/files.sbus b/sys/dev/sbus/files.sbus
index ae32c96dfed..10b90ecc57a 100644
--- a/sys/dev/sbus/files.sbus
+++ b/sys/dev/sbus/files.sbus
@@ -1,4 +1,4 @@
-# $OpenBSD: files.sbus,v 1.10 2002/01/03 21:58:59 jason Exp $
+# $OpenBSD: files.sbus,v 1.11 2002/01/12 20:19:40 jason Exp $
# $NetBSD: files.sbus,v 1.16 2000/12/08 17:29:12 martin Exp $
#
# Config file and device description for machine-independent SBUS code.
@@ -59,3 +59,11 @@ file dev/sbus/cgsix.c cgsix
device cgthree: wsemuldisplaydev, wsrasteremulops, wsemul_sun
attach cgthree at sbus
file dev/sbus/cgthree.c cgthree
+
+device magma {}
+attach magma at sbus
+device mtty
+attach mtty at magma
+device mbpp
+attach mbpp at magma
+file dev/sbus/magma.c magma | mtty | mbpp needs-flag
diff --git a/sys/dev/sbus/magma.c b/sys/dev/sbus/magma.c
new file mode 100644
index 00000000000..62cc6c0c55e
--- /dev/null
+++ b/sys/dev/sbus/magma.c
@@ -0,0 +1,1855 @@
+/* $OpenBSD: magma.c,v 1.1 2002/01/12 20:19:40 jason Exp $ */
+/*
+ * magma.c
+ *
+ * Copyright (c) 1998 Iain Hibbert
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * 1. Redistributions of source code must retain the above copyright
+ * notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ * notice, this list of conditions and the following disclaimer in the
+ * documentation and/or other materials provided with the distribution.
+ * 3. All advertising materials mentioning features or use of this software
+ * must display the following acknowledgement:
+ * This product includes software developed by Iain Hibbert
+ * 4. The name of the author may not be used to endorse or promote products
+ * derived from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
+ * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
+ * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
+ * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
+ * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
+ * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
+ * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
+ * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ *
+#define MAGMA_DEBUG
+ */
+
+/*
+ * Driver for Magma SBus Serial/Parallel cards using the Cirrus Logic
+ * CD1400 & CD1190 chips
+ */
+
+#include "magma.h"
+#if NMAGMA > 0
+
+#include <sys/param.h>
+#include <sys/systm.h>
+#include <sys/proc.h>
+#include <sys/device.h>
+#include <sys/file.h>
+#include <sys/ioctl.h>
+#include <sys/malloc.h>
+#include <sys/tty.h>
+#include <sys/time.h>
+#include <sys/kernel.h>
+#include <sys/syslog.h>
+#include <sys/conf.h>
+#include <sys/errno.h>
+
+#include <machine/autoconf.h>
+#include <machine/conf.h>
+#include <machine/bus.h>
+#include <machine/bppioctl.h>
+
+#include <dev/sbus/sbusvar.h>
+#include <dev/ic/cd1400reg.h>
+#include <dev/ic/cd1190reg.h>
+
+#include <dev/sbus/magmareg.h>
+
+/*
+ * Select tty soft interrupt bit based on TTY ipl. (stole from zs.c)
+ */
+#if PIL_TTY == 1
+# define IE_MSOFT IE_L1
+#elif PIL_TTY == 4
+# define IE_MSOFT IE_L4
+#elif PIL_TTY == 6
+# define IE_MSOFT IE_L6
+#else
+# error "no suitable software interrupt bit"
+#endif
+
+/* supported cards
+ *
+ * The table below lists the cards that this driver is likely to
+ * be able to support.
+ *
+ * Cards with parallel ports: except for the LC2+1Sp, they all use
+ * the CD1190 chip which I know nothing about. I've tried to leave
+ * hooks for it so it shouldn't be too hard to add support later.
+ * (I think somebody is working on this separately)
+ *
+ * Thanks to Bruce at Magma for telling me the hardware offsets.
+ */
+static struct magma_board_info supported_cards[] = {
+ {
+ "MAGMA,4_Sp", "Magma 4 Sp", 4, 0,
+ 1, 0xa000, 0xc000, 0xe000, { 0x8000, 0, 0, 0 },
+ 0, { 0, 0 }
+ },
+ {
+ "MAGMA,8_Sp", "Magma 8 Sp", 8, 0,
+ 2, 0xa000, 0xc000, 0xe000, { 0x4000, 0x6000, 0, 0 },
+ 0, { 0, 0 }
+ },
+ {
+ "MAGMA,_8HS_Sp", "Magma Fast 8 Sp", 8, 0,
+ 2, 0x2000, 0x4000, 0x6000, { 0x8000, 0xa000, 0, 0 },
+ 0, { 0, 0 }
+ },
+ {
+ "MAGMA,_8SP_422", "Magma 8 Sp - 422", 8, 0,
+ 2, 0x2000, 0x4000, 0x6000, { 0x8000, 0xa000, 0, 0 },
+ 0, { 0, 0 }
+ },
+ {
+ "MAGMA,12_Sp", "Magma 12 Sp", 12, 0,
+ 3, 0xa000, 0xc000, 0xe000, { 0x2000, 0x4000, 0x6000, 0 },
+ 0, { 0, 0 }
+ },
+ {
+ "MAGMA,16_Sp", "Magma 16 Sp", 16, 0,
+ 4, 0xd000, 0xe000, 0xf000, { 0x8000, 0x9000, 0xa000, 0xb000 },
+ 0, { 0, 0 }
+ },
+ {
+ "MAGMA,16_Sp_2", "Magma 16 Sp", 16, 0,
+ 4, 0x2000, 0x4000, 0x6000, { 0x8000, 0xa000, 0xc000, 0xe000 },
+ 0, { 0, 0 }
+ },
+ {
+ "MAGMA,16HS_Sp", "Magma Fast 16 Sp", 16, 0,
+ 4, 0x2000, 0x4000, 0x6000, { 0x8000, 0xa000, 0xc000, 0xe000 },
+ 0, { 0, 0 }
+ },
+ {
+ "MAGMA,21_Sp", "Magma LC 2+1 Sp", 2, 1,
+ 1, 0xa000, 0xc000, 0xe000, { 0x8000, 0, 0, 0 },
+ 0, { 0, 0 }
+ },
+ {
+ "MAGMA,21HS_Sp", "Magma 2+1 Sp", 2, 1,
+ 1, 0xa000, 0xc000, 0xe000, { 0x4000, 0, 0, 0 },
+ 1, { 0x6000, 0 }
+ },
+ {
+ "MAGMA,41_Sp", "Magma 4+1 Sp", 4, 1,
+ 1, 0xa000, 0xc000, 0xe000, { 0x4000, 0, 0, 0 },
+ 1, { 0x6000, 0 }
+ },
+ {
+ "MAGMA,82_Sp", "Magma 8+2 Sp", 8, 2,
+ 2, 0xd000, 0xe000, 0xf000, { 0x8000, 0x9000, 0, 0 },
+ 2, { 0xa000, 0xb000 }
+ },
+ {
+ "MAGMA,P1_Sp", "Magma P1 Sp", 0, 1,
+ 0, 0, 0, 0, { 0, 0, 0, 0 },
+ 1, { 0x8000, 0 }
+ },
+ {
+ "MAGMA,P2_Sp", "Magma P2 Sp", 0, 2,
+ 0, 0, 0, 0, { 0, 0, 0, 0 },
+ 2, { 0x4000, 0x8000 }
+ },
+ {
+ NULL, NULL, 0, 0,
+ 0, 0, 0, 0, { 0, 0, 0, 0 },
+ 0, { 0, 0 }
+ }
+};
+
+/************************************************************************
+ *
+ * Autoconfig Stuff
+ */
+
+struct cfattach magma_ca = {
+ sizeof(struct magma_softc), magma_match, magma_attach
+};
+
+struct cfdriver magma_cd = {
+ NULL, "magma", DV_DULL
+};
+
+struct cfattach mtty_ca = {
+ sizeof(struct mtty_softc), mtty_match, mtty_attach
+};
+
+struct cfdriver mtty_cd = {
+ NULL, "mtty", DV_TTY
+};
+
+struct cfattach mbpp_ca = {
+ sizeof(struct mbpp_softc), mbpp_match, mbpp_attach
+};
+
+struct cfdriver mbpp_cd = {
+ NULL, "mbpp", DV_DULL
+};
+
+/************************************************************************
+ *
+ * CD1400 Routines
+ *
+ * cd1400_compute_baud calculate COR/BPR register values
+ * cd1400_write_ccr write a value to CD1400 ccr
+ * cd1400_read_reg read from a CD1400 register
+ * cd1400_write_reg write to a CD1400 register
+ * cd1400_enable_transmitter enable transmitting on CD1400 channel
+ */
+
+/*
+ * compute the bpr/cor pair for any baud rate
+ * returns 0 for success, 1 for failure
+ */
+int
+cd1400_compute_baud(speed, clock, cor, bpr)
+ speed_t speed;
+ int clock;
+ int *cor, *bpr;
+{
+ int c, co, br;
+
+ if (speed < 50 || speed > 150000)
+ return (1);
+
+ for (c = 0, co = 8 ; co <= 2048 ; co <<= 2, c++) {
+ br = ((clock * 1000000) + (co * speed) / 2) / (co * speed);
+ if (br < 0x100) {
+ *bpr = br;
+ *cor = c;
+ return (0);
+ }
+ }
+
+ return (1);
+}
+
+/*
+ * Write a CD1400 channel command, should have a timeout?
+ */
+__inline void
+cd1400_write_ccr(cd, cmd)
+ struct cd1400 *cd;
+ u_char cmd;
+{
+ while (cd1400_read_reg(cd, CD1400_CCR))
+ ;
+
+ cd1400_write_reg(cd, CD1400_CCR, cmd);
+}
+
+/*
+ * read a value from a cd1400 register
+ */
+__inline u_char
+cd1400_read_reg(cd, reg)
+ struct cd1400 *cd;
+ int reg;
+{
+ return (bus_space_read_1(cd->cd_regt, cd->cd_regh, reg));
+}
+
+/*
+ * write a value to a cd1400 register
+ */
+__inline void
+cd1400_write_reg(cd, reg, value)
+ struct cd1400 *cd;
+ int reg;
+ u_char value;
+{
+ bus_space_write_1(cd->cd_regt, cd->cd_regh, reg, value);
+}
+
+/*
+ * enable transmit service requests for cd1400 channel
+ */
+void
+cd1400_enable_transmitter(cd, channel)
+ struct cd1400 *cd;
+ int channel;
+{
+ int s, srer;
+
+ s = spltty();
+ cd1400_write_reg(cd, CD1400_CAR, channel);
+ srer = cd1400_read_reg(cd, CD1400_SRER);
+ SET(srer, CD1400_SRER_TXRDY);
+ cd1400_write_reg(cd, CD1400_SRER, srer);
+ splx(s);
+}
+
+/************************************************************************
+ *
+ * CD1190 Routines
+ */
+
+/* well, there are none yet */
+
+/************************************************************************
+ *
+ * Magma Routines
+ *
+ * magma_match reports if we have a magma board available
+ * magma_attach attaches magma boards to the sbus
+ * magma_hard hardware level interrupt routine
+ * magma_soft software level interrupt routine
+ */
+
+int
+magma_match(parent, vcf, aux)
+ struct device *parent;
+ void *vcf, *aux;
+{
+ struct sbus_attach_args *sa = aux;
+
+ /* is it a magma Sp card? */
+ return (strcmp("MAGMA_Sp", sa->sa_name) == 0);
+}
+
+void
+magma_attach(parent, dev, aux)
+ struct device *parent;
+ struct device *dev;
+ void *aux;
+{
+ struct sbus_attach_args *sa = aux;
+ struct magma_softc *sc = (struct magma_softc *)dev;
+ struct magma_board_info *card = supported_cards;
+ char *magma_prom = getpropstring(sa->sa_node, "magma_prom");
+ int chip;
+ void *base;
+
+ /* find the card type */
+ while (card->mb_name && strcmp(magma_prom, card->mb_name))
+ card++;
+ if (card->mb_name == NULL) {
+ printf(" %s (unsupported)\n", magma_prom);
+ return;
+ }
+
+ sc->sc_bustag = sa->sa_bustag;
+
+ if (sbus_bus_map(sa->sa_bustag, sa->sa_reg[0].sbr_slot,
+ sa->sa_reg[0].sbr_offset, sa->sa_reg[0].sbr_size,
+ BUS_SPACE_MAP_LINEAR, 0, &sc->sc_iohandle) != 0) {
+ printf(": can't map registers\n");
+ return;
+ }
+
+ if (sa->sa_nintr < 1) {
+ printf(": can't find interrupt\n");
+ return;
+ }
+ sc->sc_ih = bus_intr_establish(sa->sa_bustag, sa->sa_pri, IPL_TTY, 0,
+ magma_hard, sc);
+ if (sc->sc_ih == NULL) {
+ printf(": failed to establish interrupt\n");
+ bus_space_unmap(sc->sc_bustag, sc->sc_iohandle,
+ sa->sa_reg[0].sbr_size);
+ return;
+ }
+
+ sc->sc_sih = softintr_establish(IPL_TTY, magma_soft, sc);
+ if (sc->sc_sih == NULL) {
+ printf(": can't get soft intr\n");
+ bus_space_unmap(sc->sc_bustag, sc->sc_iohandle,
+ sa->sa_reg[0].sbr_size);
+ return;
+ }
+
+ printf(": %s\n", card->mb_realname);
+
+ sc->ms_board = card;
+ sc->ms_ncd1400 = card->mb_ncd1400;
+ sc->ms_ncd1190 = card->mb_ncd1190;
+
+ /* the SVCACK* lines are daisychained */
+ if (bus_space_subregion(sc->sc_bustag, sc->sc_iohandle,
+ card->mb_svcackr, 1, &sc->sc_svcackrh)) {
+ printf(": failed to map svcackr\n");
+ return;
+ }
+ if (bus_space_subregion(sc->sc_bustag, sc->sc_iohandle,
+ card->mb_svcackt, 1, &sc->sc_svcackth)) {
+ printf(": failed to map svcackt\n");
+ return;
+ }
+ if (bus_space_subregion(sc->sc_bustag, sc->sc_iohandle,
+ card->mb_svcackm, 1, &sc->sc_svcackmh)) {
+ printf(": failed to map svcackm\n");
+ return;
+ }
+
+ /* init the cd1400 chips */
+ for (chip = 0 ; chip < card->mb_ncd1400 ; chip++) {
+ struct cd1400 *cd = &sc->ms_cd1400[chip];
+ char *str;
+
+ if (bus_space_subregion(sc->sc_bustag, sc->sc_iohandle,
+ card->mb_cd1400[chip], CD1400_REGMAPSIZE, &cd->cd_regh)) {
+ printf(": failed to map cd1400 regs\n");
+ return;
+ }
+ cd->cd_regt = sc->sc_bustag;
+
+ str = getpropstring(sa->sa_node, "clock");
+ if (strlen(str) == 0)
+ cd->cd_clock = 25;
+ else {
+ char *cp = str;
+
+ cd->cd_clock = 0;
+ while (*cp != '\0')
+ cd->cd_clock = cd->cd_clock * 10 + *cp++ - '0';
+ }
+
+ /* getpropstring(sa->sa_node, "chiprev"); */
+ /* seemingly the Magma drivers just ignore the propstring */
+ cd->cd_chiprev = cd1400_read_reg(cd, CD1400_GFRCR);
+
+ dprintf(("%s attach CD1400 %d addr 0x%x rev %x clock %dMhz\n",
+ sc->ms_dev.dv_xname, chip, cd->cd_reg,
+ cd->cd_chiprev, cd->cd_clock));
+
+ /* clear GFRCR */
+ cd1400_write_reg(cd, CD1400_GFRCR, 0x00);
+
+ /* reset whole chip */
+ cd1400_write_ccr(cd, CD1400_CCR_CMDRESET | CD1400_CCR_FULLRESET);
+
+ /* wait for revision code to be restored */
+ while (cd1400_read_reg(cd, CD1400_GFRCR) != cd->cd_chiprev)
+ ;
+
+ /* set the Prescaler Period Register to tick at 1ms */
+ cd1400_write_reg(cd, CD1400_PPR, ((cd->cd_clock * 1000000 / CD1400_PPR_PRESCALER + 500) / 1000));
+
+ /* The LC2+1Sp card is the only card that doesn't have a CD1190 for the
+ * parallel port, but uses channel 0 of the CD1400, so we make a note
+ * of it for later and set up the CD1400 for parallel mode operation.
+ */
+ if (card->mb_npar && card->mb_ncd1190 == 0) {
+ cd1400_write_reg(cd, CD1400_GCR, CD1400_GCR_PARALLEL);
+ cd->cd_parmode = 1;
+ }
+ }
+
+ /* init the cd1190 chips */
+ for (chip = 0 ; chip < card->mb_ncd1190 ; chip++) {
+ struct cd1190 *cd = &sc->ms_cd1190[chip];
+
+ cd->cd_reg = base + card->mb_cd1190[chip];
+ dprintf(("%s attach CD1190 %d addr 0x%x (failed)\n", sc->ms_dev.dv_xname, chip, cd->cd_reg));
+ /* XXX don't know anything about these chips yet */
+ }
+
+ /* configure the children */
+ (void)config_found(dev, mtty_match, NULL);
+ (void)config_found(dev, mbpp_match, NULL);
+}
+
+/*
+ * hard interrupt routine
+ *
+ * returns 1 if it handled it, otherwise 0
+ *
+ * runs at interrupt priority
+ */
+int
+magma_hard(arg)
+ void *arg;
+{
+ struct magma_softc *sc = arg;
+ struct cd1400 *cd;
+ int chip, status = 0;
+ int serviced = 0;
+ int needsoftint = 0;
+
+ /*
+ * check status of all the CD1400 chips
+ */
+ for (chip = 0 ; chip < sc->ms_ncd1400 ; chip++)
+ status |= cd1400_read_reg(&sc->ms_cd1400[chip], CD1400_SVRR);
+
+ if (ISSET(status, CD1400_SVRR_RXRDY)) {
+ /* enter rx service context */
+ u_int8_t rivr = bus_space_read_1(sc->sc_bustag, sc->sc_svcackrh, 0);
+ int port = rivr >> 4;
+
+ if (rivr & (1<<3)) { /* parallel port */
+ struct mbpp_port *mbpp;
+ int n_chars;
+
+ mbpp = &sc->ms_mbpp->ms_port[port];
+ cd = mbpp->mp_cd1400;
+
+ /* don't think we have to handle exceptions */
+ n_chars = cd1400_read_reg(cd, CD1400_RDCR);
+ while (n_chars--) {
+ if (mbpp->mp_cnt == 0) {
+ SET(mbpp->mp_flags, MBPPF_WAKEUP);
+ needsoftint = 1;
+ break;
+ }
+ *mbpp->mp_ptr = cd1400_read_reg(cd, CD1400_RDSR);
+ mbpp->mp_ptr++;
+ mbpp->mp_cnt--;
+ }
+ } else { /* serial port */
+ struct mtty_port *mtty;
+ u_char *ptr, n_chars, line_stat;
+
+ mtty = &sc->ms_mtty->ms_port[port];
+ cd = mtty->mp_cd1400;
+
+ if (ISSET(rivr, CD1400_RIVR_EXCEPTION)) {
+ line_stat = cd1400_read_reg(cd, CD1400_RDSR);
+ n_chars = 1;
+ } else { /* no exception, received data OK */
+ line_stat = 0;
+ n_chars = cd1400_read_reg(cd, CD1400_RDCR);
+ }
+
+ ptr = mtty->mp_rput;
+ while (n_chars--) {
+ *ptr++ = line_stat;
+ *ptr++ = cd1400_read_reg(cd, CD1400_RDSR);
+ if (ptr == mtty->mp_rend) ptr = mtty->mp_rbuf;
+ if (ptr == mtty->mp_rget) {
+ if (ptr == mtty->mp_rbuf) ptr = mtty->mp_rend;
+ ptr -= 2;
+ SET(mtty->mp_flags, MTTYF_RING_OVERFLOW);
+ break;
+ }
+ }
+ mtty->mp_rput = ptr;
+
+ needsoftint = 1;
+ }
+
+ cd1400_write_reg(cd, CD1400_EOSRR, 0); /* end service context */
+ serviced = 1;
+ } /* if(rx_service...) */
+
+ if (ISSET(status, CD1400_SVRR_MDMCH)) {
+ u_int8_t mivr = bus_space_read_1(sc->sc_bustag, sc->sc_svcackmh, 0);
+ int port = mivr >> 4;
+ struct mtty_port *mtty;
+ int carrier;
+ u_char msvr;
+
+ /*
+ * Handle CD (LC2+1Sp = DSR) changes.
+ */
+ mtty = &sc->ms_mtty->ms_port[port];
+ cd = mtty->mp_cd1400;
+ msvr = cd1400_read_reg(cd, CD1400_MSVR2);
+ carrier = ISSET(msvr, cd->cd_parmode ? CD1400_MSVR2_DSR : CD1400_MSVR2_CD);
+
+ if (mtty->mp_carrier != carrier) {
+ SET(mtty->mp_flags, MTTYF_CARRIER_CHANGED);
+ mtty->mp_carrier = carrier;
+ needsoftint = 1;
+ }
+
+ cd1400_write_reg(cd, CD1400_EOSRR, 0); /* end service context */
+ serviced = 1;
+ } /* if(mdm_service...) */
+
+ if (ISSET(status, CD1400_SVRR_TXRDY)) {
+ /* enter tx service context */
+ u_int8_t tivr = bus_space_read_1(sc->sc_bustag, sc->sc_svcackth, 0);
+ int port = tivr >> 4;
+
+ if (tivr & (1<<3)) { /* parallel port */
+ struct mbpp_port *mbpp;
+
+ mbpp = &sc->ms_mbpp->ms_port[port];
+ cd = mbpp->mp_cd1400;
+
+ if (mbpp->mp_cnt) {
+ int count = 0;
+
+ /* fill the fifo */
+ while (mbpp->mp_cnt && count++ < CD1400_PAR_FIFO_SIZE) {
+ cd1400_write_reg(cd, CD1400_TDR, *mbpp->mp_ptr);
+ mbpp->mp_ptr++;
+ mbpp->mp_cnt--;
+ }
+ } else {
+ /* fifo is empty and we got no more data to send, so shut
+ * off interrupts and signal for a wakeup, which can't be
+ * done here in case we beat mbpp_send to the tsleep call
+ * (we are running at >spltty)
+ */
+ cd1400_write_reg(cd, CD1400_SRER, 0);
+ SET(mbpp->mp_flags, MBPPF_WAKEUP);
+ needsoftint = 1;
+ }
+ } else { /* serial port */
+ struct mtty_port *mtty;
+ struct tty *tp;
+
+ mtty = &sc->ms_mtty->ms_port[port];
+ cd = mtty->mp_cd1400;
+ tp = mtty->mp_tty;
+
+ if (!ISSET(mtty->mp_flags, MTTYF_STOP)) {
+ int count = 0;
+
+ /* check if we should start/stop a break */
+ if (ISSET(mtty->mp_flags, MTTYF_SET_BREAK)) {
+ cd1400_write_reg(cd, CD1400_TDR, 0);
+ cd1400_write_reg(cd, CD1400_TDR, 0x81);
+ /* should we delay too? */
+ CLR(mtty->mp_flags, MTTYF_SET_BREAK);
+ count += 2;
+ }
+
+ if (ISSET(mtty->mp_flags, MTTYF_CLR_BREAK)) {
+ cd1400_write_reg(cd, CD1400_TDR, 0);
+ cd1400_write_reg(cd, CD1400_TDR, 0x83);
+ CLR(mtty->mp_flags, MTTYF_CLR_BREAK);
+ count += 2;
+ }
+
+ /* I don't quite fill the fifo in case the last one is a
+ * NULL which I have to double up because its the escape
+ * code for embedded transmit characters.
+ */
+ while (mtty->mp_txc > 0 && count < CD1400_TX_FIFO_SIZE - 1) {
+ u_char ch;
+
+ ch = *mtty->mp_txp;
+
+ mtty->mp_txc--;
+ mtty->mp_txp++;
+
+ if (ch == 0) {
+ cd1400_write_reg(cd, CD1400_TDR, ch);
+ count++;
+ }
+
+ cd1400_write_reg(cd, CD1400_TDR, ch);
+ count++;
+ }
+ }
+
+ /* if we ran out of work or are requested to STOP then
+ * shut off the txrdy interrupts and signal DONE to flush
+ * out the chars we have sent.
+ */
+ if (mtty->mp_txc == 0 || ISSET(mtty->mp_flags, MTTYF_STOP)) {
+ int srer;
+
+ srer = cd1400_read_reg(cd, CD1400_SRER);
+ CLR(srer, CD1400_SRER_TXRDY);
+ cd1400_write_reg(cd, CD1400_SRER, srer);
+ CLR(mtty->mp_flags, MTTYF_STOP);
+
+ SET(mtty->mp_flags, MTTYF_DONE);
+ needsoftint = 1;
+ }
+ }
+
+ cd1400_write_reg(cd, CD1400_EOSRR, 0); /* end service context */
+ serviced = 1;
+ } /* if(tx_service...) */
+
+ /* XXX service CD1190 interrupts too
+ for (chip = 0 ; chip < sc->ms_ncd1190 ; chip++) {
+ }
+ */
+
+ if (needsoftint)
+ softintr_schedule(sc->sc_sih);
+
+ return (serviced);
+}
+
+/*
+ * magma soft interrupt handler
+ *
+ * returns 1 if it handled it, 0 otherwise
+ *
+ * runs at spltty()
+ */
+void
+magma_soft(arg)
+ void *arg;
+{
+ struct magma_softc *sc = arg;
+ struct mtty_softc *mtty = sc->ms_mtty;
+ struct mbpp_softc *mbpp = sc->ms_mbpp;
+ int port;
+ int serviced = 0;
+ int s, flags;
+
+ /*
+ * check the tty ports (if any) to see what needs doing
+ */
+ if (mtty) {
+ for (port = 0 ; port < mtty->ms_nports ; port++) {
+ struct mtty_port *mp = &mtty->ms_port[port];
+ struct tty *tp = mp->mp_tty;
+
+ if (!ISSET(tp->t_state, TS_ISOPEN)) continue;
+
+ /*
+ * handle any received data
+ */
+ while (mp->mp_rget != mp->mp_rput) {
+ u_char stat;
+ int data;
+
+ stat = mp->mp_rget[0];
+ data = mp->mp_rget[1];
+ mp->mp_rget = ((mp->mp_rget + 2) == mp->mp_rend) ? mp->mp_rbuf : (mp->mp_rget + 2);
+
+ if (stat & (CD1400_RDSR_BREAK | CD1400_RDSR_FE))
+ data |= TTY_FE;
+ if (stat & CD1400_RDSR_PE)
+ data |= TTY_PE;
+
+ if (stat & CD1400_RDSR_OE)
+ log(LOG_WARNING, "%s%x: fifo overflow\n", mtty->ms_dev.dv_xname, port);
+
+ (*linesw[tp->t_line].l_rint)(data, tp);
+ serviced = 1;
+ }
+
+ s = splhigh(); /* block out hard interrupt routine */
+ flags = mp->mp_flags;
+ CLR(mp->mp_flags, MTTYF_DONE | MTTYF_CARRIER_CHANGED | MTTYF_RING_OVERFLOW);
+ splx(s); /* ok */
+
+ if (ISSET(flags, MTTYF_CARRIER_CHANGED)) {
+ dprintf(("%s%x: cd %s\n", mtty->ms_dev.dv_xname, port, mp->mp_carrier ? "on" : "off"));
+ (*linesw[tp->t_line].l_modem)(tp, mp->mp_carrier);
+ serviced = 1;
+ }
+
+ if (ISSET(flags, MTTYF_RING_OVERFLOW)) {
+ log(LOG_WARNING, "%s%x: ring buffer overflow\n", mtty->ms_dev.dv_xname, port);
+ serviced = 1;
+ }
+
+ if (ISSET(flags, MTTYF_DONE)) {
+ ndflush(&tp->t_outq, mp->mp_txp - tp->t_outq.c_cf);
+ CLR(tp->t_state, TS_BUSY);
+ (*linesw[tp->t_line].l_start)(tp); /* might be some more */
+ serviced = 1;
+ }
+ } /* for (each mtty...) */
+ }
+
+ /*
+ * check the bpp ports (if any) to see what needs doing
+ */
+ if (mbpp) {
+ for (port = 0 ; port < mbpp->ms_nports ; port++) {
+ struct mbpp_port *mp = &mbpp->ms_port[port];
+
+ if (!ISSET(mp->mp_flags, MBPPF_OPEN)) continue;
+
+ s = splhigh(); /* block out hard intr routine */
+ flags = mp->mp_flags;
+ CLR(mp->mp_flags, MBPPF_WAKEUP);
+ splx(s);
+
+ if (ISSET(flags, MBPPF_WAKEUP)) {
+ wakeup(mp);
+ serviced = 1;
+ }
+ } /* for (each mbpp...) */
+ }
+}
+
+/************************************************************************
+ *
+ * MTTY Routines
+ *
+ * mtty_match match one mtty device
+ * mtty_attach attach mtty devices
+ * mttyopen open mtty device
+ * mttyclose close mtty device
+ * mttyread read from mtty
+ * mttywrite write to mtty
+ * mttyioctl do ioctl on mtty
+ * mttytty return tty pointer for mtty
+ * mttystop stop mtty device
+ * mtty_start start mtty device
+ * mtty_param set mtty parameters
+ * mtty_modem_control set modem control lines
+ */
+
+int
+mtty_match(parent, vcf, args)
+ struct device *parent;
+ void *vcf, *args;
+{
+ struct magma_softc *sc = (struct magma_softc *)parent;
+
+ return (args == mtty_match && sc->ms_board->mb_nser && sc->ms_mtty == NULL);
+}
+
+void
+mtty_attach(parent, dev, args)
+ struct device *parent;
+ struct device *dev;
+ void *args;
+{
+ struct magma_softc *sc = (struct magma_softc *)parent;
+ struct mtty_softc *ms = (struct mtty_softc *)dev;
+ int port, chip, chan;
+
+ sc->ms_mtty = ms;
+ dprintf((" addr 0x%x", ms));
+
+ for (port = 0, chip = 0, chan = 0 ; port < sc->ms_board->mb_nser ; port++) {
+ struct mtty_port *mp = &ms->ms_port[port];
+ struct tty *tp;
+
+ mp->mp_cd1400 = &sc->ms_cd1400[chip];
+ if (mp->mp_cd1400->cd_parmode && chan == 0) chan = 1; /* skip channel 0 if parmode */
+ mp->mp_channel = chan;
+
+ tp = ttymalloc();
+ if (tp == NULL) break;
+ tty_attach(tp);
+ tp->t_oproc = mtty_start;
+ tp->t_param = mtty_param;
+
+ mp->mp_tty = tp;
+
+ mp->mp_rbuf = malloc(MTTY_RBUF_SIZE, M_DEVBUF, M_NOWAIT);
+ if (mp->mp_rbuf == NULL) break;
+
+ mp->mp_rend = mp->mp_rbuf + MTTY_RBUF_SIZE;
+
+ chan = (chan + 1) % CD1400_NO_OF_CHANNELS;
+ if (chan == 0) chip++;
+ }
+
+ ms->ms_nports = port;
+ printf(": %d tty%s\n", port, port == 1 ? "" : "s");
+}
+
+/*
+ * open routine. returns zero if successful, else error code
+ */
+int
+mttyopen(dev, flags, mode, p)
+ dev_t dev;
+ int flags;
+ int mode;
+ struct proc *p;
+{
+ int card = MAGMA_CARD(dev);
+ int port = MAGMA_PORT(dev);
+ struct mtty_softc *ms;
+ struct mtty_port *mp;
+ struct tty *tp;
+ struct cd1400 *cd;
+ int s;
+
+ if (card >= mtty_cd.cd_ndevs || (ms = mtty_cd.cd_devs[card]) == NULL || port >= ms->ms_nports)
+ return (ENXIO); /* device not configured */
+
+ mp = &ms->ms_port[port];
+ tp = mp->mp_tty;
+ tp->t_dev = dev;
+
+ if (!ISSET(tp->t_state, TS_ISOPEN)) {
+ SET(tp->t_state, TS_WOPEN);
+
+ /* set defaults */
+ ttychars(tp);
+ tp->t_iflag = TTYDEF_IFLAG;
+ tp->t_oflag = TTYDEF_OFLAG;
+ tp->t_cflag = TTYDEF_CFLAG;
+ if (ISSET(mp->mp_openflags, TIOCFLAG_CLOCAL))
+ SET(tp->t_cflag, CLOCAL);
+ if (ISSET(mp->mp_openflags, TIOCFLAG_CRTSCTS))
+ SET(tp->t_cflag, CRTSCTS);
+ if (ISSET(mp->mp_openflags, TIOCFLAG_MDMBUF))
+ SET(tp->t_cflag, MDMBUF);
+ tp->t_lflag = TTYDEF_LFLAG;
+ tp->t_ispeed = tp->t_ospeed = TTYDEF_SPEED;
+
+ /* init ring buffer */
+ mp->mp_rput = mp->mp_rget = mp->mp_rbuf;
+
+ s = spltty();
+
+ /* reset CD1400 channel */
+ cd = mp->mp_cd1400;
+ cd1400_write_reg(cd, CD1400_CAR, mp->mp_channel);
+ cd1400_write_ccr(cd, CD1400_CCR_CMDRESET);
+
+ /* encode the port number in top half of LIVR */
+ cd1400_write_reg(cd, CD1400_LIVR, port << 4);
+
+ /* sets parameters and raises DTR */
+ (void)mtty_param(tp, &tp->t_termios);
+
+ /* set tty watermarks */
+ ttsetwater(tp);
+
+ /* enable service requests */
+ cd1400_write_reg(cd, CD1400_SRER, CD1400_SRER_RXDATA | CD1400_SRER_MDMCH);
+
+ /* tell the tty about the carrier status */
+ if (ISSET(mp->mp_openflags, TIOCFLAG_SOFTCAR) || mp->mp_carrier)
+ SET(tp->t_state, TS_CARR_ON);
+ else
+ CLR(tp->t_state, TS_CARR_ON);
+ } else if (ISSET(tp->t_state, TS_XCLUDE) && p->p_ucred->cr_uid != 0) {
+ return (EBUSY); /* superuser can break exclusive access */
+ } else {
+ s = spltty();
+ }
+
+ /* wait for carrier if necessary */
+ if (!ISSET(flags, O_NONBLOCK)) {
+ while (!ISSET(tp->t_cflag, CLOCAL) && !ISSET(tp->t_state, TS_CARR_ON)) {
+ int error;
+
+ SET(tp->t_state, TS_WOPEN);
+ error = ttysleep(tp, &tp->t_rawq, TTIPRI | PCATCH, "mttydcd", 0);
+ if (error != 0) {
+ splx(s);
+ CLR(tp->t_state, TS_WOPEN);
+ return (error);
+ }
+ }
+ }
+
+ splx(s);
+
+ return ((*linesw[tp->t_line].l_open)(dev, tp));
+}
+
+/*
+ * close routine. returns zero if successful, else error code
+ */
+int
+mttyclose(dev, flag, mode, p)
+ dev_t dev;
+ int flag;
+ int mode;
+ struct proc *p;
+{
+ struct mtty_softc *ms = mtty_cd.cd_devs[MAGMA_CARD(dev)];
+ struct mtty_port *mp = &ms->ms_port[MAGMA_PORT(dev)];
+ struct tty *tp = mp->mp_tty;
+ int s;
+
+ (*linesw[tp->t_line].l_close)(tp, flag);
+ s = spltty();
+
+ /* if HUPCL is set, and the tty is no longer open
+ * shut down the port
+ */
+ if (ISSET(tp->t_cflag, HUPCL) || !ISSET(tp->t_state, TS_ISOPEN)) {
+ /* XXX wait until FIFO is empty before turning off the channel
+ struct cd1400 *cd = mp->mp_cd1400;
+ */
+
+ /* drop DTR and RTS */
+ (void)mtty_modem_control(mp, 0, DMSET);
+
+ /* turn off the channel
+ cd1400_write_reg(cd, CD1400_CAR, mp->mp_channel);
+ cd1400_write_ccr(cd, CD1400_CCR_CMDRESET);
+ */
+ }
+
+ splx(s);
+ ttyclose(tp);
+
+ return (0);
+}
+
+/*
+ * Read routine
+ */
+int
+mttyread(dev, uio, flags)
+ dev_t dev;
+ struct uio *uio;
+ int flags;
+{
+ struct mtty_softc *ms = mtty_cd.cd_devs[MAGMA_CARD(dev)];
+ struct mtty_port *mp = &ms->ms_port[MAGMA_PORT(dev)];
+ struct tty *tp = mp->mp_tty;
+
+ return ((*linesw[tp->t_line].l_read)(tp, uio, flags));
+}
+
+/*
+ * Write routine
+ */
+int
+mttywrite(dev, uio, flags)
+ dev_t dev;
+ struct uio *uio;
+ int flags;
+{
+ struct mtty_softc *ms = mtty_cd.cd_devs[MAGMA_CARD(dev)];
+ struct mtty_port *mp = &ms->ms_port[MAGMA_PORT(dev)];
+ struct tty *tp = mp->mp_tty;
+
+ return ((*linesw[tp->t_line].l_write)(tp, uio, flags));
+}
+
+/*
+ * return tty pointer
+ */
+struct tty *
+mttytty(dev)
+ dev_t dev;
+{
+ struct mtty_softc *ms = mtty_cd.cd_devs[MAGMA_CARD(dev)];
+ struct mtty_port *mp = &ms->ms_port[MAGMA_PORT(dev)];
+
+ return (mp->mp_tty);
+}
+
+/*
+ * ioctl routine
+ */
+int
+mttyioctl(dev, cmd, data, flags, p)
+ dev_t dev;
+ u_long cmd;
+ caddr_t data;
+ int flags;
+ struct proc *p;
+{
+ struct mtty_softc *ms = mtty_cd.cd_devs[MAGMA_CARD(dev)];
+ struct mtty_port *mp = &ms->ms_port[MAGMA_PORT(dev)];
+ struct tty *tp = mp->mp_tty;
+ int error;
+
+ error = (*linesw[tp->t_line].l_ioctl)(tp, cmd, data, flags, p);
+ if (error >= 0)
+ return (error);
+
+ error = ttioctl(tp, cmd, data, flags, p);
+ if (error >= 0)
+ return (error);
+
+ error = 0;
+
+ switch(cmd) {
+ case TIOCSBRK: /* set break */
+ SET(mp->mp_flags, MTTYF_SET_BREAK);
+ cd1400_enable_transmitter(mp->mp_cd1400, mp->mp_channel);
+ break;
+
+ case TIOCCBRK: /* clear break */
+ SET(mp->mp_flags, MTTYF_CLR_BREAK);
+ cd1400_enable_transmitter(mp->mp_cd1400, mp->mp_channel);
+ break;
+
+ case TIOCSDTR: /* set DTR */
+ mtty_modem_control(mp, TIOCM_DTR, DMBIS);
+ break;
+
+ case TIOCCDTR: /* clear DTR */
+ mtty_modem_control(mp, TIOCM_DTR, DMBIC);
+ break;
+
+ case TIOCMSET: /* set modem lines */
+ mtty_modem_control(mp, *((int *)data), DMSET);
+ break;
+
+ case TIOCMBIS: /* bit set modem lines */
+ mtty_modem_control(mp, *((int *)data), DMBIS);
+ break;
+
+ case TIOCMBIC: /* bit clear modem lines */
+ mtty_modem_control(mp, *((int *)data), DMBIC);
+ break;
+
+ case TIOCMGET: /* get modem lines */
+ *((int *)data) = mtty_modem_control(mp, 0, DMGET);
+ break;
+
+ case TIOCGFLAGS:
+ *((int *)data) = mp->mp_openflags;
+ break;
+
+ case TIOCSFLAGS:
+ if (suser(p->p_ucred, &p->p_acflag))
+ error = EPERM;
+ else
+ mp->mp_openflags = *((int *)data) &
+ (TIOCFLAG_SOFTCAR | TIOCFLAG_CLOCAL |
+ TIOCFLAG_CRTSCTS | TIOCFLAG_MDMBUF);
+ break;
+
+ default:
+ error = ENOTTY;
+ }
+
+ return (error);
+}
+
+/*
+ * Stop output, e.g., for ^S or output flush.
+ */
+int
+mttystop(tp, flags)
+ struct tty *tp;
+ int flags;
+{
+ struct mtty_softc *ms = mtty_cd.cd_devs[MAGMA_CARD(tp->t_dev)];
+ struct mtty_port *mp = &ms->ms_port[MAGMA_PORT(tp->t_dev)];
+ int s;
+
+ s = spltty();
+
+ if (ISSET(tp->t_state, TS_BUSY)) {
+ if (!ISSET(tp->t_state, TS_TTSTOP))
+ SET(tp->t_state, TS_FLUSH);
+
+ /*
+ * the transmit interrupt routine will disable transmit when it
+ * notices that MTTYF_STOP has been set.
+ */
+ SET(mp->mp_flags, MTTYF_STOP);
+ }
+
+ splx(s);
+ return (0);
+}
+
+/*
+ * Start output, after a stop.
+ */
+void
+mtty_start(tp)
+ struct tty *tp;
+{
+ struct mtty_softc *ms = mtty_cd.cd_devs[MAGMA_CARD(tp->t_dev)];
+ struct mtty_port *mp = &ms->ms_port[MAGMA_PORT(tp->t_dev)];
+ int s;
+
+ s = spltty();
+
+ /* we only need to do something if we are not already busy
+ * or delaying or stopped
+ */
+ if (!ISSET(tp->t_state, TS_TTSTOP | TS_TIMEOUT | TS_BUSY)) {
+
+ /* if we are sleeping and output has drained below
+ * low water mark, awaken
+ */
+ if (tp->t_outq.c_cc <= tp->t_lowat) {
+ if (ISSET(tp->t_state, TS_ASLEEP)) {
+ CLR(tp->t_state, TS_ASLEEP);
+ wakeup(&tp->t_outq);
+ }
+
+ selwakeup(&tp->t_wsel);
+ }
+
+ /* if something to send, start transmitting
+ */
+ if (tp->t_outq.c_cc) {
+ mp->mp_txc = ndqb(&tp->t_outq, 0);
+ mp->mp_txp = tp->t_outq.c_cf;
+ SET(tp->t_state, TS_BUSY);
+ cd1400_enable_transmitter(mp->mp_cd1400, mp->mp_channel);
+ }
+ }
+
+ splx(s);
+}
+
+/*
+ * set/get modem line status
+ *
+ * bits can be: TIOCM_DTR, TIOCM_RTS, TIOCM_CTS, TIOCM_CD, TIOCM_RI, TIOCM_DSR
+ *
+ * note that DTR and RTS lines are exchanged, and that DSR is
+ * not available on the LC2+1Sp card (used as CD)
+ *
+ * only let them fiddle with RTS if CRTSCTS is not enabled
+ */
+int
+mtty_modem_control(mp, bits, howto)
+ struct mtty_port *mp;
+ int bits;
+ int howto;
+{
+ struct cd1400 *cd = mp->mp_cd1400;
+ struct tty *tp = mp->mp_tty;
+ int s, msvr;
+
+ s = spltty();
+
+ cd1400_write_reg(cd, CD1400_CAR, mp->mp_channel);
+
+ switch(howto) {
+ case DMGET: /* get bits */
+ bits = 0;
+
+ bits |= TIOCM_LE;
+
+ msvr = cd1400_read_reg(cd, CD1400_MSVR1);
+ if (msvr & CD1400_MSVR1_RTS)
+ bits |= TIOCM_DTR;
+
+ msvr = cd1400_read_reg(cd, CD1400_MSVR2);
+ if (msvr & CD1400_MSVR2_DTR)
+ bits |= TIOCM_RTS;
+ if (msvr & CD1400_MSVR2_CTS)
+ bits |= TIOCM_CTS;
+ if (msvr & CD1400_MSVR2_RI)
+ bits |= TIOCM_RI;
+ if (msvr & CD1400_MSVR2_DSR)
+ bits |= (cd->cd_parmode ? TIOCM_CD : TIOCM_DSR);
+ if (msvr & CD1400_MSVR2_CD)
+ bits |= (cd->cd_parmode ? 0 : TIOCM_CD);
+
+ break;
+
+ case DMSET: /* reset bits */
+ if (!ISSET(tp->t_cflag, CRTSCTS))
+ cd1400_write_reg(cd, CD1400_MSVR2,
+ ((bits & TIOCM_RTS) ? CD1400_MSVR2_DTR : 0));
+
+ cd1400_write_reg(cd, CD1400_MSVR1,
+ ((bits & TIOCM_DTR) ? CD1400_MSVR1_RTS : 0));
+
+ break;
+
+ case DMBIS: /* set bits */
+ if ((bits & TIOCM_RTS) && !ISSET(tp->t_cflag, CRTSCTS))
+ cd1400_write_reg(cd, CD1400_MSVR2, CD1400_MSVR2_DTR);
+
+ if (bits & TIOCM_DTR)
+ cd1400_write_reg(cd, CD1400_MSVR1, CD1400_MSVR1_RTS);
+
+ break;
+
+ case DMBIC: /* clear bits */
+ if ((bits & TIOCM_RTS) && !ISSET(tp->t_cflag, CRTSCTS))
+ cd1400_write_reg(cd, CD1400_MSVR2, 0);
+
+ if (bits & TIOCM_DTR)
+ cd1400_write_reg(cd, CD1400_MSVR1, 0);
+
+ break;
+ }
+
+ splx(s);
+ return (bits);
+}
+
+/*
+ * Set tty parameters, returns error or 0 on success
+ */
+int
+mtty_param(tp, t)
+ struct tty *tp;
+ struct termios *t;
+{
+ struct mtty_softc *ms = mtty_cd.cd_devs[MAGMA_CARD(tp->t_dev)];
+ struct mtty_port *mp = &ms->ms_port[MAGMA_PORT(tp->t_dev)];
+ struct cd1400 *cd = mp->mp_cd1400;
+ int rbpr, tbpr, rcor, tcor;
+ u_char mcor1 = 0, mcor2 = 0;
+ int s, opt;
+
+ if (t->c_ospeed && cd1400_compute_baud(t->c_ospeed, cd->cd_clock, &tcor, &tbpr))
+ return (EINVAL);
+
+ if (t->c_ispeed && cd1400_compute_baud(t->c_ispeed, cd->cd_clock, &rcor, &rbpr))
+ return (EINVAL);
+
+ s = spltty();
+
+ /* hang up the line if ospeed is zero, else raise DTR */
+ (void)mtty_modem_control(mp, TIOCM_DTR, (t->c_ospeed == 0 ? DMBIC : DMBIS));
+
+ /* select channel, done in mtty_modem_control() */
+ /* cd1400_write_reg(cd, CD1400_CAR, mp->mp_channel); */
+
+ /* set transmit speed */
+ if (t->c_ospeed) {
+ cd1400_write_reg(cd, CD1400_TCOR, tcor);
+ cd1400_write_reg(cd, CD1400_TBPR, tbpr);
+ }
+
+ /* set receive speed */
+ if (t->c_ispeed) {
+ cd1400_write_reg(cd, CD1400_RCOR, rcor);
+ cd1400_write_reg(cd, CD1400_RBPR, rbpr);
+ }
+
+ /* enable transmitting and receiving on this channel */
+ opt = CD1400_CCR_CMDCHANCTL | CD1400_CCR_XMTEN | CD1400_CCR_RCVEN;
+ cd1400_write_ccr(cd, opt);
+
+ /* set parity, data and stop bits */
+ opt = 0;
+ if (ISSET(t->c_cflag, PARENB))
+ opt |= (ISSET(t->c_cflag, PARODD) ? CD1400_COR1_PARODD : CD1400_COR1_PARNORMAL);
+
+ if (!ISSET(t->c_iflag, INPCK))
+ opt |= CD1400_COR1_NOINPCK; /* no parity checking */
+
+ if (ISSET(t->c_cflag, CSTOPB))
+ opt |= CD1400_COR1_STOP2;
+
+ switch( t->c_cflag & CSIZE) {
+ case CS5:
+ opt |= CD1400_COR1_CS5;
+ break;
+
+ case CS6:
+ opt |= CD1400_COR1_CS6;
+ break;
+
+ case CS7:
+ opt |= CD1400_COR1_CS7;
+ break;
+
+ default:
+ opt |= CD1400_COR1_CS8;
+ break;
+ }
+
+ cd1400_write_reg(cd, CD1400_COR1, opt);
+
+ /*
+ * enable Embedded Transmit Commands (for breaks)
+ * use the CD1400 automatic CTS flow control if CRTSCTS is set
+ */
+ opt = CD1400_COR2_ETC;
+ if (ISSET(t->c_cflag, CRTSCTS))
+ opt |= CD1400_COR2_CCTS_OFLOW;
+ cd1400_write_reg(cd, CD1400_COR2, opt);
+
+ cd1400_write_reg(cd, CD1400_COR3, MTTY_RX_FIFO_THRESHOLD);
+
+ cd1400_write_ccr(cd, CD1400_CCR_CMDCORCHG | CD1400_CCR_COR1 | CD1400_CCR_COR2 | CD1400_CCR_COR3);
+
+ cd1400_write_reg(cd, CD1400_COR4, CD1400_COR4_PFO_EXCEPTION);
+ cd1400_write_reg(cd, CD1400_COR5, 0);
+
+ /*
+ * if automatic RTS handshaking enabled, set DTR threshold
+ * (RTS and DTR lines are switched, CD1400 thinks its DTR)
+ */
+ if (ISSET(t->c_cflag, CRTSCTS))
+ mcor1 = MTTY_RX_DTR_THRESHOLD;
+
+ /* set up `carrier detect' interrupts */
+ if (cd->cd_parmode) {
+ SET(mcor1, CD1400_MCOR1_DSRzd);
+ SET(mcor2, CD1400_MCOR2_DSRod);
+ } else {
+ SET(mcor1, CD1400_MCOR1_CDzd);
+ SET(mcor2, CD1400_MCOR2_CDod);
+ }
+
+ cd1400_write_reg(cd, CD1400_MCOR1, mcor1);
+ cd1400_write_reg(cd, CD1400_MCOR2, mcor2);
+
+ /* receive timeout 2ms */
+ cd1400_write_reg(cd, CD1400_RTPR, 2);
+
+ splx(s);
+ return (0);
+}
+
+/************************************************************************
+ *
+ * MBPP Routines
+ *
+ * mbpp_match match one mbpp device
+ * mbpp_attach attach mbpp devices
+ * mbppopen open mbpp device
+ * mbppclose close mbpp device
+ * mbppread read from mbpp
+ * mbppwrite write to mbpp
+ * mbppioctl do ioctl on mbpp
+ * mbppselect do select on mbpp
+ * mbpp_rw general rw routine
+ * mbpp_timeout rw timeout
+ * mbpp_start rw start after delay
+ * mbpp_send send data
+ * mbpp_recv recv data
+ */
+
+int
+mbpp_match(parent, vcf, args)
+ struct device *parent;
+ void *vcf, *args;
+{
+ struct magma_softc *sc = (struct magma_softc *)parent;
+
+ return (args == mbpp_match && sc->ms_board->mb_npar &&
+ sc->ms_mbpp == NULL);
+}
+
+void
+mbpp_attach(parent, dev, args)
+ struct device *parent;
+ struct device *dev;
+ void *args;
+{
+ struct magma_softc *sc = (struct magma_softc *)parent;
+ struct mbpp_softc *ms = (struct mbpp_softc *)dev;
+ struct mbpp_port *mp;
+ int port;
+
+ sc->ms_mbpp = ms;
+ dprintf((" addr 0x%x", ms));
+
+ for (port = 0 ; port < sc->ms_board->mb_npar ; port++) {
+ mp = &ms->ms_port[port];
+
+ if (sc->ms_ncd1190)
+ mp->mp_cd1190 = &sc->ms_cd1190[port];
+ else
+ mp->mp_cd1400 = &sc->ms_cd1400[0];
+
+ timeout_set(&mp->mp_timeout_tmo, mbpp_timeout, mp);
+ timeout_set(&mp->mp_start_tmo, mbpp_start, mp);
+ }
+
+ ms->ms_nports = port;
+ printf(": %d port%s\n", port, port == 1 ? "" : "s");
+}
+
+/*
+ * open routine. returns zero if successful, else error code
+ */
+int
+mbppopen(dev, flags, mode, p)
+ dev_t dev;
+ int flags;
+ int mode;
+ struct proc *p;
+{
+ int card = MAGMA_CARD(dev);
+ int port = MAGMA_PORT(dev);
+ struct mbpp_softc *ms;
+ struct mbpp_port *mp;
+ int s;
+
+ if (card >= mbpp_cd.cd_ndevs || (ms = mbpp_cd.cd_devs[card]) == NULL || port >= ms->ms_nports)
+ return (ENXIO);
+
+ mp = &ms->ms_port[port];
+
+ s = spltty();
+ if (ISSET(mp->mp_flags, MBPPF_OPEN)) {
+ splx(s);
+ return (EBUSY);
+ }
+ SET(mp->mp_flags, MBPPF_OPEN);
+ splx(s);
+
+ /* set defaults */
+ mp->mp_burst = BPP_BURST;
+ mp->mp_timeout = mbpp_mstohz(BPP_TIMEOUT);
+ mp->mp_delay = mbpp_mstohz(BPP_DELAY);
+
+ /* init chips */
+ if (mp->mp_cd1400) { /* CD1400 */
+ struct cd1400 *cd = mp->mp_cd1400;
+
+ /* set up CD1400 channel */
+ s = spltty();
+ cd1400_write_reg(cd, CD1400_CAR, 0);
+ cd1400_write_ccr(cd, CD1400_CCR_CMDRESET);
+ cd1400_write_reg(cd, CD1400_LIVR, (1<<3));
+ splx(s);
+ } else { /* CD1190 */
+ mp->mp_flags = 0;
+ return (ENXIO);
+ }
+
+ return (0);
+}
+
+/*
+ * close routine. returns zero if successful, else error code
+ */
+int
+mbppclose(dev, flag, mode, p)
+ dev_t dev;
+ int flag;
+ int mode;
+ struct proc *p;
+{
+ struct mbpp_softc *ms = mbpp_cd.cd_devs[MAGMA_CARD(dev)];
+ struct mbpp_port *mp = &ms->ms_port[MAGMA_PORT(dev)];
+
+ mp->mp_flags = 0;
+ return (0);
+}
+
+/*
+ * Read routine
+ */
+int
+mbppread(dev, uio, flags)
+ dev_t dev;
+ struct uio *uio;
+ int flags;
+{
+ return (mbpp_rw(dev, uio));
+}
+
+/*
+ * Write routine
+ */
+int
+mbppwrite(dev, uio, flags)
+ dev_t dev;
+ struct uio *uio;
+ int flags;
+{
+ return (mbpp_rw(dev, uio));
+}
+
+/*
+ * ioctl routine
+ */
+int
+mbppioctl(dev, cmd, data, flags, p)
+ dev_t dev;
+ u_long cmd;
+ caddr_t data;
+ int flags;
+ struct proc *p;
+{
+ struct mbpp_softc *ms = mbpp_cd.cd_devs[MAGMA_CARD(dev)];
+ struct mbpp_port *mp = &ms->ms_port[MAGMA_PORT(dev)];
+ struct bpp_param *bp;
+ int error = 0;
+ int s;
+
+ switch(cmd) {
+ case BPPIOCSPARAM:
+ bp = (struct bpp_param *)data;
+ if (bp->bp_burst < BPP_BURST_MIN || bp->bp_burst > BPP_BURST_MAX ||
+ bp->bp_delay < BPP_DELAY_MIN || bp->bp_delay > BPP_DELAY_MIN) {
+ error = EINVAL;
+ } else {
+ mp->mp_burst = bp->bp_burst;
+ mp->mp_timeout = mbpp_mstohz(bp->bp_timeout);
+ mp->mp_delay = mbpp_mstohz(bp->bp_delay);
+ }
+ break;
+ case BPPIOCGPARAM:
+ bp = (struct bpp_param *)data;
+ bp->bp_burst = mp->mp_burst;
+ bp->bp_timeout = mbpp_hztoms(mp->mp_timeout);
+ bp->bp_delay = mbpp_hztoms(mp->mp_delay);
+ break;
+ case BPPIOCGSTAT:
+ /* XXX make this more generic */
+ s = spltty();
+ cd1400_write_reg(mp->mp_cd1400, CD1400_CAR, 0);
+ *(int *)data = cd1400_read_reg(mp->mp_cd1400, CD1400_PSVR);
+ splx(s);
+ break;
+ default:
+ error = ENOTTY;
+ }
+
+ return (error);
+}
+
+/*
+ * select routine
+ */
+int
+mbppselect(dev, rw, p)
+ dev_t dev;
+ int rw;
+ struct proc *p;
+{
+ return (ENODEV);
+}
+
+int
+mbpp_rw(dev, uio)
+ dev_t dev;
+ struct uio *uio;
+{
+ int card = MAGMA_CARD(dev);
+ int port = MAGMA_PORT(dev);
+ struct mbpp_softc *ms = mbpp_cd.cd_devs[card];
+ struct mbpp_port *mp = &ms->ms_port[port];
+ caddr_t buffer, ptr;
+ int buflen, cnt, len;
+ int s, error = 0;
+ int gotdata = 0;
+
+ if (uio->uio_resid == 0)
+ return (0);
+
+ buflen = min(uio->uio_resid, mp->mp_burst);
+ buffer = malloc(buflen, M_DEVBUF, M_WAITOK);
+
+ SET(mp->mp_flags, MBPPF_UIO);
+
+ /*
+ * start timeout, if needed
+ */
+ if (mp->mp_timeout > 0) {
+ SET(mp->mp_flags, MBPPF_TIMEOUT);
+ timeout_add(&mp->mp_timeout_tmo, mp->mp_timeout);
+ }
+
+ len = cnt = 0;
+ while (uio->uio_resid > 0) {
+ len = min(buflen, uio->uio_resid);
+ ptr = buffer;
+
+ if (uio->uio_rw == UIO_WRITE) {
+ error = uiomove(ptr, len, uio);
+ if (error) break;
+ }
+ again: /* goto bad */
+ /* timed out? */
+ if (!ISSET(mp->mp_flags, MBPPF_UIO))
+ break;
+
+ /*
+ * perform the operation
+ */
+ if (uio->uio_rw == UIO_WRITE) {
+ cnt = mbpp_send(mp, ptr, len);
+ } else {
+ cnt = mbpp_recv(mp, ptr, len);
+ }
+
+ if (uio->uio_rw == UIO_READ) {
+ if (cnt) {
+ error = uiomove(ptr, cnt, uio);
+ if (error) break;
+ gotdata++;
+ }
+ else if (gotdata) /* consider us done */
+ break;
+ }
+
+ /* timed out? */
+ if (!ISSET(mp->mp_flags, MBPPF_UIO))
+ break;
+
+ /*
+ * poll delay?
+ */
+ if (mp->mp_delay > 0) {
+ s = spltty(); /* XXX */
+ SET(mp->mp_flags, MBPPF_DELAY);
+ timeout_add(&mp->mp_start_tmo, mp->mp_delay);
+ error = tsleep(mp, PCATCH | PZERO, "mbppdelay", 0);
+ splx(s);
+ if (error) break;
+ }
+
+ /*
+ * don't call uiomove again until we used all the data we grabbed
+ */
+ if (uio->uio_rw == UIO_WRITE && cnt != len) {
+ ptr += cnt;
+ len -= cnt;
+ cnt = 0;
+ goto again;
+ }
+ }
+
+ /*
+ * clear timeouts
+ */
+ s = spltty(); /* XXX */
+ if (ISSET(mp->mp_flags, MBPPF_TIMEOUT)) {
+ timeout_del(&mp->mp_timeout_tmo);
+ CLR(mp->mp_flags, MBPPF_TIMEOUT);
+ }
+ if (ISSET(mp->mp_flags, MBPPF_DELAY)) {
+ timeout_del(&mp->mp_start_tmo);
+ CLR(mp->mp_flags, MBPPF_DELAY);
+ }
+ splx(s);
+
+ /*
+ * adjust for those chars that we uiomoved but never actually wrote
+ */
+ if (uio->uio_rw == UIO_WRITE && cnt != len) {
+ uio->uio_resid += (len - cnt);
+ }
+
+ free(buffer, M_DEVBUF);
+ return (error);
+}
+
+void
+mbpp_timeout(arg)
+ void *arg;
+{
+ struct mbpp_port *mp = arg;
+
+ CLR(mp->mp_flags, MBPPF_UIO | MBPPF_TIMEOUT);
+ wakeup(mp);
+}
+
+void
+mbpp_start(arg)
+ void *arg;
+{
+ struct mbpp_port *mp = arg;
+
+ CLR(mp->mp_flags, MBPPF_DELAY);
+ wakeup(mp);
+}
+
+int
+mbpp_send(mp, ptr, len)
+ struct mbpp_port *mp;
+ caddr_t ptr;
+ int len;
+{
+ int s;
+ struct cd1400 *cd = mp->mp_cd1400;
+
+ /* set up io information */
+ mp->mp_ptr = ptr;
+ mp->mp_cnt = len;
+
+ /* start transmitting */
+ s = spltty();
+ if (cd) {
+ cd1400_write_reg(cd, CD1400_CAR, 0);
+
+ /* output strobe width ~1microsecond */
+ cd1400_write_reg(cd, CD1400_TBPR, 10);
+
+ /* enable channel */
+ cd1400_write_ccr(cd, CD1400_CCR_CMDCHANCTL | CD1400_CCR_XMTEN);
+ cd1400_write_reg(cd, CD1400_SRER, CD1400_SRER_TXRDY);
+ }
+
+ /* ZZzzz... */
+ tsleep(mp, PCATCH | PZERO, "mbpp_send", 0);
+
+ /* stop transmitting */
+ if (cd) {
+ cd1400_write_reg(cd, CD1400_CAR, 0);
+
+ /* disable transmitter */
+ cd1400_write_reg(cd, CD1400_SRER, 0);
+ cd1400_write_ccr(cd, CD1400_CCR_CMDCHANCTL | CD1400_CCR_XMTDIS);
+
+ /* flush fifo */
+ cd1400_write_ccr(cd, CD1400_CCR_CMDRESET | CD1400_CCR_FTF);
+ }
+ splx(s);
+
+ /* return number of chars sent */
+ return (len - mp->mp_cnt);
+}
+
+int
+mbpp_recv(mp, ptr, len)
+ struct mbpp_port *mp;
+ caddr_t ptr;
+ int len;
+{
+ int s;
+ struct cd1400 *cd = mp->mp_cd1400;
+
+ /* set up io information */
+ mp->mp_ptr = ptr;
+ mp->mp_cnt = len;
+
+ /* start receiving */
+ s = spltty();
+ if (cd) {
+ int rcor, rbpr;
+
+ cd1400_write_reg(cd, CD1400_CAR, 0);
+
+ /* input strobe at 100kbaud (10microseconds) */
+ cd1400_compute_baud(100000, cd->cd_clock, &rcor, &rbpr);
+ cd1400_write_reg(cd, CD1400_RCOR, rcor);
+ cd1400_write_reg(cd, CD1400_RBPR, rbpr);
+
+ /* rx threshold */
+ cd1400_write_reg(cd, CD1400_COR3, MBPP_RX_FIFO_THRESHOLD);
+ cd1400_write_ccr(cd, CD1400_CCR_CMDCORCHG | CD1400_CCR_COR3);
+
+ /* enable channel */
+ cd1400_write_ccr(cd, CD1400_CCR_CMDCHANCTL | CD1400_CCR_RCVEN);
+ cd1400_write_reg(cd, CD1400_SRER, CD1400_SRER_RXDATA);
+ }
+
+ /* ZZzzz... */
+ tsleep(mp, PCATCH | PZERO, "mbpp_recv", 0);
+
+ /* stop receiving */
+ if (cd) {
+ cd1400_write_reg(cd, CD1400_CAR, 0);
+
+ /* disable receiving */
+ cd1400_write_reg(cd, CD1400_SRER, 0);
+ cd1400_write_ccr(cd, CD1400_CCR_CMDCHANCTL | CD1400_CCR_RCVDIS);
+ }
+ splx(s);
+
+ /* return number of chars received */
+ return (len - mp->mp_cnt);
+}
+
+int
+mbpp_hztoms(h)
+ int h;
+{
+ int m = h;
+
+ if (m > 0)
+ m = m * 1000 / hz;
+ return (m);
+}
+
+int
+mbpp_mstohz(m)
+ int m;
+{
+ int h = m;
+
+ if (h > 0) {
+ h = h * hz / 1000;
+ if (h == 0)
+ h = 1000 / hz;
+ }
+ return (h);
+}
+
+#endif /* NMAGMA */
diff --git a/sys/dev/sbus/magmareg.h b/sys/dev/sbus/magmareg.h
new file mode 100644
index 00000000000..e4228dd930a
--- /dev/null
+++ b/sys/dev/sbus/magmareg.h
@@ -0,0 +1,236 @@
+/* $OpenBSD: magmareg.h,v 1.1 2002/01/12 20:19:40 jason Exp $ */
+
+/* magmareg.h
+ *
+ * Copyright (c) 1998 Iain Hibbert
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * 1. Redistributions of source code must retain the above copyright
+ * notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ * notice, this list of conditions and the following disclaimer in the
+ * documentation and/or other materials provided with the distribution.
+ * 3. All advertising materials mentioning features or use of this software
+ * must display the following acknowledgement:
+ * This product includes software developed by Iain Hibbert
+ * 4. The name of the author may not be used to endorse or promote products
+ * derived from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
+ * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
+ * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
+ * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
+ * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
+ * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
+ * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
+ * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ *
+ */
+
+#ifdef MAGMA_DEBUG
+#define dprintf(x) printf x
+#else
+#define dprintf(x)
+#endif
+
+/* The mapping of minor device number -> card and port is done as
+ * follows by default:
+ *
+ * +---+---+---+---+---+---+---+---+
+ * | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
+ * +---+---+---+---+---+---+---+---+
+ * | | | | | | | |
+ * | | | | +---+---+---+---> port number
+ * | | | |
+ * | | | +-------------------> dialout (on tty ports)
+ * | | |
+ * | | +-----------------------> unused
+ * | |
+ * +---+---------------------------> card number
+ *
+ */
+
+#define MAGMA_MAX_CARDS 4
+#define MAGMA_MAX_TTY 16
+#define MAGMA_MAX_BPP 2
+#define MAGMA_MAX_CD1400 4
+#define MAGMA_MAX_CD1190 2
+
+#define MAGMA_CARD(x) ((minor(x) >> 6) & 0x03)
+#define MAGMA_PORT(x) (minor(x) & 0x0f)
+
+#define MTTY_DIALOUT(x) (minor(x) & 0x10)
+
+/*
+ * Supported Card Types
+ */
+struct magma_board_info {
+ char *mb_name; /* cardname to match against */
+ char *mb_realname; /* english card name */
+ int mb_nser; /* number of serial ports */
+ int mb_npar; /* number of parallel ports */
+ int mb_ncd1400; /* number of CD1400 chips */
+ int mb_svcackr; /* svcackr offset */
+ int mb_svcackt; /* svcackt offset */
+ int mb_svcackm; /* svcackm offset */
+ int mb_cd1400[MAGMA_MAX_CD1400];/* cd1400 chip register offsets */
+ int mb_ncd1190; /* number of CD1190 chips */
+ int mb_cd1190[MAGMA_MAX_CD1190];/* cd1190 chip register offsets */
+};
+
+/*
+ * cd1400 chip data
+ */
+struct cd1400 {
+ bus_space_handle_t cd_regh; /* chip register handle */
+ bus_space_tag_t cd_regt; /* chip register tag */
+ int cd_chiprev; /* chip revision */
+ int cd_clock; /* clock speed in Mhz */
+ int cd_parmode; /* parallel mode operation */
+};
+
+/*
+ * cd1190 chip data
+ */
+struct cd1190 {
+ __volatile u_char *cd_reg; /* chip registers */
+ int cd_chiprev; /* chip revision */
+};
+
+/* software state for each card */
+struct magma_softc {
+ struct device ms_dev; /* required. must be first in softc */
+
+ /* cd1400 chip info */
+ int ms_ncd1400;
+ struct cd1400 ms_cd1400[MAGMA_MAX_CD1400];
+ void *sc_ih; /* interrupt vector */
+ void *sc_sih; /* softintr vector */
+ bus_space_tag_t sc_bustag;
+ bus_space_handle_t sc_iohandle; /* whole card registers */
+ bus_space_handle_t sc_svcackrh; /* CD1400 service acknowledge receive */
+ bus_space_handle_t sc_svcackth; /* CD1400 service acknowledge transmit */
+ bus_space_handle_t sc_svcackmh; /* CD1400 service acknowledge modem */
+
+ /* cd1190 chip info */
+ int ms_ncd1190;
+ struct cd1190 ms_cd1190[MAGMA_MAX_CD1190];
+
+ struct magma_board_info *ms_board; /* what am I? */
+
+ struct mtty_softc *ms_mtty;
+ struct mbpp_softc *ms_mbpp;
+
+ struct intrhand ms_hardint; /* hard interrupt handler */
+ struct intrhand ms_softint; /* soft interrupt handler */
+};
+
+#define MTTY_RBUF_SIZE (2 * 512)
+#define MTTY_RX_FIFO_THRESHOLD 6
+#define MTTY_RX_DTR_THRESHOLD 9
+
+struct mtty_port {
+ struct cd1400 *mp_cd1400; /* ptr to chip */
+ int mp_channel; /* and channel */
+ struct tty *mp_tty;
+
+ int mp_openflags; /* default tty flags */
+ int mp_flags; /* port flags */
+ int mp_carrier; /* state of carrier */
+
+ u_char *mp_rbuf; /* ring buffer start */
+ u_char *mp_rend; /* ring buffer end */
+ u_char *mp_rget; /* ring buffer read pointer */
+ u_char *mp_rput; /* ring buffer write pointer */
+
+ u_char *mp_txp; /* transmit character pointer */
+ int mp_txc; /* transmit character counter */
+};
+
+#define MTTYF_CARRIER_CHANGED (1<<0)
+#define MTTYF_SET_BREAK (1<<1)
+#define MTTYF_CLR_BREAK (1<<2)
+#define MTTYF_DONE (1<<3)
+#define MTTYF_STOP (1<<4)
+#define MTTYF_RING_OVERFLOW (1<<5)
+
+struct mtty_softc {
+ struct device ms_dev; /* device info */
+ int ms_nports; /* tty ports */
+ struct mtty_port ms_port[MAGMA_MAX_TTY];
+};
+
+#define MBPP_RX_FIFO_THRESHOLD 25
+
+struct mbpp_port {
+ struct cd1400 *mp_cd1400; /* for LC2+1Sp card */
+ struct cd1190 *mp_cd1190; /* all the others */
+
+ int mp_flags;
+
+ struct bpp_param mp_param;
+#define mp_burst mp_param.bp_burst
+#define mp_timeout mp_param.bp_timeout
+#define mp_delay mp_param.bp_delay
+
+ u_char *mp_ptr; /* pointer to io data */
+ int mp_cnt; /* count of io chars */
+
+ struct timeout mp_timeout_tmo; /* for mbpp_timeout() */
+ struct timeout mp_start_tmo; /* for mbpp_start() */
+};
+
+#define MBPPF_OPEN (1<<0)
+#define MBPPF_TIMEOUT (1<<1)
+#define MBPPF_UIO (1<<2)
+#define MBPPF_DELAY (1<<3)
+#define MBPPF_WAKEUP (1<<4)
+
+struct mbpp_softc {
+ struct device ms_dev; /* device info */
+ int ms_nports; /* parallel ports */
+ struct mbpp_port ms_port[MAGMA_MAX_BPP];
+};
+
+/*
+ * useful macros
+ */
+#define SET(t, f) ((t) |= (f))
+#define CLR(t, f) ((t) &= ~(f))
+#define ISSET(t, f) ((t) & (f))
+
+/* internal function prototypes */
+
+int cd1400_compute_baud __P((speed_t, int, int *, int *));
+__inline void cd1400_write_ccr __P((struct cd1400 *, u_char));
+__inline u_char cd1400_read_reg __P((struct cd1400 *, int));
+__inline void cd1400_write_reg __P((struct cd1400 *, int, u_char));
+void cd1400_enable_transmitter __P((struct cd1400 *, int));
+
+int magma_match __P((struct device *, void *, void *));
+void magma_attach __P((struct device *, struct device *, void *));
+int magma_hard __P((void *));
+void magma_soft __P((void *));
+
+int mtty_match __P((struct device *, void *, void *));
+void mtty_attach __P((struct device *, struct device *, void *));
+int mtty_modem_control __P((struct mtty_port *, int, int));
+int mtty_param __P((struct tty *, struct termios *));
+void mtty_start __P((struct tty *));
+
+int mbpp_match __P((struct device *, void *, void *));
+void mbpp_attach __P((struct device *, struct device *, void *));
+int mbpp_rw __P((dev_t, struct uio *));
+void mbpp_timeout __P((void *));
+void mbpp_start __P((void *));
+int mbpp_send __P((struct mbpp_port *, caddr_t, int));
+int mbpp_recv __P((struct mbpp_port *, caddr_t, int));
+int mbpp_hztoms __P((int));
+int mbpp_mstohz __P((int));
+
+#define CD1400_REGMAPSIZE 0x80