diff options
Diffstat (limited to 'sys')
-rw-r--r-- | sys/arch/sparc64/sparc64/cache.h | 8 | ||||
-rw-r--r-- | sys/arch/sparc64/sparc64/cpu.c | 8 | ||||
-rw-r--r-- | sys/arch/sparc64/sparc64/locore.s | 30 |
3 files changed, 38 insertions, 8 deletions
diff --git a/sys/arch/sparc64/sparc64/cache.h b/sys/arch/sparc64/sparc64/cache.h index 708b7d3a36c..f002f5b1039 100644 --- a/sys/arch/sparc64/sparc64/cache.h +++ b/sys/arch/sparc64/sparc64/cache.h @@ -1,4 +1,4 @@ -/* $OpenBSD: cache.h,v 1.3 2002/03/14 01:26:45 millert Exp $ */ +/* $OpenBSD: cache.h,v 1.4 2006/12/29 00:14:28 kettenis Exp $ */ /* $NetBSD: cache.h,v 1.3 2000/08/01 00:28:02 eeh Exp $ */ /* @@ -140,8 +140,10 @@ int cache_flush_page(paddr_t); /* flush page from E$ */ int cache_flush(vaddr_t, vsize_t); /* flush region */ /* The following two are for I$ and D$ flushes and are in locore.s */ -void dcache_flush_page(paddr_t); /* flush page from D$ */ void blast_vcache(void); /* Clear entire contents of I$ and D$ */ +#define dcache_flush_page(pa) cacheinfo.c_dcache_flush_page(pa) +void us_dcache_flush_page(paddr_t); /* flush page from D$ */ +void us3_dcache_flush_page(paddr_t); /* flush page from D$ */ /* The following flush a range from the D$ and I$ but not E$. */ void cache_flush_virt(vaddr_t, vsize_t); @@ -151,6 +153,8 @@ void cache_flush_phys(paddr_t, psize_t, int); * Cache control information. */ struct cacheinfo { + void (*c_dcache_flush_page)(paddr_t); + int c_totalsize; /* total size, in bytes */ /* if split, MAX(icache,dcache) */ int c_enabled; /* true => cache is enabled */ diff --git a/sys/arch/sparc64/sparc64/cpu.c b/sys/arch/sparc64/sparc64/cpu.c index 4e5d82a093c..3fc243c0c96 100644 --- a/sys/arch/sparc64/sparc64/cpu.c +++ b/sys/arch/sparc64/sparc64/cpu.c @@ -1,4 +1,4 @@ -/* $OpenBSD: cpu.c,v 1.15 2006/12/23 12:28:11 kettenis Exp $ */ +/* $OpenBSD: cpu.c,v 1.16 2006/12/29 00:14:28 kettenis Exp $ */ /* $NetBSD: cpu.c,v 1.13 2001/05/26 21:27:15 chs Exp $ */ /* @@ -67,7 +67,9 @@ #include <sparc64/sparc64/cache.h> /* This is declared here so that you must include a CPU for the cache code. */ -struct cacheinfo cacheinfo; +struct cacheinfo cacheinfo = { + us_dcache_flush_page +}; /* Our exported CPU info; we have only one for now. */ struct cpu_info cpu_info_store; @@ -277,6 +279,8 @@ cpu_attach(parent, dev, aux) stwa(pa, ASI_PHYS_CACHED, inst); flush((void *)KERNBASE); } + + cacheinfo.c_dcache_flush_page = us3_dcache_flush_page; } } diff --git a/sys/arch/sparc64/sparc64/locore.s b/sys/arch/sparc64/sparc64/locore.s index bc774ec95cd..75fa71c0b0c 100644 --- a/sys/arch/sparc64/sparc64/locore.s +++ b/sys/arch/sparc64/sparc64/locore.s @@ -1,4 +1,4 @@ -/* $OpenBSD: locore.s,v 1.66 2006/12/27 19:12:49 kettenis Exp $ */ +/* $OpenBSD: locore.s,v 1.67 2006/12/29 00:14:28 kettenis Exp $ */ /* $NetBSD: locore.s,v 1.137 2001/08/13 06:10:10 jdolecek Exp $ */ /* @@ -4827,10 +4827,10 @@ dlflush3: * */ .align 8 - .globl _C_LABEL(dcache_flush_page) + .globl _C_LABEL(us_dcache_flush_page) .proc 1 - FTYPE(dcache_flush_page) -_C_LABEL(dcache_flush_page): + FTYPE(us_dcache_flush_page) +_C_LABEL(us_dcache_flush_page): !! Try using cache_flush_phys for a change. @@ -4867,6 +4867,28 @@ dlflush4: retl membar #Sync + .align 8 + .globl _C_LABEL(us3_dcache_flush_page) + .proc 1 + FTYPE(us3_dcache_flush_page) +_C_LABEL(us3_dcache_flush_page): + ldxa [%g0] ASI_MCCR, %o1 + btst MCCR_DCACHE_EN, %o1 + bz,pn %icc, 1f + nop + sethi %hi(PAGE_SIZE), %o4 + or %g0, (PAGE_SIZE - 1), %o3 + andn %o0, %o3, %o0 +2: + subcc %o4, 32, %o4 + stxa %g0, [%o0 + %o4] ASI_DCACHE_INVALIDATE + membar #Sync + bne,pt %icc, 2b + nop +1: + retl + nop + /* * cache_flush_virt(va, len) * |