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-rw-r--r--sys/dev/mii/ciphy.c24
1 files changed, 12 insertions, 12 deletions
diff --git a/sys/dev/mii/ciphy.c b/sys/dev/mii/ciphy.c
index fda056fc830..a2db45be974 100644
--- a/sys/dev/mii/ciphy.c
+++ b/sys/dev/mii/ciphy.c
@@ -1,4 +1,4 @@
-/* $OpenBSD: ciphy.c,v 1.11 2006/02/28 12:37:15 jsg Exp $ */
+/* $OpenBSD: ciphy.c,v 1.12 2006/03/10 08:12:20 jsg Exp $ */
/* $FreeBSD: ciphy.c,v 1.1 2004/09/10 20:57:45 wpaul Exp $ */
/*
* Copyright (c) 2004
@@ -315,17 +315,23 @@ ciphy_status(struct mii_softc *sc)
mii->mii_media_active |= IFM_FDX;
}
+#define PHY_SETBIT(x, y, z) \
+ PHY_WRITE(x, y, (PHY_READ(x, y) | (z)))
+#define PHY_CLRBIT(x, y, z) \
+ PHY_WRITE(x, y, (PHY_READ(x, y) & ~(z)))
+
void
ciphy_reset(struct mii_softc *sc)
{
mii_phy_reset(sc);
DELAY(1000);
-}
-#define PHY_SETBIT(x, y, z) \
- PHY_WRITE(x, y, (PHY_READ(x, y) | (z)))
-#define PHY_CLRBIT(x, y, z) \
- PHY_WRITE(x, y, (PHY_READ(x, y) & ~(z)))
+ if (strcmp(sc->mii_dev.dv_parent->dv_cfdata->cf_driver->cd_name, "nfe") == 0) {
+ /* need to set for 2.5V RGMII for NVIDIA adapters */
+ PHY_SETBIT(sc, CIPHY_MII_ECTL1, CIPHY_INTSEL_RGMII);
+ PHY_SETBIT(sc, CIPHY_MII_ECTL1, CIPHY_IOVOL_2500MV);
+ }
+}
void
ciphy_fixup(struct mii_softc *sc)
@@ -337,12 +343,6 @@ ciphy_fixup(struct mii_softc *sc)
status = PHY_READ(sc, CIPHY_MII_AUXCSR);
speed = status & CIPHY_AUXCSR_SPEED;
- if (strcmp(sc->mii_dev.dv_parent->dv_cfdata->cf_driver->cd_name, "nfe") == 0) {
- /* need to set for 2.5V RGMII for NVIDIA adapters */
- PHY_SETBIT(sc, CIPHY_MII_ECTL1, CIPHY_INTSEL_RGMII);
- PHY_SETBIT(sc, CIPHY_MII_ECTL1, CIPHY_IOVOL_2500MV);
- }
-
switch (model) {
case MII_MODEL_CICADA_CS8201: