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-rw-r--r--sys/arch/m88k/m88k/db_sstep.c5
-rw-r--r--sys/arch/m88k/m88k/m88k_machdep.c6
-rw-r--r--sys/arch/mvme88k/mvme88k/locore.S20
3 files changed, 4 insertions, 27 deletions
diff --git a/sys/arch/m88k/m88k/db_sstep.c b/sys/arch/m88k/m88k/db_sstep.c
index a645ff52314..6fb585bb86f 100644
--- a/sys/arch/m88k/m88k/db_sstep.c
+++ b/sys/arch/m88k/m88k/db_sstep.c
@@ -1,4 +1,4 @@
-/* $OpenBSD: db_sstep.c,v 1.5 2006/05/03 18:12:52 miod Exp $ */
+/* $OpenBSD: db_sstep.c,v 1.6 2007/12/09 19:57:50 miod Exp $ */
/*
* Mach Operating System
* Copyright (c) 1993-1991 Carnegie Mellon University
@@ -257,8 +257,7 @@ db_clear_single_step(regs)
{
#ifdef M88110
if (CPU_IS88110) {
- /* do not remove PSR_SER as we don't enable OoO */
- regs->epsr &= ~PSR_TRACE;
+ regs->epsr &= ~(PSR_TRACE | PSR_SER);
}
#endif
#ifdef M88100
diff --git a/sys/arch/m88k/m88k/m88k_machdep.c b/sys/arch/m88k/m88k/m88k_machdep.c
index 4f2f01af9f5..2a8cd14b131 100644
--- a/sys/arch/m88k/m88k/m88k_machdep.c
+++ b/sys/arch/m88k/m88k/m88k_machdep.c
@@ -1,4 +1,4 @@
-/* $OpenBSD: m88k_machdep.c,v 1.38 2007/12/05 22:09:14 miod Exp $ */
+/* $OpenBSD: m88k_machdep.c,v 1.39 2007/12/09 19:57:50 miod Exp $ */
/*
* Copyright (c) 1998, 1999, 2000, 2001 Steve Murphree, Jr.
* Copyright (c) 1996 Nivas Madhur
@@ -136,10 +136,6 @@ setregs(p, pack, stack, retval)
* graphics unit, fp enabled
*/
tf->tf_epsr = PSR_SRM | PSR_SFD;
- /*
- * XXX disable OoO for now...
- */
- tf->tf_epsr |= PSR_SER;
}
#endif
#ifdef M88100
diff --git a/sys/arch/mvme88k/mvme88k/locore.S b/sys/arch/mvme88k/mvme88k/locore.S
index 0b9a04d0b7b..a8b44ff1bbb 100644
--- a/sys/arch/mvme88k/mvme88k/locore.S
+++ b/sys/arch/mvme88k/mvme88k/locore.S
@@ -1,4 +1,4 @@
-/* $OpenBSD: locore.S,v 1.58 2007/12/05 22:12:30 miod Exp $ */
+/* $OpenBSD: locore.S,v 1.59 2007/12/09 19:57:51 miod Exp $ */
/*
* Copyright (c) 2005, Miodrag Vallat.
* Copyright (c) 1998 Steve Murphree, Jr.
@@ -169,16 +169,7 @@ ASLOCAL(main_start)
set r11, r0, 1<PSR_SUPERVISOR_MODE_BIT>
set r11, r11, 1<PSR_INTERRUPT_DISABLE_BIT>
set r11, r11, 1<PSR_GRAPHICS_DISABLE_BIT>
- /*
- * XXX On 88110 processors, force serial instruction execution for now.
- * Situation where OoO would break will be hopefully taken care of in
- * the near future -- miod
- */
-#if 0
clr r11, r11, 1<PSR_SERIAL_MODE_BIT>
-#else
- set r11, r11, 1<PSR_SERIAL_MODE_BIT>
-#endif
set r11, r11, 1<PSR_SERIALIZE_BIT>
stcr r11, PSR
FLUSH_PIPELINE
@@ -264,16 +255,7 @@ GLOBAL(secondary_start)
set r11, r0, 1<PSR_SUPERVISOR_MODE_BIT>
set r11, r11, 1<PSR_INTERRUPT_DISABLE_BIT>
set r11, r11, 1<PSR_GRAPHICS_DISABLE_BIT>
- /*
- * XXX On 88110 processors, force serial instruction execution for now.
- * Situation where OoO would break will be hopefully taken care of in
- * the near future -- miod
- */
-#if 0
clr r11, r11, 1<PSR_SERIAL_MODE_BIT>
-#else
- set r11, r11, 1<PSR_SERIAL_MODE_BIT>
-#endif
set r11, r11, 1<PSR_SERIALIZE_BIT>
stcr r11, PSR
FLUSH_PIPELINE