diff options
Diffstat (limited to 'sys')
-rw-r--r-- | sys/arch/mvme88k/include/asm.h | 8 | ||||
-rw-r--r-- | sys/arch/mvme88k/include/autoconf.h | 47 | ||||
-rw-r--r-- | sys/arch/mvme88k/include/bugio.h | 8 | ||||
-rw-r--r-- | sys/arch/mvme88k/include/cpu.h | 27 | ||||
-rw-r--r-- | sys/arch/mvme88k/include/db_machdep.h | 6 | ||||
-rw-r--r-- | sys/arch/mvme88k/include/exception_vectors.h | 40 | ||||
-rw-r--r-- | sys/arch/mvme88k/include/frame.h | 307 | ||||
-rw-r--r-- | sys/arch/mvme88k/include/limits.h | 15 | ||||
-rw-r--r-- | sys/arch/mvme88k/include/locore.h | 1 | ||||
-rw-r--r-- | sys/arch/mvme88k/include/mioctl.h | 34 | ||||
-rw-r--r-- | sys/arch/mvme88k/include/param.h | 27 | ||||
-rw-r--r-- | sys/arch/mvme88k/include/pcctworeg.h | 262 | ||||
-rw-r--r-- | sys/arch/mvme88k/include/pmap.h | 2 | ||||
-rw-r--r-- | sys/arch/mvme88k/include/prom.h | 19 | ||||
-rw-r--r-- | sys/arch/mvme88k/include/pte.h | 156 | ||||
-rw-r--r-- | sys/arch/mvme88k/include/vmparam.h | 7 |
16 files changed, 813 insertions, 153 deletions
diff --git a/sys/arch/mvme88k/include/asm.h b/sys/arch/mvme88k/include/asm.h index 5caa321d774..b2500eb2d2b 100644 --- a/sys/arch/mvme88k/include/asm.h +++ b/sys/arch/mvme88k/include/asm.h @@ -36,7 +36,7 @@ /* Define EH_DEBUG to be non-zero to compile-in various debugging things */ #ifndef EH_DEBUG -#define EH_DEBUG 0 +#define EH_DEBUG 1 #endif EH_DEBUG #if 0 @@ -48,7 +48,7 @@ .align 8; .globl FUNC(NAME); FUNC(NAME): -#define LABEL(name) name:; .globl name ; +#define LABEL(name) name: .globl name ; /* * _LABEL(name) * Defines one visible only to the file, unless debugging @@ -102,7 +102,11 @@ * instruction always synchronizes, and this particular instruction * will never actually take the trap). */ +#if 0 +#define FLUSH_PIPELINE tcnd ne0, r0, 0 +#else #define FLUSH_PIPELINE tb1 0, r0, 0 +#endif #define NOP or r0, r0, r0 /* diff --git a/sys/arch/mvme88k/include/autoconf.h b/sys/arch/mvme88k/include/autoconf.h index c5220fad715..2888bbb9d4a 100644 --- a/sys/arch/mvme88k/include/autoconf.h +++ b/sys/arch/mvme88k/include/autoconf.h @@ -31,15 +31,34 @@ /* * Autoconfiguration information. */ + +#ifndef _MVME88K_AUTOCONF_H_ +#define _MVME88K_AUTOCONF_H_ + +#if 0 struct confargs { int ca_bustype; caddr_t ca_parent; caddr_t ca_vaddr; caddr_t ca_paddr; +#define ca_len ca_size int ca_size; int ca_ipl; int ca_vec; }; +#else +struct confargs { + int ca_bustype; + void *ca_vaddr; + void *ca_paddr; + int ca_offset; + int ca_len; + int ca_ipl; + int ca_vec; + char *ca_name; + void *ca_master; /* points to bus-dependent data */ +}; +#endif #define BUS_MAIN 0 #define BUS_MC 1 @@ -48,7 +67,35 @@ struct confargs { #define BUS_VMES 4 #define BUS_VMEL 5 +#if 0 +/* From mvme68k autoconf.h */ +#define BUS_MAIN 1 +#define BUS_PCC 2 /* VME147 PCC chip */ +#define BUS_MC 3 /* VME162 MC chip */ +#define BUS_PCCTWO 4 /* VME166/167/177 PCC2 chip */ +#define BUS_VMES 5 /* 16 bit VME access */ +#define BUS_VMEL 6 /* 32 bit VME access */ +#define BUS_IP 7 /* VME162 IP module bus */ + +#endif + int always_match __P((struct device *, struct cfdata *, void *)); #define DEVICE_UNIT(device) (device->dv_unit) #define CFDATA_LOC(cfdata) (cfdata->cf_loc) + +/* the following are from the prom/bootblocks */ +void *bootaddr; /* PA of boot device */ +int bootctrllun; /* ctrl_lun of boot device */ +int bootdevlun; /* dev_lun of boot device */ +int bootpart; /* boot partition (disk) */ + +struct device *bootdv; /* boot device */ + +/* PARTITIONSHIFT from disklabel.h */ +#define PARTITIONMASK ((1 << PARTITIONSHIFT) - 1) + +void *mapiodev __P((void *pa, int size)); +void unmapiodev __P((void *kva, int size)); + +#endif diff --git a/sys/arch/mvme88k/include/bugio.h b/sys/arch/mvme88k/include/bugio.h index 0bb026958dc..1811d98f3e3 100644 --- a/sys/arch/mvme88k/include/bugio.h +++ b/sys/arch/mvme88k/include/bugio.h @@ -61,10 +61,10 @@ struct bugniocall { #define NETCTRL_RX 3 #define NETCTRL_FLUSH 4 #define NETCTRL_RESET 5 - unsigned int cid; - unsigned int memaddr; - unsigned int nbytes; - unsigned int csword; + unsigned long cid; + unsigned long memaddr; + unsigned long nbytes; + unsigned long csword; }; char buginchr __P((void)); diff --git a/sys/arch/mvme88k/include/cpu.h b/sys/arch/mvme88k/include/cpu.h index 850b29ac35f..7b33d44b803 100644 --- a/sys/arch/mvme88k/include/cpu.h +++ b/sys/arch/mvme88k/include/cpu.h @@ -57,6 +57,7 @@ #include <machine/psl.h> #include <machine/pcb.h> +#include <machine/board.h> /* * definitions of cpu-dependent requirements @@ -86,9 +87,35 @@ extern intstack; #define CLKF_PC(framep) (((struct trapframe *)(framep))->sxip & ~3) #define CLKF_INTR(framep) (((struct trapframe *)(framep))->r[31] > intstack) +/* + * Internal IO space (iiomapsize). + * + * Internal IO space is mapped in the kernel from ``OBIO_START'' to + * ``intiolimit'' (defined in locore.s). Since it is always mapped, + * conversion between physical and kernel virtual addresses is easy. + */ + +#ifdef VIRTMAP +/* This will do non 1:1 phys/virt memory mapping in the future - SPM */ +#define ISIIOVA(va) \ + ((char *)(va) >= intiobase && (char *)(va) < intiolimit) +#define IIOV(pa) ((int)(pa)-(int)iiomapbase+(int)intiobase) +#define IIOP(va) ((int)(va)-(int)intiobase+(int)iiomapbase) +#define IIOPOFF(pa) ((int)(pa)-(int)iiomapbase) + +#else + +#define ISIIOVA(va) 1 +#define ackbarf ((char *)(va) >= OBIO_START && (char *)(va) < (OBIO_START + OBIO_SIZE)) +#define IIOV(pa) ((pa)) +#define IIOP(va) ((va)) +#define IIOPOFF(pa) ((int)(pa)-(int)OBIO_START) +#endif + #define SIR_NET 1 #define SIR_CLOCK 2 +#define setsoftint(x) (ssir |= (x)) #define setsoftnet() (ssir |= SIR_NET) #define setsoftclock() (ssir |= SIR_CLOCK) diff --git a/sys/arch/mvme88k/include/db_machdep.h b/sys/arch/mvme88k/include/db_machdep.h index 9bafbf30ddc..59020d3b57e 100644 --- a/sys/arch/mvme88k/include/db_machdep.h +++ b/sys/arch/mvme88k/include/db_machdep.h @@ -39,7 +39,7 @@ #include <vm/vm_prot.h> #include <vm/vm_param.h> #include <vm/vm_inherit.h> -#include <vm/lock.h> +/*#include <vm/lock.h>*/ #include <machine/pcb.h> /* m88100_saved_state */ #include <machine/psl.h> #include <machine/trap.h> @@ -96,8 +96,8 @@ extern int db_noisy; extern int quiet_db_read_bytes; /* These versions are not constantly doing SPL */ -#define cnmaygetc db_getc -#define cngetc db_getc +/*#define cnmaygetc db_getc*/ +/*#define cngetc db_getc*/ #define cnputc db_putc /* breakpoint/watchpoint foo */ diff --git a/sys/arch/mvme88k/include/exception_vectors.h b/sys/arch/mvme88k/include/exception_vectors.h index 5a9457fccb2..f2730ff78a3 100644 --- a/sys/arch/mvme88k/include/exception_vectors.h +++ b/sys/arch/mvme88k/include/exception_vectors.h @@ -24,21 +24,21 @@ * any improvements or extensions that they make and grant Carnegie the * rights to redistribute these changes. */ - #ifndef UNDEFINED -# define UNDEFINED unknown_handler +# define UNDEFINED _unknown_handler +/* vector 0x00 (#0) word _address_handler */ #endif -/* vector 0x00 (#0) */ word error_handler -/* vector 0x01 (#1) */ word interrupt_handler -/* vector 0x02 (#2) */ word instruction_access_handler -/* vector 0x03 (#3) */ word data_exception_handler -/* vector 0x04 (#4) */ word misaligned_handler -/* vector 0x05 (#5) */ word unimplemented_handler -/* vector 0x06 (#6) */ word privilege_handler -/* vector 0x07 (#7) */ word bounds_handler -/* vector 0x08 (#8) */ word divide_handler -/* vector 0x09 (#9) */ word overflow_handler -/* vector 0x0a (#10) */ word error_handler +/* vector 0x00 (#0) */ word _reset_handler +/* vector 0x01 (#1) */ word _interrupt_handler +/* vector 0x02 (#2) */ word _instruction_access_handler +/* vector 0x03 (#3) */ word _data_exception_handler +/* vector 0x04 (#4) */ word _misaligned_handler +/* vector 0x05 (#5) */ word _unimplemented_handler +/* vector 0x06 (#6) */ word _privilege_handler +/* vector 0x07 (#7) */ word _bounds_handler +/* vector 0x08 (#8) */ word _divide_handler +/* vector 0x09 (#9) */ word _overflow_handler +/* vector 0x0a (#10) */ word _error_handler /* vector 0x0b (#11) */ word UNDEFINED /* vector 0x0c (#12) */ word UNDEFINED /* vector 0x0d (#13) */ word UNDEFINED @@ -144,23 +144,23 @@ /* vector 0x71 (#113) */ word UNDEFINED /* vector 0x72 (#114) */ word fp_precise_handler /* vector 0x73 (#115) */ word fp_imprecise_handler -/* vector 0x74 (#116) */ word unimplemented_handler +/* vector 0x74 (#116) */ word _unimplemented_handler /* vector 0x75 (#117) */ word UNDEFINED -/* vector 0x76 (#118) */ word unimplemented_handler +/* vector 0x76 (#118) */ word _unimplemented_handler /* vector 0x77 (#119) */ word UNDEFINED -/* vector 0x78 (#120) */ word unimplemented_handler +/* vector 0x78 (#120) */ word _unimplemented_handler /* vector 0x79 (#121) */ word UNDEFINED -/* vector 0x7a (#122) */ word unimplemented_handler +/* vector 0x7a (#122) */ word _unimplemented_handler /* vector 0x7b (#123) */ word UNDEFINED -/* vector 0x7c (#124) */ word unimplemented_handler +/* vector 0x7c (#124) */ word _unimplemented_handler /* vector 0x7d (#125) */ word UNDEFINED -/* vector 0x7e (#126) */ word unimplemented_handler +/* vector 0x7e (#126) */ word _unimplemented_handler /* vector 0x7f (#127) */ word UNDEFINED /* vector 0x80 (#128) */ word _syscall_handler /* vector 0x81 (#129) */ word _syscall_handler /* vector 0x82 (#130) */ word break /* vector 0x83 (#131) */ word trace -/* vector 0x84 (#132) */ word entry +/* vector 0x84 (#132) */ word _entry #if defined(RAW_PRINTF) && RAW_PRINTF /* vector 0x85 (#133) */ word user_raw_putstr /* for USER raw_printf() */ /* vector 0x85 (#134) */ word user_raw_xpr /* for USER raw_xpr() */ diff --git a/sys/arch/mvme88k/include/frame.h b/sys/arch/mvme88k/include/frame.h new file mode 100644 index 00000000000..f1f3323e4bb --- /dev/null +++ b/sys/arch/mvme88k/include/frame.h @@ -0,0 +1,307 @@ +/* $OpenBSD: frame.h,v 1.1 1998/12/15 04:45:50 smurph Exp $ */ +/* $NetBSD: frame.h,v 1.15 1997/05/03 12:49:05 mycroft Exp $ */ + +/* + * Copyright (c) 1988 University of Utah. + * Copyright (c) 1982, 1990, 1993 + * The Regents of the University of California. All rights reserved. + * + * This code is derived from software contributed to Berkeley by + * the Systems Programming Group of the University of Utah Computer + * Science Department. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the distribution. + * 3. All advertising materials mentioning features or use of this software + * must display the following acknowledgement: + * This product includes software developed by the University of + * California, Berkeley and its contributors. + * 4. Neither the name of the University nor the names of its contributors + * may be used to endorse or promote products derived from this software + * without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND + * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE + * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE + * ARE DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE + * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL + * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS + * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) + * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY + * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF + * SUCH DAMAGE. + * + * from: Utah $Hdr: frame.h 1.8 92/12/20$ + * + * @(#)frame.h 8.1 (Berkeley) 6/10/93 + */ + +#ifndef _M68K_FRAME_H_ +#define _M68K_FRAME_H_ + +struct frame { + struct m88100_saved_state __attribute__((packed)) F_t; + union F_u { + struct fmt2 { + u_int f_iaddr; + } F_fmt2; + + struct fmt3 { + u_int f_ea; + } F_fmt3; + + struct fmt4 { + u_int f_fa; + u_int f_fslw; + /* for 060FP type 4 FP disabled frames: */ +#define f_fea f_fa +#define f_pcfi f_fslw + } F_fmt4; + + struct fmt7 { + u_int f_ea; + u_short f_ssw; + u_short f_wb3s, f_wb2s, f_wb1s; + u_int f_fa; + u_int f_wb3a, f_wb3d; + u_int f_wb2a, f_wb2d; + u_int f_wb1a, f_wb1d; +#define f_pd0 f_wb1d + u_int f_pd1, f_pd2, f_pd3; + } F_fmt7; + + struct fmt9 { + u_int f_iaddr; + u_short f_iregs[4]; + } F_fmt9; + + struct fmtA { + u_short f_ir0; + u_short f_ssw; + u_short f_ipsc; + u_short f_ipsb; + u_int f_dcfa; + u_short f_ir1, f_ir2; + u_int f_dob; + u_short f_ir3, f_ir4; + } F_fmtA; + + struct fmtB { + u_short f_ir0; + u_short f_ssw; + u_short f_ipsc; + u_short f_ipsb; + u_int f_dcfa; + u_short f_ir1, f_ir2; + u_int f_dob; + u_short f_ir3, f_ir4; + u_short f_ir5, f_ir6; + u_int f_sba; + u_short f_ir7, f_ir8; + u_int f_dib; + u_short f_iregs[22]; + } F_fmtB; + } F_u; +}; + +#define f_regs F_t.tf_regs +#define f_pad F_t.tf_pad +#define f_stackadj F_t.tf_stackadj +#define f_sr F_t.tf_sr +#define f_pc F_t.tf_pc +#define f_format F_t.tf_format +#define f_vector F_t.tf_vector +#define f_fmt2 F_u.F_fmt2 +#define f_fmt3 F_u.F_fmt3 +#define f_fmt4 F_u.F_fmt4 +#define f_fmt7 F_u.F_fmt7 +#define f_fmt9 F_u.F_fmt9 +#define f_fmtA F_u.F_fmtA +#define f_fmtB F_u.F_fmtB + +#if 0 +struct switchframe { + u_int sf_pc; +}; +#endif + +/* common frame size */ +#define CFSIZE (sizeof(struct frame) - sizeof(union F_u)) +#define NFMTSIZE 9 + +#define FMT0 0x0 +#define FMT1 0x1 +#define FMT2 0x2 +#define FMT3 0x3 +#define FMT4 0x4 +#define FMT7 0x7 +#define FMT9 0x9 +#define FMTA 0xA +#define FMTB 0xB + +/* frame specific info sizes */ +#define FMT0SIZE 0 +#define FMT1SIZE 0 +#define FMT2SIZE sizeof(struct fmt2) +#define FMT3SIZE sizeof(struct fmt3) +#define FMT4SIZE sizeof(struct fmt4) +#define FMT7SIZE sizeof(struct fmt7) +#define FMT9SIZE sizeof(struct fmt9) +#define FMTASIZE sizeof(struct fmtA) +#define FMTBSIZE sizeof(struct fmtB) + +#define V_BUSERR 0x008 +#define V_ADDRERR 0x00C +#define V_TRAP1 0x084 + +/* 68020/68030 SSW bits */ +#define SSW_RC 0x2000 +#define SSW_RB 0x1000 +#define SSW_DF 0x0100 +#define SSW_RM 0x0080 +#define SSW_RW 0x0040 +#define SSW_FCMASK 0x0007 + +/* 68040 SSW bits */ +#define SSW4_CP 0x8000 +#define SSW4_CU 0x4000 +#define SSW4_CT 0x2000 +#define SSW4_CM 0x1000 +#define SSW4_MA 0x0800 +#define SSW4_ATC 0x0400 +#define SSW4_LK 0x0200 +#define SSW4_RW 0x0100 +#define SSW4_WBSV 0x0080 /* really in WB status, not SSW */ +#define SSW4_SZMASK 0x0060 +#define SSW4_SZLW 0x0000 +#define SSW4_SZB 0x0020 +#define SSW4_SZW 0x0040 +#define SSW4_SZLN 0x0060 +#define SSW4_TTMASK 0x0018 +#define SSW4_TTNOR 0x0000 +#define SSW4_TTM16 0x0008 +#define SSW4_TMMASK 0x0007 +#define SSW4_TMDCP 0x0000 +#define SSW4_TMUD 0x0001 +#define SSW4_TMUC 0x0002 +#define SSW4_TMKD 0x0005 +#define SSW4_TMKC 0x0006 + +/* 060 Fault Status Long Word (FPSP) */ + +#define FSLW_MA 0x08000000 +#define FSLW_LK 0x02000000 +#define FSLW_RW 0x01800000 + +#define FSLW_RW_R 0x01000000 +#define FSLW_RW_W 0x00800000 + +#define FSLW_SIZE 0x00600000 +/* + * We better define the FSLW_SIZE values here, as the table given in the + * MC68060UM/AD rev. 0/1 p. 8-23 is wrong, and was corrected in the errata + * document. + */ +#define FSLW_SIZE_LONG 0x00000000 +#define FSLW_SIZE_BYTE 0x00200000 +#define FSLW_SIZE_WORD 0x00400000 +#define FSLW_SIZE_MV16 0x00600000 + +#define FLSW_TT 0x00180000 +#define FSLW_TM 0x00070000 +#define FSLW_TM_SV 0x00040000 + + + +#define FSLW_IO 0x00008000 +#define FSLW_PBE 0x00004000 +#define FSLW_SBE 0x00002000 +#define FSLW_PTA 0x00001000 +#define FSLW_PTB 0x00000800 +#define FSLW_IL 0x00000400 +#define FSLW_PF 0x00000200 +#define FSLW_SP 0x00000100 +#define FSLW_WP 0x00000080 +#define FSLW_TWE 0x00000040 +#define FSLW_RE 0x00000020 +#define FSLW_WE 0x00000010 +#define FSLW_TTR 0x00000008 +#define FSLW_BPE 0x00000004 +#define FSLW_SEE 0x00000001 + +struct fpframe { + union FPF_u1 { + u_int FPF_null; + struct { + u_char FPF_version; + u_char FPF_fsize; + u_short FPF_res1; + } FPF_nonnull; + } FPF_u1; + union FPF_u2 { + struct fpidle { + u_short fpf_ccr; + u_short fpf_res2; + u_int fpf_iregs1[8]; + u_int fpf_xops[3]; + u_int fpf_opreg; + u_int fpf_biu; + } FPF_idle; + + struct fpbusy { + u_int fpf_iregs[53]; + } FPF_busy; + + struct fpunimp { + u_int fpf_state[10]; + } FPF_unimp; + } FPF_u2; + u_int fpf_regs[8*3]; + u_int fpf_fpcr; + u_int fpf_fpsr; + u_int fpf_fpiar; +}; + +#define fpf_null FPF_u1.FPF_null +#define fpf_version FPF_u1.FPF_nonnull.FPF_version +#define fpf_fsize FPF_u1.FPF_nonnull.FPF_fsize +#define fpf_res1 FPF_u1.FPF_nonnull.FPF_res1 +#define fpf_idle FPF_u2.FPF_idle +#define fpf_busy FPF_u2.FPF_busy +#define fpf_unimp FPF_u2.FPF_unimp + +/* + * This is incompatible with the earlier one; expecially, an earlier frame + * must not be FRESTOREd on a 060 or vv, because a frame error exception is + * not guaranteed. + */ + + +struct fpframe060 { + u_short fpf6_excp_exp; + u_char fpf6_frmfmt; +#define FPF6_FMT_NULL 0x00 +#define FPF6_FMT_IDLE 0x60 +#define FPF6_FMT_EXCP 0xe0 + + u_char fpf6_v; +#define FPF6_V_BSUN 0 +#define FPF6_V_INEX12 1 +#define FPF6_V_DZ 2 +#define FPF6_V_UNFL 3 +#define FPF6_V_OPERR 4 +#define FPF6_V_OVFL 5 +#define FPF6_V_SNAN 6 +#define FPF6_V_UNSUP 7 + + u_long fpf6_upper, fpf6_lower; +}; + +#endif /* _M68K_FRAME_H_ */ diff --git a/sys/arch/mvme88k/include/limits.h b/sys/arch/mvme88k/include/limits.h index 87b56260be1..40be1ed4dfb 100644 --- a/sys/arch/mvme88k/include/limits.h +++ b/sys/arch/mvme88k/include/limits.h @@ -31,7 +31,7 @@ * SUCH DAMAGE. * * from: @(#)limits.h 8.3 (Berkeley) 1/4/94 - * $Id: limits.h,v 1.5 1998/03/22 21:15:18 millert Exp $ + * $Id: limits.h,v 1.6 1998/12/15 04:45:50 smurph Exp $ */ #ifndef _MACHINE_LIMITS_H_ @@ -87,4 +87,17 @@ #endif /* !_POSIX_SOURCE */ #endif /* !_ANSI_SOURCE */ +#if (!defined(_ANSI_SOURCE)&&!defined(_POSIX_SOURCE)) || defined(_XOPEN_SOURCE) +#define LONG_BIT 32 +#define WORD_BIT 32 + +#define DBL_DIG 15 +#define DBL_MAX 1.7976931348623157E+308 +#define DBL_MIN 2.2250738585072014E-308 + +#define FLT_DIG 6 +#define FLT_MAX 3.40282347E+38F +#define FLT_MIN 1.17549435E-38F +#endif + #endif /* _MACHINE_LIMITS_H_ */ diff --git a/sys/arch/mvme88k/include/locore.h b/sys/arch/mvme88k/include/locore.h index fba0a9457e9..8b673c20ecc 100644 --- a/sys/arch/mvme88k/include/locore.h +++ b/sys/arch/mvme88k/include/locore.h @@ -72,6 +72,7 @@ * hence to debuggers, and such). */ #define LABEL(name) name: global name NEWLINE + #if EH_DEBUG # define _LABEL(name) name: global name NEWLINE #else diff --git a/sys/arch/mvme88k/include/mioctl.h b/sys/arch/mvme88k/include/mioctl.h new file mode 100644 index 00000000000..3ee5f4746f5 --- /dev/null +++ b/sys/arch/mvme88k/include/mioctl.h @@ -0,0 +1,34 @@ +/* $OpenBSD: mioctl.h,v 1.1 1998/12/15 04:45:50 smurph Exp $ */ + +/* + * Copyright (c) 1995 Theo de Raadt + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the distribution. + * 3. All advertising materials mentioning features or use of this software + * must display the following acknowledgement: + * This product includes software developed under OpenBSD by + * Theo de Raadt for Willowglen Singapore. + * 4. The name of the author may not be used to endorse or promote products + * derived from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR + * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES + * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. + * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT + * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, + * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY + * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF + * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + */ + +#define MIOCGSIZ _IOR('m', 1, int) diff --git a/sys/arch/mvme88k/include/param.h b/sys/arch/mvme88k/include/param.h index 117b441ba31..ff24b77c0a7 100644 --- a/sys/arch/mvme88k/include/param.h +++ b/sys/arch/mvme88k/include/param.h @@ -38,24 +38,35 @@ * from: Utah $Hdr: machparam.h 1.11 89/08/14$ * * @(#)param.h 7.8 (Berkeley) 6/28/91 - * $Id: param.h,v 1.6 1998/08/18 21:18:47 millert Exp $ + * $Id: param.h,v 1.7 1998/12/15 04:45:50 smurph Exp $ */ #ifndef _MACHINE_PARAM_H_ #define _MACHINE_PARAM_H_ -#define MACHINE "m88k" -#define MACHINE_ARCH "m88k" -#define MID_MACHINE MID_M88K +#define _MACHINE "mvme88k" +#define MACHINE "mvme88k" +#define _MACHINE_ARCH "m88k" +#define MACHINE_ARCH "m88k" +#define MID_MACHINE MID_M88K /* - * Round p (pointer or byte index) up to a correctly-aligned value + * Round p (pointer or byte index) down to a correctly-aligned value * for all data types (int, long, ...). The result is u_int and * must be cast to any desired pointer type. ALIGN() is used for * aligning stack, which needs to be on a double word boundary for * 88k. */ -#define ALIGNBYTES (sizeof(int) - 1) -#define ALIGN(p) (((u_int)(p) + (sizeof(double) - 1)) & ~(sizeof(double) - 1)) +/*#define ALIGNBYTES (sizeof(int) - 1)*/ +#define ALIGNBYTES 15 + +/* Stack alignment upon a double word boundary proves deadly */ +#define DOUBLE_ALIGN 1 +#ifdef DOUBLE_ALIGN +/*#define ALIGN(p) (((u_int)(p) + (sizeof(double) - 1)) & ~(sizeof(double) - 1))*/ +#define ALIGN(p) (((u_int)(p) + ALIGNBYTES) & ~ALIGNBYTES) +#else /* 16 byte alignment works */ +#define ALIGN(p) (((u_int)(p) + ((sizeof(double)*2) - 1)) & ~((sizeof(double)*2) - 1)) +#endif #ifndef NBPG #define NBPG 4096 /* bytes/page */ @@ -171,4 +182,6 @@ extern int cpumod; * Values for the cputyp variable. */ #define CPU_187 0x187 +#define CPU_188 0x188 +#define CPU_197 0x197 #endif /* !_MACHINE_PARAM_H_ */ diff --git a/sys/arch/mvme88k/include/pcctworeg.h b/sys/arch/mvme88k/include/pcctworeg.h index eecc7d47479..b029797bd54 100644 --- a/sys/arch/mvme88k/include/pcctworeg.h +++ b/sys/arch/mvme88k/include/pcctworeg.h @@ -1,146 +1,178 @@ -/* $NetBSD$ */ - /* - * Copyright (c) 1995 Theo de Raadt - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * 1. Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * 3. All advertising materials mentioning features or use of this software - * must display the following acknowledgement: - * This product includes software developed by Theo de Raadt - * 4. The name of the author may not be used to endorse or promote products - * derived from this software without specific prior written permission. + * Memory map for PCC2 chip found in mvme1x7 boards. * - * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR - * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES - * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. - * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, - * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT - * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, - * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY - * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF - * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + * PCCchip2 control and status register can be accessed as bytes (8 bits), + * two-bytes (16 bits), or four-bytes (32 bits). */ -/* - * MVME1x7/16x PCC2 chip: sort of a confused mish-mash of the MC in the 162 - * and the PCC in the 147 - */ -struct pcctworeg { +struct pcc2reg { volatile u_char pcc2_chipid; volatile u_char pcc2_chiprev; - volatile u_char pcc2_genctl; - volatile u_char pcc2_vecbase; /* irq vector base */ - volatile u_long pcc2_t1cmp; /* timer1 compare */ - volatile u_long pcc2_t1count; /* timer1 count */ - volatile u_long pcc2_t2cmp; /* timer2 compare */ - volatile u_long pcc2_t2count; /* timer2 count */ - volatile u_char pcc2_pscalecnt; /* timer prescaler counter */ - volatile u_char pcc2_pscaleadj; /* timer prescaler adjust */ - volatile u_char pcc2_t2ctl; /* timer2 ctrl reg */ - volatile u_char pcc2_t1ctl; /* timer1 ctrl reg */ - volatile u_char pcc2_gpioirq; /* gpio irq */ - volatile u_char pcc2_gpio; /* gpio i/o */ - volatile u_char pcc2_t2irq; - volatile u_char pcc2_t1irq; - volatile u_char pcc2_sccerr; - volatile u_char pcc2_sccirq; - volatile u_char pcc2_scctx; - volatile u_char pcc2_sccrx; - volatile u_char :8; + volatile u_char pcc2_gcr; + volatile u_char pcc2_vbr; /* vector base reg. */ + volatile u_long pcc2_t1cmp; /* timer1 compare reg */ + volatile u_long pcc2_t1cntr; /* timer1 counter reg */ + volatile u_long pcc2_t2cmp; /* timer2 compare reg */ + volatile u_long pcc2_t2cntr; /* timer2 counter reg */ + volatile u_char pcc2_pscntreg; /* prescalar count reg */ + volatile u_char pcc2_psclkadj; /* clock adjust reg */ + volatile u_char pcc2_t2ctl; /* timer2 control */ + volatile u_char pcc2_t1ctl; /* timer1 control */ + volatile u_char pcc2_gpiirq; /* GPIO intr ctl */ + volatile u_char pcc2_gpiopctl; /* GPIO pin control */ + volatile u_char pcc2_t2irq; /* Timer2 intr ctl */ + volatile u_char pcc2_t1irq; /* Timer1 intr ctl */ + volatile u_char pcc2_sccerrstat; /* SCC error status */ + volatile u_char pcc2_sccmoirq; /* Modem intr control */ + volatile u_char pcc2_scctxirq; /* Tx intr control */ + volatile u_char pcc2_sccrxirq; /* Rx intr control */ + volatile u_int :24; + volatile u_char pcc2_sccmopiack; /* modem PIACK */ volatile u_char :8; + volatile u_char pcc2_scctxpiack; /* Tx PIACK */ volatile u_char :8; - volatile u_char pcc2_sccmoiack; + volatile u_char pcc2_sccrxpiack; /* Rx PIACK */ + volatile u_char pcc2_lancerrstat; /* LANC error status */ volatile u_char :8; - volatile u_char pcc2_scctxiack; + volatile u_char pcc2_lancirq; /* LANC intr control */ + volatile u_char pcc2_lancerrirq; /* LANC err intr ctl */ + volatile u_char pcc2_scsierrstat; /* SCSI err status */ volatile u_char :8; - volatile u_char pcc2_sccrxiack; - volatile u_char pcc2_ieerr; volatile u_char :8; - volatile u_char pcc2_iectl; - volatile u_char pcc2_ieirq; - volatile u_char pcc2_ncrerr; + volatile u_char pcc2_scsiirq; /* SCSI intr control */ + volatile u_char pcc2_packirq; /* printer ACK intr */ + volatile u_char pcc2_pfltirq; /* printer FAULT intr */ + volatile u_char pcc2_pselirq; /* printer SEL intr */ + volatile u_char pcc2_ppeirq; /* printer PE intr */ + volatile u_char pcc2_pbusyirq; /* printer BUSY intr */ volatile u_char :8; - volatile u_char :8; - volatile u_char pcc2_ncrirq; - volatile u_char pcc2_prtairq; - volatile u_char pcc2_prtfirq; - volatile u_char pcc2_prtsirq; - volatile u_char pcc2_prtpirq; - volatile u_char pcc2_prtbirq; - volatile u_char :8; - volatile u_char pcc2_prtstat; - volatile u_char pcc2_prtctl; - volatile u_short pcc2_speed; /* DO NOT USE */ - volatile u_short pcc2_prtdat; - volatile u_short :16; - volatile u_char pcc2_ipl; - volatile u_char pcc2_mask; + volatile u_char pcc2_pstat; /* printer status reg */ + volatile u_char pcc2_pctl; /* printer port ctl */ + volatile u_short pcc2_chipspeed; /* chip speed (factory testing only) */ + volatile u_short pcc2_pdata; /* printer data */ + volatile u_int :16; + volatile u_char pcc2_ipl; /* interrupt IPL */ + volatile u_char pcc2_imask; /* intr mask level */ }; -#define PCC2_PCC2CHIP_ADDR 0xFFF42000 -#define PCC2_PCC2CHIP_OFF 0x42000 -#define PCC2_CHIPID 0x20 /* - * points to system's PCCTWO. This is not active until the pcctwo0 - * device has been attached. After that, it gives the virtual address - * at which the PCCTWO can be accessed. + * Vaddrs for interrupt mask and pri registers */ -extern struct pcctworeg *sys_pcc2; +extern volatile u_char *pcc2intr_mask; +extern volatile u_char *pcc2intr_ipl; -/* - * We lock off our interrupt vector at 0x50. - */ -#define PCC2_VECBASE 0x50 -#define PCC2_NVEC 12 +extern volatile struct pcc2reg *pcc2addr; + +#define PCC2_BASE_ADDR 0xFFF42000 /* base address */ +#define PCC2_SIZE 0x1000 /* size */ + +#define PCC2_CHIP_ID 0x20 +#define PCC2_CHIP_REV 0x00 + +/* General Control Register */ + +#define PCC2_DR0 0x80 +#define PCC2_C040 0x04 +#define PCC2_MIEN 0x02 +#define PCC2_FAST 0x01 + +/* Top 4 bits of the PCC2 VBR. Will be the top 4 bits of the vector */ + +#define PCC2_VECT 0x50 + +/* Bottom 4 bits of the vector returned during IACK cycle */ +#define PPBSY 0x00 /* lowest */ +#define PPSE 0x01 +#define PPSEL 0x02 +#define PPFLT 0x03 +#define PPACK 0x04 +#define SCSIIRQ 0x05 +#define LANCERR 0x06 +#define LANCIRQ 0x07 +#define TIMER1IRQ 0x08 +#define TIMER2IRQ 0x09 +#define GPIOIRQ 0x0a +#define SRXEIRQ 0x0c +#define SMOIRQ 0x0d +#define STxIRQ 0x0e +#define SRxIRQ 0x0f /* - * Vectors we use + * Timer control regs */ -#define PCC2V_NCR 0x05 -#define PCC2V_IE_ERR 0x06 -#define PCC2V_IE 0x07 -#define PCC2V_TIMER2 0x08 -#define PCC2V_TIMER1 0x09 -#define PCC2V_GPIO 0x0A -#define PCC2_TCTL_CEN 0x01 -#define PCC2_TCTL_COC 0x02 -#define PCC2_TCTL_COVF 0x04 -#define PCC2_TCTL_OVF 0xf0 +#define PCC2_TICTL_CEN 0x01 +#define PCC2_TICTL_COC 0x02 +#define PCC2_TICTL_COVF 0x04 +#define PCC2_TTCTL_OVF_MASK (1 << 4) /* overflow bits mask */ + +/* GPIO interrupt control */ -#define PCC2_GPIO_PLTY 0x80 -#define PCC2_GPIO_EL 0x40 +#define PCC2_GPIIRQ_PLTY 0x80 +#define PCC2_GPIIRQ_EL 0x40 +#define PCC2_GPIIRQ_INT 0x20 +#define PCC2_GPIIRQ_IEN 0x10 +#define PCC2_GPIIRQ_ICLR 0x08 +#define PCC2_GPIIRQ_IL 0x07 /* IL2-IL0 */ -#define PCC2_GPIOCR_OE 0x2 -#define PCC2_GPIOCR_O 0x1 +/* GPIO Pin Control Register */ -#define PCC2_SCC_AVEC 0x08 -#define PCC2_SCCRX_INHIBIT (0 << 6) -#define PCC2_SCCRX_SNOOP (1 << 6) -#define PCC2_SCCRX_INVAL (2 << 6) -#define PCC2_SCCRX_RESV (3 << 6) +#define PCC2_GPIOPCTL_GPI 0x04 +#define PCC2_GPIOPCTL_GPOE 0x02 +#define PCC2_GPIOPCTL_GPO 0x01 -#define pcc2_timer_us2lim(us) (us) /* timer increments in "us" */ +/* Tick Timer Interrupt Control Register */ + +#define PCC2_TTIRQ_INT 0x20 +#define PCC2_TTIRQ_IEN 0x10 +#define PCC2_TTIRQ_ICLR 0x08 +#define PCC2_TTIRQ_IL 0x07 /* mask for IL2-IL0 */ + +/* SCC Error Status Register */ + +#define PCC2_SCCERRSTAT_RTRY 0x10 +#define PCC2_SCCERRSTAT_PRTY 0x08 +#define PCC2_SCCERRSTAT_EXT 0x04 +#define PCC2_SCCERRSTAT_LTO 0x02 +#define PCC2_SCCERRSTAT_SCLR 0x01 + +/* SCC Modem Interrupt Control Register */ + +#define PCC2_SCCMOIRQ_IRQ 0x20 +#define PCC2_SCCMOIRQ_IEN 0x10 +#define PCC2_SCCMOIRQ_AVEC 0x08 +#define PCC2_SCCMOIRQ_IL 0x07 /* int level mask */ + +/* SCC Tx Interrupt Control Register */ + +#define PCC2_SCCTXIRQ_IRQ 0x20 +#define PCC2_SCCTXIRQ_IEN 0x10 +#define PCC2_SCCTXIRQ_AVEC 0x08 +#define PCC2_SCCTXIRQ_IL 0x07 + +/* SCC Tx Interrupt Control Register */ + +#define PCC2_SCCRXIRQ_SNOOP (1 << 6) +#define PCC2_SCCRXIRQ_IRQ 0x20 +#define PCC2_SCCRXIRQ_IEN 0x10 +#define PCC2_SCCRXIRQ_AVEC 0x08 +#define PCC2_SCCRXIRQ_IL 0x07 + +/* SCSI Interrupt Control Register */ + +#define PCC2_SCSIIRQ_IEN 0x10 + +/* Interrupt Priority Level Register */ + +#define PCC2_IPL_IPL 0x07 + +/* Interrupt Mask Level Register */ + +#define PCC2_IMASK_MSK 0x07 #define PCC2_IRQ_IPL 0x07 #define PCC2_IRQ_ICLR 0x08 #define PCC2_IRQ_IEN 0x10 #define PCC2_IRQ_INT 0x20 -#define PCC2_GENCTL_FAST 0x01 -#define PCC2_GENCTL_IEN 0x02 -#define PCC2_GENCTL_C040 0x03 - -#define PCC2_SC_INHIBIT (0 << 6) -#define PCC2_SC_SNOOP (1 << 6) -#define PCC2_SC_INVAL (2 << 6) -#define PCC2_SC_RESV (3 << 6) +#define PCC2_IEERR_SCLR 0x01 diff --git a/sys/arch/mvme88k/include/pmap.h b/sys/arch/mvme88k/include/pmap.h index ef1fd3b7e33..6c668937282 100644 --- a/sys/arch/mvme88k/include/pmap.h +++ b/sys/arch/mvme88k/include/pmap.h @@ -32,7 +32,7 @@ struct pmap { sdt_ptr_t sdt_paddr; /* physical pointer to sdt */ sdt_ptr_t sdt_vaddr; /* virtual pointer to sdt */ int ref_count; /* reference count */ - + simple_lock_data_t lock; struct pmap_statistics stats; /* pmap statistics */ #ifdef DEBUG diff --git a/sys/arch/mvme88k/include/prom.h b/sys/arch/mvme88k/include/prom.h index 7ee08f47ea0..3847fa03eea 100644 --- a/sys/arch/mvme88k/include/prom.h +++ b/sys/arch/mvme88k/include/prom.h @@ -148,6 +148,9 @@ struct mvmeprom_args { u_int conf_blk; char *arg_start; char *arg_end; + char *nbarg_start; + char *nbarg_end; + u_int cputyp; }; #endif @@ -155,3 +158,19 @@ struct mvmeprom_args { #define MVMEPROM_CALL(x) \ asm volatile ( __CONCAT("or r9,r0,",__STRING(x)) ); \ asm volatile ("tb0 0,r0,496"); + +#define MVMEPROM_REG_DEVLUN "r2" +#define MVMEPROM_REG_CTRLLUN "r3" +#define MVMEPROM_REG_FLAGS "r4" +#define MVMEPROM_REG_CTRLADDR "r5" +#define MVMEPROM_REG_ENTRY "r6" +#define MVMEPROM_REG_CONFBLK "r7" +#define MVMEPROM_REG_ARGSTART "r8" +#define MVMEPROM_REG_ARGEND "r9" +#define MVMEPROM_REG_NBARGSTART "r10" +#define MVMEPROM_REG_NBARGEND "r11" + +#ifndef RB_NOSYM +#define RB_NOSYM 0x400 +#endif + diff --git a/sys/arch/mvme88k/include/pte.h b/sys/arch/mvme88k/include/pte.h new file mode 100644 index 00000000000..ce0896cbbc1 --- /dev/null +++ b/sys/arch/mvme88k/include/pte.h @@ -0,0 +1,156 @@ +/* $OpenBSD: pte.h,v 1.1 1998/12/15 04:45:50 smurph Exp $ */ + +/* + * Copyright (c) 1988 University of Utah. + * Copyright (c) 1982, 1986, 1990, 1993 + * The Regents of the University of California. All rights reserved. + * + * This code is derived from software contributed to Berkeley by + * the Systems Programming Group of the University of Utah Computer + * Science Department. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the distribution. + * 3. All advertising materials mentioning features or use of this software + * must display the following acknowledgement: + * This product includes software developed by the University of + * California, Berkeley and its contributors. + * 4. Neither the name of the University nor the names of its contributors + * may be used to endorse or promote products derived from this software + * without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND + * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE + * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE + * ARE DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE + * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL + * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS + * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) + * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY + * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF + * SUCH DAMAGE. + * + * from: Utah $Hdr: pte.h 1.13 92/01/20$ + * + * @(#)pte.h 8.1 (Berkeley) 6/10/93 + */ + +#ifndef _MVME88K_PTE_H_ +#define _MVME88K_PTE_H_ + +/* + * m88k hardware segment/page table entries + */ + +#if 0 +struct ste { + unsigned int sg_pfnum:20; /* page table frame number */ + unsigned int :8; /* reserved at 0 */ + unsigned int :1; /* reserved at 1 */ + unsigned int sg_prot:1; /* write protect bit */ + unsigned int sg_v:2; /* valid bits */ +}; + +struct ste40 { + unsigned int sg_ptaddr:24; /* page table page addr */ + unsigned int :4; /* reserved at 0 */ + unsigned int sg_u; /* hardware modified (dirty) bit */ + unsigned int sg_prot:1; /* write protect bit */ + unsigned int sg_v:2; /* valid bits */ +}; + +struct pte { + unsigned int pg_pfnum:20; /* page frame number or 0 */ + unsigned int :3; + unsigned int pg_w:1; /* is wired */ + unsigned int :1; /* reserved at zero */ + unsigned int pg_ci:1; /* cache inhibit bit */ + unsigned int :1; /* reserved at zero */ + unsigned int pg_m:1; /* hardware modified (dirty) bit */ + unsigned int pg_u:1; /* hardware used (reference) bit */ + unsigned int pg_prot:1; /* write protect bit */ + unsigned int pg_v:2; /* valid bit */ +}; +#endif + +#if 0 +typedef int st_entry_t; /* segment table entry */ +typedef int pt_entry_t; /* Mach page table entry */ +#endif + +#define PT_ENTRY_NULL ((pt_entry_t *) 0) +#define ST_ENTRY_NULL ((st_entry_t *) 0) + +#define SG_V 0x00000002 /* segment is valid */ +#define SG_NV 0x00000000 +#define SG_PROT 0x00000004 /* access protection mask */ +#define SG_RO 0x00000004 +#define SG_RW 0x00000000 +#define SG_U 0x00000008 /* modified bit (68040) */ +#define SG_FRAME 0xfffff000 +#define SG_IMASK 0xffc00000 +#define SG_ISHIFT 22 +#define SG_PMASK 0x003ff000 +#define SG_PSHIFT 12 + +/* 68040 additions */ +#define SG4_MASK1 0xfe000000 +#define SG4_SHIFT1 25 +#define SG4_MASK2 0x01fc0000 +#define SG4_SHIFT2 18 +#define SG4_MASK3 0x0003f000 +#define SG4_SHIFT3 12 +#define SG4_ADDR1 0xfffffe00 +#define SG4_ADDR2 0xffffff00 +#define SG4_LEV1SIZE 128 +#define SG4_LEV2SIZE 128 +#define SG4_LEV3SIZE 64 + +#define PG_V 0x00000001 +#define PG_NV 0x00000000 +#define PG_PROT 0x00000004 +#define PG_U 0x00000008 +#define PG_M 0x00000010 +#define PG_W 0x00000100 +#define PG_RO 0x00000004 +#define PG_RW 0x00000000 +#define PG_FRAME 0xfffff000 +#define PG_CI 0x00000040 +#define PG_SHIFT 12 +#define PG_PFNUM(x) (((x) & PG_FRAME) >> PG_SHIFT) + +/* 68040 additions */ +#define PG_CMASK 0x00000060 /* cache mode mask */ +#define PG_CWT 0x00000000 /* writethrough caching */ +#define PG_CCB 0x00000020 /* copyback caching */ +#define PG_CIS 0x00000040 /* cache inhibited serialized */ +#define PG_CIN 0x00000060 /* cache inhibited nonserialized */ +#define PG_SO 0x00000080 /* supervisor only */ + +#define M68K_STSIZE (MAXUL2SIZE*SG4_LEV2SIZE*sizeof(st_entry_t)) + /* user process segment table size */ +#define M68K_MAX_PTSIZE 0x400000 /* max size of UPT */ +#define M68K_MAX_KPTSIZE 0x100000 /* max memory to allocate to KPT */ +#define M68K_PTBASE 0x10000000 /* UPT map base address */ +#define M68K_PTMAXSIZE 0x70000000 /* UPT map maximum size */ + +/* + * Kernel virtual address to page table entry and to physical address. + */ + +/* +#define kvtopte(va) \ + (&Sysmap[((unsigned)(va) - VM_MIN_KERNEL_ADDRESS) >> PGSHIFT]) +#define ptetokv(pt) \ + ((((pt_entry_t *)(pt) - Sysmap) << PGSHIFT) + VM_MIN_KERNEL_ADDRESS) +#define kvtophys(va) \ + ((kvtopte(va)->pg_pfnum << PGSHIFT) | ((int)(va) & PGOFSET)) +*/ +#endif /* !_MVME68K_PTE_H_ */ diff --git a/sys/arch/mvme88k/include/vmparam.h b/sys/arch/mvme88k/include/vmparam.h index 586fb83fe38..fe1809fac41 100644 --- a/sys/arch/mvme88k/include/vmparam.h +++ b/sys/arch/mvme88k/include/vmparam.h @@ -67,6 +67,13 @@ #endif /* + * External IO space map size. + */ +#ifndef EIOMAPSIZE +#define EIOMAPSIZE 1024 /* in pages */ +#endif + +/* * Default sizes of swap allocation chunks (see dmap.h). * The actual values may be changed in vminit() based on MAXDSIZ. * With MAXDSIZ of 16Mb and NDMAP of 38, dmmax will be 1024. |