diff options
Diffstat (limited to 'sys')
| -rw-r--r-- | sys/dev/pci/pciide.c | 48 | ||||
| -rw-r--r-- | sys/dev/pci/pciide_sii3112_reg.h | 10 |
2 files changed, 20 insertions, 38 deletions
diff --git a/sys/dev/pci/pciide.c b/sys/dev/pci/pciide.c index 18e56e4dfcf..093b330112b 100644 --- a/sys/dev/pci/pciide.c +++ b/sys/dev/pci/pciide.c @@ -1,4 +1,4 @@ -/* $OpenBSD: pciide.c,v 1.279 2008/01/29 10:34:00 jsg Exp $ */ +/* $OpenBSD: pciide.c,v 1.280 2008/02/05 20:22:22 blambert Exp $ */ /* $NetBSD: pciide.c,v 1.127 2001/08/03 01:31:08 tsutsui Exp $ */ /* @@ -108,12 +108,6 @@ int wdcdebug_pciide_mask = WDCDEBUG_PCIIDE_MASK; #include <dev/pci/pcivar.h> #include <dev/pci/pcidevs.h> -#if defined(SMALL_KERNEL) -#define INLINE -#else -#define INLINE __inline -#endif - #include <dev/pci/pciidereg.h> #include <dev/pci/pciidevar.h> #include <dev/pci/pciide_piix_reg.h> @@ -137,21 +131,21 @@ int wdcdebug_pciide_mask = WDCDEBUG_PCIIDE_MASK; #include <dev/pci/pciide_jmicron_reg.h> #include <dev/pci/cy82c693var.h> -/* inlines for reading/writing 8-bit PCI registers */ +/* functions for reading/writing 8-bit PCI registers */ -static INLINE u_int8_t pciide_pci_read(pci_chipset_tag_t, pcitag_t, +u_int8_t pciide_pci_read(pci_chipset_tag_t, pcitag_t, int); -static INLINE void pciide_pci_write(pci_chipset_tag_t, pcitag_t, +void pciide_pci_write(pci_chipset_tag_t, pcitag_t, int, u_int8_t); -static INLINE u_int8_t +u_int8_t pciide_pci_read(pci_chipset_tag_t pc, pcitag_t pa, int reg) { return (pci_conf_read(pc, pa, (reg & ~0x03)) >> ((reg & 0x03) * 8) & 0xff); } -static INLINE void +void pciide_pci_write(pci_chipset_tag_t pc, pcitag_t pa, int reg, u_int8_t val) { pcireg_t pcival; @@ -173,9 +167,9 @@ void piix_setup_channel(struct channel_softc *); void piix3_4_setup_channel(struct channel_softc *); void piix_timing_debug(struct pciide_softc *); -static u_int32_t piix_setup_idetim_timings(u_int8_t, u_int8_t, u_int8_t); -static u_int32_t piix_setup_idetim_drvs(struct ata_drive_datas *); -static u_int32_t piix_setup_sidetim_timings(u_int8_t, u_int8_t, u_int8_t); +u_int32_t piix_setup_idetim_timings(u_int8_t, u_int8_t, u_int8_t); +u_int32_t piix_setup_idetim_drvs(struct ata_drive_datas *); +u_int32_t piix_setup_sidetim_timings(u_int8_t, u_int8_t, u_int8_t); void amd756_chip_map(struct pciide_softc *, struct pci_attach_args *); void amd756_setup_channel(struct channel_softc *); @@ -236,6 +230,8 @@ int pdc20265_pci_intr(void *); void pdc20262_dma_start(void *, int, int); int pdc20262_dma_finish(void *, int, int, int); +u_int8_t pdc268_config_read(struct channel_softc *, int); + void pdcsata_chip_map(struct pciide_softc *, struct pci_attach_args *); void pdc203xx_setup_channel(struct channel_softc *); int pdc203xx_pci_intr(void *); @@ -2746,7 +2742,7 @@ pio: /* use PIO mode */ /* setup ISP and RTC fields, based on mode */ -static u_int32_t +u_int32_t piix_setup_idetim_timings(u_int8_t mode, u_int8_t dma, u_int8_t channel) { @@ -2763,7 +2759,7 @@ piix_setup_idetim_timings(u_int8_t mode, u_int8_t dma, u_int8_t channel) } /* setup DTE, PPE, IE and TIME field based on PIO mode */ -static u_int32_t +u_int32_t piix_setup_idetim_drvs(struct ata_drive_datas *drvp) { u_int32_t ret = 0; @@ -2818,7 +2814,7 @@ piix_setup_idetim_drvs(struct ata_drive_datas *drvp) } /* setup values in SIDETIM registers, based on mode */ -static u_int32_t +u_int32_t piix_setup_sidetim_timings(u_int8_t mode, u_int8_t dma, u_int8_t channel) { if (dma) @@ -5881,7 +5877,7 @@ hpt_pci_intr(void *arg) (sc)->sc_pp->ide_product == PCI_PRODUCT_PROMISE_PDC20276 || \ (sc)->sc_pp->ide_product == PCI_PRODUCT_PROMISE_PDC20277) -static INLINE u_int8_t +u_int8_t pdc268_config_read(struct channel_softc *chp, int index) { struct pciide_channel *cp = (struct pciide_channel *)chp; @@ -5894,20 +5890,6 @@ pdc268_config_read(struct channel_softc *chp, int index) PDC268_DATA(channel))); } -/* unused */ -static __inline void -pdc268_config_write(struct channel_softc *chp, int index, u_int8_t value) -{ - struct pciide_channel *cp = (struct pciide_channel *)chp; - struct pciide_softc *sc = (struct pciide_softc *)cp->wdc_channel.wdc; - int channel = chp->channel; - - bus_space_write_1(sc->sc_dma_iot, sc->sc_dma_ioh, - PDC268_INDEX(channel), index); - bus_space_write_1(sc->sc_dma_iot, sc->sc_dma_ioh, - PDC268_DATA(channel), value); -} - void pdc202xx_chip_map(struct pciide_softc *sc, struct pci_attach_args *pa) { diff --git a/sys/dev/pci/pciide_sii3112_reg.h b/sys/dev/pci/pciide_sii3112_reg.h index dfcd6fe4ece..990e3383ac3 100644 --- a/sys/dev/pci/pciide_sii3112_reg.h +++ b/sys/dev/pci/pciide_sii3112_reg.h @@ -1,4 +1,4 @@ -/* $OpenBSD: pciide_sii3112_reg.h,v 1.5 2006/02/10 21:45:41 kettenis Exp $ */ +/* $OpenBSD: pciide_sii3112_reg.h,v 1.6 2008/02/05 20:22:22 blambert Exp $ */ /* $NetBSD: pciide_sii3112_reg.h,v 1.1 2003/03/20 04:22:50 thorpej Exp $ */ /* @@ -337,7 +337,7 @@ struct pciide_satalink { } regs[4]; }; -static INLINE uint32_t +static uint32_t ba5_read_4_ind(struct pciide_softc *sc, pcireg_t reg) { uint32_t rv; @@ -351,7 +351,7 @@ ba5_read_4_ind(struct pciide_softc *sc, pcireg_t reg) return (rv); } -static INLINE uint32_t +static uint32_t ba5_read_4(struct pciide_softc *sc, bus_size_t reg) { struct pciide_satalink *sl = sc->sc_cookie; @@ -365,7 +365,7 @@ ba5_read_4(struct pciide_softc *sc, bus_size_t reg) #define BA5_READ_4(sc, chan, reg) \ ba5_read_4((sc), satalink_ba5_regmap[(chan)].reg) -static INLINE void +static void ba5_write_4_ind(struct pciide_softc *sc, pcireg_t reg, uint32_t val) { int s; @@ -376,7 +376,7 @@ ba5_write_4_ind(struct pciide_softc *sc, pcireg_t reg, uint32_t val) splx(s); } -static INLINE void +static void ba5_write_4(struct pciide_softc *sc, bus_size_t reg, uint32_t val) { struct pciide_satalink *sl = sc->sc_cookie; |