diff options
Diffstat (limited to 'sys')
| -rw-r--r-- | sys/dev/pci/files.pci | 7 | ||||
| -rw-r--r-- | sys/dev/pci/nofn.c | 209 | ||||
| -rw-r--r-- | sys/dev/pci/nofnreg.h | 93 | ||||
| -rw-r--r-- | sys/dev/pci/nofnvar.h | 57 |
4 files changed, 365 insertions, 1 deletions
diff --git a/sys/dev/pci/files.pci b/sys/dev/pci/files.pci index eaf0e6df523..3232edf6737 100644 --- a/sys/dev/pci/files.pci +++ b/sys/dev/pci/files.pci @@ -1,4 +1,4 @@ -# $OpenBSD: files.pci,v 1.122 2001/12/05 10:34:44 mickey Exp $ +# $OpenBSD: files.pci,v 1.123 2002/01/07 23:16:38 jason Exp $ # $NetBSD: files.pci,v 1.20 1996/09/24 17:47:15 christos Exp $ # # Config file and device description for machine-independent PCI code. @@ -295,6 +295,11 @@ device lofn: crypto attach lofn at pci file dev/pci/lofn.c lofn +# Hi/fn 7811 +device nofn: crypto +attach nofn at pci +file dev/pci/nofn.c nofn + # Hi/fn 7751 device hifn: crypto attach hifn at pci diff --git a/sys/dev/pci/nofn.c b/sys/dev/pci/nofn.c new file mode 100644 index 00000000000..123f310e473 --- /dev/null +++ b/sys/dev/pci/nofn.c @@ -0,0 +1,209 @@ +/* $OpenBSD: nofn.c,v 1.1 2002/01/07 23:16:38 jason Exp $ */ + +/* + * Copyright (c) 2002 Jason L. Wright (jason@thought.net) + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the distribution. + * 3. All advertising materials mentioning features or use of this software + * must display the following acknowledgement: + * This product includes software developed by Jason L. Wright + * 4. The name of the author may not be used to endorse or promote products + * derived from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR + * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED + * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE + * DISCLAIMED. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, + * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES + * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR + * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) + * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, + * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN + * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + */ + +/* + * Driver for the Hifn 7811 encryption processor. + */ + +#include <sys/param.h> +#include <sys/systm.h> +#include <sys/proc.h> +#include <sys/errno.h> +#include <sys/malloc.h> +#include <sys/kernel.h> +#include <sys/mbuf.h> +#include <sys/device.h> + +#include <uvm/uvm_extern.h> + +#include <crypto/cryptodev.h> +#include <dev/rndvar.h> + +#include <dev/pci/pcireg.h> +#include <dev/pci/pcivar.h> +#include <dev/pci/pcidevs.h> + +#include <dev/pci/nofnreg.h> +#include <dev/pci/nofnvar.h> + +/* + * Prototypes and count for the pci_device structure + */ +int nofn_probe __P((struct device *, void *, void *)); +void nofn_attach __P((struct device *, struct device *, void *)); + +struct cfattach nofn_ca = { + sizeof(struct nofn_softc), nofn_probe, nofn_attach, +}; + +struct cfdriver nofn_cd = { + 0, "nofn", DV_DULL +}; + +int nofn_intr __P((void *)); +void nofn_rng __P((void *)); + +int +nofn_probe(parent, match, aux) + struct device *parent; + void *match; + void *aux; +{ + struct pci_attach_args *pa = (struct pci_attach_args *) aux; + + if (PCI_VENDOR(pa->pa_id) == PCI_VENDOR_HIFN && + PCI_PRODUCT(pa->pa_id) == PCI_PRODUCT_HIFN_7811) + return (1); + return (0); +} + +void +nofn_attach(parent, self, aux) + struct device *parent, *self; + void *aux; +{ + struct nofn_softc *sc = (struct nofn_softc *)self; + struct pci_attach_args *pa = aux; + pci_chipset_tag_t pc = pa->pa_pc; + pci_intr_handle_t ih; + const char *intrstr = NULL; + bus_size_t iosize0, iosize1, iosize2; + u_int32_t cmd; + + sc->sc_pci_pc = pa->pa_pc; + sc->sc_pci_tag = pa->pa_tag; + + cmd = pci_conf_read(pc, pa->pa_tag, PCI_COMMAND_STATUS_REG); + cmd |= PCI_COMMAND_MEM_ENABLE | PCI_COMMAND_MASTER_ENABLE; + pci_conf_write(pc, pa->pa_tag, PCI_COMMAND_STATUS_REG, cmd); + cmd = pci_conf_read(pc, pa->pa_tag, PCI_COMMAND_STATUS_REG); + + if (!(cmd & PCI_COMMAND_MEM_ENABLE)) { + printf(": failed to enable memory mapping\n"); + goto fail; + } + + if (!(cmd & PCI_COMMAND_MASTER_ENABLE)) { + printf(": failed to enable bus mastering\n"); + goto fail; + } + + if (pci_mapreg_map(pa, NOFN_BAR0, PCI_MAPREG_TYPE_MEM, 0, + &sc->sc_st0, &sc->sc_sh0, NULL, &iosize0, 0)) { + printf(": can't find mem space %d\n", 0); + goto fail_io0; + } + + if (pci_mapreg_map(pa, NOFN_BAR1, PCI_MAPREG_TYPE_MEM, 0, + &sc->sc_st1, &sc->sc_sh1, NULL, &iosize1, 0)) { + printf(": can't find mem space %d\n", 1); + goto fail_io1; + } + + if (pci_mapreg_map(pa, NOFN_BAR2, PCI_MAPREG_TYPE_MEM, 0, + &sc->sc_st2, &sc->sc_sh2, NULL, &iosize2, 0)) { + printf(": can't find mem space %d\n", 1); + goto fail_io2; + } + + if (pci_intr_map(pa, &ih)) { + printf(": couldn't map interrupt\n"); + goto fail_intr; + } + intrstr = pci_intr_string(pc, ih); + sc->sc_ih = pci_intr_establish(pc, ih, IPL_NET, nofn_intr, sc, + self->dv_xname); + if (sc->sc_ih == NULL) { + printf(": couldn't establish interrupt"); + if (intrstr != NULL) + printf(" at %s", intrstr); + printf("\n"); + goto fail_intr1; + } + + printf(": %s\n", intrstr); + + /* Setup RNG */ + G1_WRITE_4(sc, NOFN_G1_RNGCR, RNGCR_DEFAULT); + G1_WRITE_4(sc, NOFN_G1_RNGER, + G1_READ_4(sc, NOFN_G1_RNGER) | RNGER_ENABLE); + timeout_set(&sc->sc_rngto, nofn_rng, sc); + if (hz >= 100) + sc->sc_rnghz = hz / 100; + else + sc->sc_rnghz = 1; + timeout_add(&sc->sc_rngto, sc->sc_rnghz); + + return; + +fail_intr1: + pci_intr_disestablish(pc, sc->sc_ih); +fail_intr: + bus_space_unmap(sc->sc_st2, sc->sc_sh2, iosize2); +fail_io2: + bus_space_unmap(sc->sc_st1, sc->sc_sh1, iosize1); +fail_io1: + bus_space_unmap(sc->sc_st0, sc->sc_sh0, iosize0); +fail_io0: +fail: + return; +} + +int +nofn_intr(vsc) + void *vsc; +{ + return (0); +} + +void +nofn_rng(vsc) + void *vsc; +{ + struct nofn_softc *sc = vsc; + u_int32_t r, v; + + while (1) { + r = G1_READ_4(sc, NOFN_G1_RNGSTS); + if (r & RNGSTS_UFL) + printf("%s: rng underflow\n", sc->sc_dv.dv_xname); + if ((r & RNGSTS_RDY) == 0) + break; + + v = G1_READ_4(sc, NOFN_G1_RNGDAT); + add_true_randomness(v); + v = G1_READ_4(sc, NOFN_G1_RNGDAT); + add_true_randomness(v); + } + timeout_add(&sc->sc_rngto, sc->sc_rnghz); +} diff --git a/sys/dev/pci/nofnreg.h b/sys/dev/pci/nofnreg.h new file mode 100644 index 00000000000..8eb0db353cc --- /dev/null +++ b/sys/dev/pci/nofnreg.h @@ -0,0 +1,93 @@ +/* $OpenBSD: nofnreg.h,v 1.1 2002/01/07 23:16:38 jason Exp $ */ + +/* + * Copyright (c) 2002 Jason L. Wright (jason@thought.net) + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the distribution. + * 3. All advertising materials mentioning features or use of this software + * must display the following acknowledgement: + * This product includes software developed by Jason L. Wright + * 4. The name of the author may not be used to endorse or promote products + * derived from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR + * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED + * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE + * DISCLAIMED. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, + * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES + * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR + * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) + * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, + * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN + * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + */ + +#define NOFN_BAR0 0x10 /* Group 0 space */ +#define NOFN_BAR1 0x14 /* Group 1 space */ +#define NOFN_BAR2 0x18 /* GPRAM */ + +#define NOFN_G0_SEISR 0x08 /* security engine intr status */ +#define NOFN_G0_SEIER 0x10 /* security engine intr enable */ +#define NOFN_G0_SESR 0x14 /* security engine status */ + +#define NOFN_G1_RNGER 0x60 /* RNG enable */ +#define NOFN_G1_RNGCR 0x64 /* RNG config */ +#define NOFN_G1_RNGDAT 0x68 /* RNG data */ +#define NOFN_G1_RNGSTS 0x6c /* RNG status */ + +/* g0, seisr: security engine intr status */ +#define SEISR_INVAL 0x00008000 /* invalid command */ +#define SEISR_DATERR 0x00004000 /* data error */ +#define SEISR_SRCFIFO 0x00002000 /* source fifo ready */ +#define SEISR_DSTFIFO 0x00001000 /* destination fifo ready */ +#define SEISR_DSTOVF 0x00000200 /* destination overrun */ +#define SEISR_SRCCMD 0x00000080 /* source command phase */ +#define SEISR_SRCCTX 0x00000040 /* source context phase */ +#define SEISR_SRCDAT 0x00000020 /* source data phase */ +#define SEISR_DSTDAT 0x00000010 /* destination data phase */ +#define SEISR_DSTRES 0x00000004 /* destination result phase */ + +/* g0, seier: security engine intr enable */ +#define SEIER_INVAL 0x00008000 /* invalid command */ +#define SEIER_DATERR 0x00004000 /* data error */ +#define SEIER_SRCFIFO 0x00002000 /* source fifo ready */ +#define SEIER_DSTFIFO 0x00001000 /* destination fifo ready */ +#define SEIER_DSTOVF 0x00000200 /* destination overrun */ +#define SEIER_SRCCMD 0x00000080 /* source command phase */ +#define SEIER_SRCCTX 0x00000040 /* source context phase */ +#define SEIER_SRCDAT 0x00000020 /* source data phase */ +#define SEIER_DSTDAT 0x00000010 /* destination data phase */ +#define SEIER_DSTRES 0x00000004 /* destination result phase */ + +/* g0, sesr: security engine status */ +#define SESR_INVAL 0x00008000 /* invalid command */ +#define SESR_DATERR 0x00004000 /* data error */ +#define SESR_SRCFIFO 0x00002000 /* source fifo ready */ +#define SESR_DSTFIFO 0x00001000 /* destination fifo ready */ +#define SESR_DSTOVF 0x00000200 /* destination overrun */ +#define SESR_SRCCMD 0x00000080 /* source command phase */ +#define SESR_SRCCTX 0x00000040 /* source context phase */ +#define SESR_SRCDAT 0x00000020 /* source data phase */ +#define SESR_DSTDAT 0x00000010 /* destination data phase */ +#define SESR_DSTRES 0x00000004 /* destination result phase */ + +/* g1, rnger: RNG enable */ +#define RNGER_ENABLE 0x00000001 /* enable rng */ + +/* g1, rngcr: RNG config */ +#define RNGCR_PRE1 0x00000f00 /* prescaler 1 */ +#define RNGCR_PRE2 0x00000080 /* prescaler 2, 0 = 1024, 1 = 512 */ +#define RNGCR_DEFAULT 0x00000900 /* default value for us */ + +/* g1, rngsts: RNG status */ +#define RNGSTS_RDY 0x00004000 /* RNG ready (2 words in FIFO) */ +#define RNGSTS_UFL 0x00001000 /* RNG underflow */ diff --git a/sys/dev/pci/nofnvar.h b/sys/dev/pci/nofnvar.h new file mode 100644 index 00000000000..558052ca28d --- /dev/null +++ b/sys/dev/pci/nofnvar.h @@ -0,0 +1,57 @@ +/* $OpenBSD: nofnvar.h,v 1.1 2002/01/07 23:16:38 jason Exp $ */ + +/* + * Copyright (c) 2002 Jason L. Wright (jason@thought.net) + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the distribution. + * 3. All advertising materials mentioning features or use of this software + * must display the following acknowledgement: + * This product includes software developed by Jason L. Wright + * 4. The name of the author may not be used to endorse or promote products + * derived from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR + * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED + * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE + * DISCLAIMED. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, + * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES + * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR + * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) + * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, + * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN + * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + */ + + +struct nofn_softc { + struct device sc_dv; /* us, as a device */ + void *sc_ih; /* interrupt vectoring */ + bus_space_handle_t sc_sh0; /* group 0 handle */ + bus_space_tag_t sc_st0; /* group 0 tag */ + bus_space_handle_t sc_sh1; /* group 1 handle */ + bus_space_tag_t sc_st1; /* group 1 tag */ + bus_space_handle_t sc_sh2; /* gpram handle */ + bus_space_tag_t sc_st2; /* gpram tag */ + pci_chipset_tag_t sc_pci_pc; /* pci config space */ + pcitag_t sc_pci_tag; /* pci config space tag */ + struct timeout sc_rngto; /* rng timeout */ + int sc_rnghz; /* rng ticks */ +}; + +#define G0_READ_4(sc,reg) \ + bus_space_read_4((sc)->sc_st0, (sc)->sc_sh0, (reg)) +#define G0_WRITE_4(sc,reg, val) \ + bus_space_write_4((sc)->sc_st0, (sc)->sc_sh0, (reg), (val)) +#define G1_READ_4(sc,reg) \ + bus_space_read_4((sc)->sc_st1, (sc)->sc_sh1, (reg)) +#define G1_WRITE_4(sc,reg, val) \ + bus_space_write_4((sc)->sc_st1, (sc)->sc_sh1, (reg), (val)) |