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-rw-r--r--sys/arch/mvme88k/include/asm.h6
-rw-r--r--sys/arch/mvme88k/include/autoconf.h7
-rw-r--r--sys/arch/mvme88k/include/board.h51
-rw-r--r--sys/arch/mvme88k/include/cmmu.h6
-rw-r--r--sys/arch/mvme88k/include/cpu_number.h9
-rw-r--r--sys/arch/mvme88k/include/locore.h17
-rw-r--r--sys/arch/mvme88k/include/mvme187.h39
-rw-r--r--sys/arch/mvme88k/include/mvme188.h317
-rw-r--r--sys/arch/mvme88k/include/mvme197.h36
-rw-r--r--sys/arch/mvme88k/include/mvme1x7.h66
-rw-r--r--sys/arch/mvme88k/include/pmap_table.h32
-rw-r--r--sys/arch/mvme88k/mvme88k/cmmu.c4
-rw-r--r--sys/arch/mvme88k/mvme88k/machdep.c121
-rw-r--r--sys/arch/mvme88k/mvme88k/pmap.c27
-rw-r--r--sys/arch/mvme88k/mvme88k/pmap_table.c73
15 files changed, 353 insertions, 458 deletions
diff --git a/sys/arch/mvme88k/include/asm.h b/sys/arch/mvme88k/include/asm.h
index 822a3aa4f1f..80853f6f65c 100644
--- a/sys/arch/mvme88k/include/asm.h
+++ b/sys/arch/mvme88k/include/asm.h
@@ -1,4 +1,4 @@
-/* $OpenBSD: asm.h,v 1.23 2003/01/14 03:20:14 miod Exp $ */
+/* $OpenBSD: asm.h,v 1.24 2003/09/16 20:52:19 miod Exp $ */
/*
* Mach Operating System
@@ -222,10 +222,6 @@
#define REG_OFF(reg_num) ((reg_num) * 4) /* (num * sizeof(register int)) */
#define GENREG_OFF(num) (REG_OFF(EF_R0 + (num))) /* GENeral REGister OFFset */
-#define GENERAL_BREATHING_ROOM /* arbitrarily */ 200
-#define KERNEL_STACK_BREATHING_ROOM \
- (GENERAL_BREATHING_ROOM + SIZEOF_STRUCT_PCB + SIZEOF_STRUCT_UTHREAD)
-
/*
* Some registers used during the setting up of the new exception frame.
* Don't choose r1, r30, or r31 for any of them.
diff --git a/sys/arch/mvme88k/include/autoconf.h b/sys/arch/mvme88k/include/autoconf.h
index 7a191ee60c4..443b7098dae 100644
--- a/sys/arch/mvme88k/include/autoconf.h
+++ b/sys/arch/mvme88k/include/autoconf.h
@@ -1,4 +1,4 @@
-/* $OpenBSD: autoconf.h,v 1.10 2002/03/14 01:26:39 millert Exp $ */
+/* $OpenBSD: autoconf.h,v 1.11 2003/09/16 20:52:19 miod Exp $ */
/*
* Copyright (c) 1999, Steve Murphree, Jr.
* Copyright (c) 1996 Nivas Madhur
@@ -58,11 +58,6 @@ struct confargs {
#define BUS_SYSCON 6
#define BUS_BUSSWITCH 7
-int always_match(struct device *, struct cfdata *, void *);
-
-#define DEVICE_UNIT(device) (device->dv_unit)
-#define CFDATA_LOC(cfdata) (cfdata->cf_loc)
-
/* the following are from the prom/bootblocks */
extern void *bootaddr; /* PA of boot device */
extern int bootpart; /* boot partition (disk) */
diff --git a/sys/arch/mvme88k/include/board.h b/sys/arch/mvme88k/include/board.h
index 6f7b94113bb..6b7d828a644 100644
--- a/sys/arch/mvme88k/include/board.h
+++ b/sys/arch/mvme88k/include/board.h
@@ -1,4 +1,4 @@
-/* $OpenBSD: board.h,v 1.15 2002/06/04 00:09:08 deraadt Exp $ */
+/* $OpenBSD: board.h,v 1.16 2003/09/16 20:52:19 miod Exp $ */
/*
* Copyright (c) 1996 Nivas Madhur
* All rights reserved.
@@ -48,31 +48,18 @@
* VME187 CPU board constants - derived from Luna88k
*/
-/*
- * Something to put append a 'U' to a long constant if it's C so that
- * it'll be unsigned in both ANSI and traditional.
- */
-#if defined(_LOCORE)
-#define U(num) num
-#elif defined(__STDC__)
-#define U(num) num ## U
-#else
-#define U(num) num/**/U
-#endif
-#define UDEFINED
-
#define MAX_CPUS 4 /* no. of CPUs */
#define MAX_CMMUS 8 /* 2 CMMUs per CPU - 1 data and 1 code */
-#define SYSV_BASE U(0x00000000) /* system virtual base */
+#define SYSV_BASE 0x00000000 /* system virtual base */
-#define MAXU_ADDR U(0x40000000) /* size of user virtual space */
-#define MAXPHYSMEM U(0x10000000) /* max physical memory */
+#define MAXU_ADDR 0x40000000 /* size of user virtual space */
+#define MAXPHYSMEM 0x10000000 /* max physical memory */
-#define VMEA16 U(0xFFFF0000) /* VMEbus A16 */
-#define VMEA16_SIZE U(0x0000EFFF) /* VMEbus A16 size */
-#define VMEA32D16 U(0xFF000000) /* VMEbus A32/D16 */
-#define VMEA32D16_SIZE U(0x007FFFFF) /* VMEbus A32/D16 size */
+#define VMEA16 0xFFFF0000 /* VMEbus A16 */
+#define VMEA16_SIZE 0x0000EFFF /* VMEbus A16 size */
+#define VMEA32D16 0xFF000000 /* VMEbus A32/D16 */
+#define VMEA32D16_SIZE 0x007FFFFF /* VMEbus A32/D16 size */
/* These need to be here because of the way m18x_cmmu.c
@@ -81,17 +68,17 @@
#ifndef CMMU_DEFS
#define CMMU_DEFS
-#define SBC_CMMU_I U(0xFFF77000) /* Single Board Computer code CMMU */
-#define SBC_CMMU_D U(0xFFF7F000) /* Single Board Computer data CMMU */
+#define SBC_CMMU_I 0xFFF77000 /* Single Board Computer code CMMU */
+#define SBC_CMMU_D 0xFFF7F000 /* Single Board Computer data CMMU */
-#define VME_CMMU_I0 U(0xFFF7E000) /* MVME188 code CMMU 0 */
-#define VME_CMMU_I1 U(0xFFF7D000) /* MVME188 code CMMU 1 */
-#define VME_CMMU_I2 U(0xFFF7B000) /* MVME188 code CMMU 2 */
-#define VME_CMMU_I3 U(0xFFF77000) /* MVME188 code CMMU 3 */
-#define VME_CMMU_D0 U(0xFFF6F000) /* MVME188 data CMMU 0 */
-#define VME_CMMU_D1 U(0xFFF5F000) /* MVME188 data CMMU 1 */
-#define VME_CMMU_D2 U(0xFFF3F000) /* MVME188 data CMMU 2 */
-#define VME_CMMU_D3 U(0xFFF7F000) /* MVME188 data CMMU 3 */
+#define VME_CMMU_I0 0xFFF7E000 /* MVME188 code CMMU 0 */
+#define VME_CMMU_I1 0xFFF7D000 /* MVME188 code CMMU 1 */
+#define VME_CMMU_I2 0xFFF7B000 /* MVME188 code CMMU 2 */
+#define VME_CMMU_I3 0xFFF77000 /* MVME188 code CMMU 3 */
+#define VME_CMMU_D0 0xFFF6F000 /* MVME188 data CMMU 0 */
+#define VME_CMMU_D1 0xFFF5F000 /* MVME188 data CMMU 1 */
+#define VME_CMMU_D2 0xFFF3F000 /* MVME188 data CMMU 2 */
+#define VME_CMMU_D3 0xFFF7F000 /* MVME188 data CMMU 3 */
#endif /* CMMU_DEFS */
/* These are the hardware exceptions. */
@@ -124,5 +111,3 @@
#endif
#endif /* __MACHINE_BOARD_H__ */
-
-
diff --git a/sys/arch/mvme88k/include/cmmu.h b/sys/arch/mvme88k/include/cmmu.h
index 5e2c3ca0532..54e0fd5e418 100644
--- a/sys/arch/mvme88k/include/cmmu.h
+++ b/sys/arch/mvme88k/include/cmmu.h
@@ -1,4 +1,4 @@
-/* $OpenBSD: cmmu.h,v 1.11 2002/03/14 01:26:39 millert Exp $ */
+/* $OpenBSD: cmmu.h,v 1.12 2003/09/16 20:52:19 miod Exp $ */
/*
* Mach Operating System
* Copyright (c) 1993-1992 Carnegie Mellon University
@@ -58,10 +58,8 @@
*/
extern unsigned cpu_sets[MAX_CPUS];
extern int cpu_cmmu_ratio;
-extern unsigned number_cpus, master_cpu;
-extern unsigned cache_policy;
-extern unsigned number_cpus;
extern unsigned master_cpu;
+extern unsigned cache_policy;
extern int max_cpus, max_cmmus;
/*
diff --git a/sys/arch/mvme88k/include/cpu_number.h b/sys/arch/mvme88k/include/cpu_number.h
index afe5c25416d..4e0cca956cb 100644
--- a/sys/arch/mvme88k/include/cpu_number.h
+++ b/sys/arch/mvme88k/include/cpu_number.h
@@ -1,4 +1,4 @@
-/* $OpenBSD: cpu_number.h,v 1.10 2002/03/14 01:26:39 millert Exp $ */
+/* $OpenBSD: cpu_number.h,v 1.11 2003/09/16 20:52:19 miod Exp $ */
/*
* Mach Operating System
@@ -32,14 +32,17 @@
#ifdef _KERNEL
#ifndef _LOCORE
#include <machine/param.h>
-extern unsigned number_cpus;
static unsigned cpu_number(void);
static __inline__ unsigned cpu_number(void)
{
register unsigned cpu;
- if (brdtyp != BRD_188 || number_cpus == 1) return 0;
+
+ /* XXX what about 197DP? */
+ if (brdtyp != BRD_188)
+ return 0;
+
__asm__ ("ldcr %0, cr18" : "=r" (cpu));
return (cpu & 3);
}
diff --git a/sys/arch/mvme88k/include/locore.h b/sys/arch/mvme88k/include/locore.h
index c3d2c7b2262..78632f0c043 100644
--- a/sys/arch/mvme88k/include/locore.h
+++ b/sys/arch/mvme88k/include/locore.h
@@ -1,4 +1,4 @@
-/* $OpenBSD: locore.h,v 1.17 2003/01/13 20:12:16 miod Exp $ */
+/* $OpenBSD: locore.h,v 1.18 2003/09/16 20:52:19 miod Exp $ */
#ifndef _MACHINE_LOCORE_H_
#define _MACHINE_LOCORE_H_
@@ -37,18 +37,13 @@ void set_cpu_number(unsigned number);
void doboot(void);
int db_are_interrupts_disabled(void);
-void fubail(void);
-void subail(void);
-
int guarded_access(unsigned char *volatile address,
unsigned len, u_char *vec);
/* locore_c_routines.c */
-#ifdef M88100
void dae_print(unsigned *eframe);
void data_access_emulation(unsigned *eframe);
-#endif
unsigned getipl(void);
@@ -65,36 +60,26 @@ void dosoftint(void);
void MY_info(struct trapframe *f, caddr_t p, int flags, char *s);
void MY_info_done(struct trapframe *f, int flags);
void mvme_bootstrap(void);
-#ifdef MVME187
void m187_ext_int(u_int v, struct m88100_saved_state *eframe);
-#endif
-#ifdef MVME188
void m188_reset(void);
void m188_ext_int(u_int v, struct m88100_saved_state *eframe);
unsigned int safe_level(unsigned mask, unsigned curlevel);
-#endif
-#ifdef MVME197
void m197_ext_int(u_int v, struct m88100_saved_state *eframe);
-#endif
/* eh.S */
struct proc;
void proc_do_uret(struct proc *);
-#ifdef M88100
void sigsys(void);
void sigtrap(void);
void stepbpt(void);
void userbpt(void);
void syscall_handler(void);
-#endif
-#ifdef M88110
void m88110_sigsys(void);
void m88110_sigtrap(void);
void m88110_stepbpt(void);
void m88110_userbpt(void);
void m88110_syscall_handler(void);
-#endif
/* process.S */
void savectx(struct pcb *);
diff --git a/sys/arch/mvme88k/include/mvme187.h b/sys/arch/mvme88k/include/mvme187.h
index 3312cfb85fe..3fd066ba954 100644
--- a/sys/arch/mvme88k/include/mvme187.h
+++ b/sys/arch/mvme88k/include/mvme187.h
@@ -1,4 +1,4 @@
-/* $OpenBSD: mvme187.h,v 1.4 2001/12/19 05:06:26 smurph Exp $ */
+/* $OpenBSD: mvme187.h,v 1.5 2003/09/16 20:52:19 miod Exp $ */
/*
* Copyright (c) 1996 Nivas Madhur
* Copyright (c) 1999 Steve Murphree, Jr.
@@ -46,32 +46,21 @@
#ifndef __MACHINE_MVME187_H__
#define __MACHINE_MVME187_H__
/*
- * VME187 CPU board constants - derived from Luna88k
- * This file is include from <machine/board.h>
+ * MVME187 CPU board constants - derived from Luna88k
+ * This file is included from <machine/board.h>
*/
-/*
- * Something to put append a 'U' to a long constant if it's C so that
- * it'll be unsigned in both ANSI and traditional.
- */
-#ifndef UDEFINED
-#if defined(_LOCORE)
-# define U(num) num
-#else
-# if defined(__STDC__)
-# define U(num) num ## U
-# else
-# define U(num) num/**/U
-# endif
-#endif
-#endif
+#define BUG187_START 0xFF800000 /* start of BUG PROM */
+#define BUG187_SIZE 0x003FFFFF /* size of BUG PROM */
+#define SRAM_START 0xFFE00000 /* start of sram used by bug */
+#define SRAM_SIZE 0x0001FFFF /* size of sram */
-#define SBC_CMMU_I U(0xFFF77000) /* Single Board Computer code CMMU */
-#define SBC_CMMU_D U(0xFFF7F000) /* Single Board Computer data CMMU */
+#define SBC_CMMU_I 0xFFF77000 /* Single Board Computer code CMMU */
+#define SBC_CMMU_D 0xFFF7F000 /* Single Board Computer data CMMU */
-#define M187_ILEVEL U(0xFFF4203E) /* interrupt priority level */
-#define M187_IMASK U(0xFFF4203F) /* interrupt mask level */
-#define M187_ISRC U(0x00000000) /* interrupt mask src (NULL) */
-#define M187_IACK U(0xFFFE0000) /* interrupt ACK base */
+#define M187_ILEVEL 0xFFF4203E /* interrupt priority level */
+#define M187_IMASK 0xFFF4203F /* interrupt mask level */
+#define M187_ISRC 0x00000000 /* interrupt mask src (NULL) */
+#define M187_IACK 0xFFFE0000 /* interrupt ACK base */
-#endif __MACHINE_MVME187_H__
+#endif /* __MACHINE_MVME187_H__ */
diff --git a/sys/arch/mvme88k/include/mvme188.h b/sys/arch/mvme88k/include/mvme188.h
index 2ed9fb85efe..64d75c8670a 100644
--- a/sys/arch/mvme88k/include/mvme188.h
+++ b/sys/arch/mvme88k/include/mvme188.h
@@ -1,4 +1,4 @@
-/* $OpenBSD: mvme188.h,v 1.12 2002/01/14 21:34:41 miod Exp $ */
+/* $OpenBSD: mvme188.h,v 1.13 2003/09/16 20:52:19 miod Exp $ */
/*
* Copyright (c) 1999 Steve Murphree, Jr.
* All rights reserved.
@@ -46,117 +46,101 @@
#ifndef __MACHINE_MVME188_H__
#define __MACHINE_MVME188_H__
-/*
- * Something to put append a 'U' to a long constant if it's C so that
- * it'll be unsigned in both ANSI and traditional.
- */
-#ifndef UDEFINED
-#if defined(_LOCORE)
-#define U(num) num
-#else
-#if defined(__STDC__)
-#define U(num) num ## U
-#else
-#define U(num) num/**/U
-#endif
-#endif
-#endif
-
-#define VME_CMMU_I0 U(0xFFF7E000) /* MVME188 code CMMU 0 */
-#define VME_CMMU_I1 U(0xFFF7D000) /* MVME188 code CMMU 1 */
-#define VME_CMMU_I2 U(0xFFF7B000) /* MVME188 code CMMU 2 */
-#define VME_CMMU_I3 U(0xFFF77000) /* MVME188 code CMMU 3 */
-#define VME_CMMU_D0 U(0xFFF6F000) /* MVME188 data CMMU 0 */
-#define VME_CMMU_D1 U(0xFFF5F000) /* MVME188 data CMMU 1 */
-#define VME_CMMU_D2 U(0xFFF3F000) /* MVME188 data CMMU 2 */
-#define VME_CMMU_D3 U(0xFFF7F000) /* MVME188 data CMMU 3 */
-
-#define MVME188_EPROM U(0xFFC00000)
-#define MVME188_EPROM_SIZE U(0x00080000)
-#define MVME188_SRAM U(0xFFE00000)
-#define MVME188_SRAM_SIZE U(0x00020000)
-#define MVME188_UTILITY U(0xFF000000)
-#define MVME188_UTILITY_SIZE U(0x01000000)
-#define UTIL_START U(0xFFC00000) /* start of MVME188 utility space */
-#define UTIL_SIZE U(0x003FFFFF) /* size of MVME188 utility space */
+#define VME_CMMU_I0 0xFFF7E000 /* MVME188 code CMMU 0 */
+#define VME_CMMU_I1 0xFFF7D000 /* MVME188 code CMMU 1 */
+#define VME_CMMU_I2 0xFFF7B000 /* MVME188 code CMMU 2 */
+#define VME_CMMU_I3 0xFFF77000 /* MVME188 code CMMU 3 */
+#define VME_CMMU_D0 0xFFF6F000 /* MVME188 data CMMU 0 */
+#define VME_CMMU_D1 0xFFF5F000 /* MVME188 data CMMU 1 */
+#define VME_CMMU_D2 0xFFF3F000 /* MVME188 data CMMU 2 */
+#define VME_CMMU_D3 0xFFF7F000 /* MVME188 data CMMU 3 */
+
+#define MVME188_EPROM 0xFFC00000
+#define MVME188_EPROM_SIZE 0x00080000
+#define MVME188_SRAM 0xFFE00000
+#define MVME188_SRAM_SIZE 0x00020000
+#define MVME188_UTILITY 0xFF000000
+#define MVME188_UTILITY_SIZE 0x01000000
+#define UTIL_START 0xFFC00000 /* start of MVME188 utility space */
+#define UTIL_SIZE 0x003FFFFF /* size of MVME188 utility space */
/*
* MVME188 declarations for hardware level device registers and such.
*/
/* base address for the interrupt control registers */
-#define INTR_CONTROL_BASE U(0xfff84000)
-#define VMEA24SPACE U(0xEEC00000) /* VMEA24 master addr space (4 Meg) */
+#define INTR_CONTROL_BASE 0xfff84000
+#define VMEA24SPACE 0xEEC00000 /* VMEA24 master addr space (4 Meg) */
/* per-processor interrupt enable registers */
-#define MVME188_IEN0 U(0xFFF84004) /* interrupt enable CPU 0 */
-#define MVME188_IEN1 U(0xFFF84008) /* interrupt enable CPU 1 */
-#define MVME188_IEN2 U(0xFFF84010) /* interrupt enable CPU 2 */
-#define MVME188_IEN3 U(0xFFF84020) /* interrupt enable CPU 3 */
+#define MVME188_IEN0 0xFFF84004 /* interrupt enable CPU 0 */
+#define MVME188_IEN1 0xFFF84008 /* interrupt enable CPU 1 */
+#define MVME188_IEN2 0xFFF84010 /* interrupt enable CPU 2 */
+#define MVME188_IEN3 0xFFF84020 /* interrupt enable CPU 3 */
/* same as above */
-#define IEN0_REG U(0xfff84004)
-#define IEN1_REG U(0xfff84008)
-#define IEN2_REG U(0xfff84010)
-#define IEN3_REG U(0xfff84020)
+#define IEN0_REG 0xfff84004
+#define IEN1_REG 0xfff84008
+#define IEN2_REG 0xfff84010
+#define IEN3_REG 0xfff84020
-#define IENALL_REG U(0xfff8403c)
+#define IENALL_REG 0xfff8403c
-#define MVME188_IST U(0xFFF84040) /* interrupt status register */
-#define IST_REG U(0xfff84040) /* same as above */
+#define MVME188_IST 0xFFF84040 /* interrupt status register */
+#define IST_REG 0xfff84040 /* same as above */
-#define MVME188_SETSWI U(0xFFF84080) /* generate soft interrupt */
-#define MVME188_CLRSWI U(0xFFF84084) /* reset soft interrupt */
-#define MVME188_ISTATE U(0xFFF84088) /* HW interrupt status */
-#define MVME188_CLRINT U(0xFFF8408C) /* reset HW interrupt */
+#define MVME188_SETSWI 0xFFF84080 /* generate soft interrupt */
+#define MVME188_CLRSWI 0xFFF84084 /* reset soft interrupt */
+#define MVME188_ISTATE 0xFFF84088 /* HW interrupt status */
+#define MVME188_CLRINT 0xFFF8408C /* reset HW interrupt */
/* same as above */
-#define SETSWI_REG U(0xfff84080) /* SETSWI register addr */
-#define CLRSWI_REG U(0xfff84084) /* CLRSWI register addr */
-#define ISTATE_REG U(0xfff84088)
-#define CLRINT_REG U(0xfff8408C)
+#define SETSWI_REG 0xfff84080 /* SETSWI register addr */
+#define CLRSWI_REG 0xfff84084 /* CLRSWI register addr */
+#define ISTATE_REG 0xfff84088
+#define CLRINT_REG 0xfff8408C
-#define MVME188_GCSR U(0xFFF86000) /* 188 global control and status reg */
-#define MVME188_UCSR U(0xFFF87000) /* 188 utility control and status reg */
-#define MVME188_BASAD U(0xFFF87004) /* 188 base address reg */
-#define MVME188_GLBRES U(0xFFF8700C) /* 188 global reset reg */
+#define MVME188_GCSR 0xFFF86000 /* 188 global control and status reg */
+#define MVME188_UCSR 0xFFF87000 /* 188 utility control and status reg */
+#define MVME188_BASAD 0xFFF87004 /* 188 base address reg */
+#define MVME188_GLBRES 0xFFF8700C /* 188 global reset reg */
-#define GCSR_BASE U(0xfff86000)
+#define GCSR_BASE 0xfff86000
#define GLOBAL0 GCSR_BASE + 0x01
#define GLOBAL1 GCSR_BASE + 0x03
#define GLOBAL2 GCSR_BASE + 0x05
#define GLOBAL3 GCSR_BASE + 0x07
-#define GLB0 U(0xfff86001)
-#define GLB1 U(0xfff86003)
-#define GLB2 U(0xfff86005)
-#define GLB3 U(0xfff86007)
-#define M188_SYSCON U(0x00000040)
-#define UCSR_REG U(0xfff87000)
-#define GLBRES_REG U(0xfff8700C)
-
-#define MVME188_CCSR U(0xFFF88000) /* 188 CPU board control status reg */
-#define MVME188_ERROR U(0xFFF88004) /* 188 Mbus fault reg */
-#define MVME188_PCNFA U(0xFFF88008) /* 188 Pbus A decoder reg */
-#define MVME188_PCNFB U(0xFFF8800C) /* 188 Pbus B decoder reg */
-#define MVME188_EXTAD U(0xFFF88010) /* 188 A24 master A24-A31 addr reg */
-#define MVME188_WHOAMI U(0xFFF88018) /* 188 whoami reg */
-#define MVME188_WMAD U(0xFFF88020) /* 188 write mbus addr decoder reg */
-#define MVME188_RMAD U(0xFFF88024) /* 188 read mbus addr decoder reg */
-#define MVME188_WVAD U(0xFFF88028) /* 188 write vmebus addr decoder reg */
-#define MVME188_RVAD U(0xFFF8802C) /* 188 read vmebus adds decoder reg */
+#define GLB0 0xfff86001
+#define GLB1 0xfff86003
+#define GLB2 0xfff86005
+#define GLB3 0xfff86007
+#define M188_SYSCON 0x00000040
+#define UCSR_REG 0xfff87000
+#define GLBRES_REG 0xfff8700C
+
+#define MVME188_CCSR 0xFFF88000 /* 188 CPU board control status reg */
+#define MVME188_ERROR 0xFFF88004 /* 188 Mbus fault reg */
+#define MVME188_PCNFA 0xFFF88008 /* 188 Pbus A decoder reg */
+#define MVME188_PCNFB 0xFFF8800C /* 188 Pbus B decoder reg */
+#define MVME188_EXTAD 0xFFF88010 /* 188 A24 master A24-A31 addr reg */
+#define MVME188_WHOAMI 0xFFF88018 /* 188 whoami reg */
+#define MVME188_WMAD 0xFFF88020 /* 188 write mbus addr decoder reg */
+#define MVME188_RMAD 0xFFF88024 /* 188 read mbus addr decoder reg */
+#define MVME188_WVAD 0xFFF88028 /* 188 write vmebus addr decoder reg */
+#define MVME188_RVAD 0xFFF8802C /* 188 read vmebus adds decoder reg */
/* duplicates of above */
-#define CCSR_REG U(0xfff88000)
-#define ERROR_REG U(0xfff88004) /* ERROR register addr */
-#define PCNFA_REG U(0xfff88008)
-#define PCNFB_REG U(0xfff8800c)
-#define EXTAD_REG U(0xfff88010)
-#define EXTAM_REG U(0xfff88014)
-#define WHOAMI_REG U(0xfff88018) /* WHOAMI register addr */
-#define WMAD_REG U(0xfff88020)
-#define RMAD_REG U(0xfff88024)
-#define WVAD_REG U(0xfff88028)
-#define RVAD_REG U(0xfff8802c)
+#define CCSR_REG 0xfff88000
+#define ERROR_REG 0xfff88004 /* ERROR register addr */
+#define PCNFA_REG 0xfff88008
+#define PCNFB_REG 0xfff8800c
+#define EXTAD_REG 0xfff88010
+#define EXTAM_REG 0xfff88014
+#define WHOAMI_REG 0xfff88018 /* WHOAMI register addr */
+#define WMAD_REG 0xfff88020
+#define RMAD_REG 0xfff88024
+#define WVAD_REG 0xfff88028
+#define RVAD_REG 0xfff8802c
#define MAD_MDS 0x07 /* 188 MAD Device Select bits */
@@ -192,22 +176,23 @@
* processor dependend code section
* main goal is to concentrate HW dependencies into a few lines
*/
-#define ISR_LOW_SOFTINT_MASK(cpu) (1<<cpu)
-#define ISR_HIGH_SOFTINT_MASK(cpu) (1<<(cpu + 24))
+#define ISR_LOW_SOFTINT_MASK(cpu) (1 << (cpu))
+#define ISR_HIGH_SOFTINT_MASK(cpu) (1 << ((cpu) + 24))
#define ISR_LOW_SOFTMASK 0xf
-#define ISR_HIGH_SOFTMASK (0xf<<24)
-#define ISR_SOFTINT_EXCEPT_MASK(cpu) (ISR_LOW_SOFTINT_MASK(cpu) | ISR_HIGH_SOFTINT_MASK(cpu) | 0xf0fffff0)
-#define ISR_CLOCKINT_MASK (1<<IEN_CIOI_LOG)
-
-#define ISR_RESET_NMI *(int *volatile)MVME188_CLRINT = 1<<CLRINT_CLRABRTI_LOG
-#define ISR_RESET_SYSFAIL *(int *volatile)MVME188_CLRINT = 1<<CLRINT_CLRSFI_LOG
-#define ISR_RESET_ACFAIL *(int *volatile)MVME188_CLRINT = 1<<CLRINT_CLRACFI_LOG
+#define ISR_HIGH_SOFTMASK (0xf << 24)
+#define ISR_SOFTINT_EXCEPT_MASK(cpu) \
+ (ISR_LOW_SOFTINT_MASK(cpu) | ISR_HIGH_SOFTINT_MASK(cpu) | 0xf0fffff0)
+#define ISR_CLOCKINT_MASK (1 << IEN_CIOI_LOG)
+
+#define ISR_RESET_NMI *(int *volatile)MVME188_CLRINT = 1 << CLRINT_CLRABRTI_LOG
+#define ISR_RESET_SYSFAIL *(int *volatile)MVME188_CLRINT = 1 << CLRINT_CLRSFI_LOG
+#define ISR_RESET_ACFAIL *(int *volatile)MVME188_CLRINT = 1 << CLRINT_CLRACFI_LOG
#define ISR_RESET_LOW_SOFTINT(cpu) *(int *)MVME188_CLRSWI = ISR_LOW_SOFTINT_MASK(cpu)
-#define ISR_RESET_HIGH_SOFTINT(cpu) *(int *)MVME188_CLRSWI = (1<<(cpu + MAX_CPUS))
+#define ISR_RESET_HIGH_SOFTINT(cpu) *(int *)MVME188_CLRSWI = (1 << (cpu + MAX_CPUS))
#define ISR_DETERMINE_LOW_SOFTINT(cpu) *(unsigned int *volatile)MVME188_IST & ISR_LOW_SOFTINT_MASK(cpu)
#define ISR_DETERMINE_HIGH_SOFTINT(cpu) *(unsigned int *volatile)MVME188_IST & ISR_HIGH_SOFTINT_MASK(cpu)
#define ISR_GENERATE_LOW_SOFTINT(cpu) *((unsigned int *volatile)MVME188_SETSWI) = ISR_LOW_SOFTINT_MASK(cpu)
-#define ISR_GENERATE_HIGH_SOFTINT(cpu) *((unsigned int *volatile)MVME188_SETSWI) = (1<<(cpu + MAX_CPUS))
+#define ISR_GENERATE_HIGH_SOFTINT(cpu) *((unsigned int *volatile)MVME188_SETSWI) = (1 << (cpu + MAX_CPUS))
#define ISR_RESET_MACHINE *((unsigned *volatile) MVME188_GLBRES) = 1
#define ISR_GET_CURRENT_MASK(cpu) *int_mask_reg[cpu] & *(int *volatile)MVME188_IST
@@ -226,40 +211,40 @@
/* the following codes are the INT exception enable and status bits. */
/* Refer to MVME188 RISC Microcomputer User's Manual, 4-10. */
-#define ABRT_BIT U(0x80000000) /* 31 */
-#define ACF_BIT U(0x40000000) /* 30 */
-#define ARBTO_BIT U(0x20000000) /* 29 */
-#define DTI_BIT U(0x10000000) /* 28 */
-#define SWI7_BIT U(0x08000000) /* 27 */
-#define SWI6_BIT U(0x04000000) /* 26 */
-#define SWI5_BIT U(0x02000000) /* 25 */
-#define SWI4_BIT U(0x01000000) /* 24 */
-#define IRQ7_BIT U(0x00800000) /* 23 */
-#define CIOI_BIT U(0x00200000) /* 21 */
-#define SF_BIT U(0x00100000) /* 20 */
-#define IRQ6_BIT U(0x00080000) /* 19 */
-#define DI_BIT U(0x00020000) /* 17 */
-#define SIGHPI_BIT U(0x00010000) /* 16 */
-#define IRQ5_BIT U(0x00004000) /* 14 */
-#define IRQ4_BIT U(0x00001000) /* 12 */
-#define IRQ3_BIT U(0x00000400) /* 10 */
-#define LMI_BIT U(0x00000100) /* 08 */
-#define SIGLPI_BIT U(0x00000080) /* 07 */
-#define IRQ2_BIT U(0x00000040) /* 06 */
-#define IRQ1_BIT U(0x00000010) /* 04 */
-#define SWI3_BIT U(0x00000008) /* 03 */
-#define SWI2_BIT U(0x00000004) /* 02 */
-#define SWI1_BIT U(0x00000002) /* 01 */
-#define SWI0_BIT U(0x00000001) /* 00 */
+#define ABRT_BIT 0x80000000 /* 31 */
+#define ACF_BIT 0x40000000 /* 30 */
+#define ARBTO_BIT 0x20000000 /* 29 */
+#define DTI_BIT 0x10000000 /* 28 */
+#define SWI7_BIT 0x08000000 /* 27 */
+#define SWI6_BIT 0x04000000 /* 26 */
+#define SWI5_BIT 0x02000000 /* 25 */
+#define SWI4_BIT 0x01000000 /* 24 */
+#define IRQ7_BIT 0x00800000 /* 23 */
+#define CIOI_BIT 0x00200000 /* 21 */
+#define SF_BIT 0x00100000 /* 20 */
+#define IRQ6_BIT 0x00080000 /* 19 */
+#define DI_BIT 0x00020000 /* 17 */
+#define SIGHPI_BIT 0x00010000 /* 16 */
+#define IRQ5_BIT 0x00004000 /* 14 */
+#define IRQ4_BIT 0x00001000 /* 12 */
+#define IRQ3_BIT 0x00000400 /* 10 */
+#define LMI_BIT 0x00000100 /* 08 */
+#define SIGLPI_BIT 0x00000080 /* 07 */
+#define IRQ2_BIT 0x00000040 /* 06 */
+#define IRQ1_BIT 0x00000010 /* 04 */
+#define SWI3_BIT 0x00000008 /* 03 */
+#define SWI2_BIT 0x00000004 /* 02 */
+#define SWI1_BIT 0x00000002 /* 01 */
+#define SWI0_BIT 0x00000001 /* 00 */
/*
* masks and offsets for IST
* These are a combination of the above
*/
-#define HW_FAILURE_MASK U(0xE0100000) /* hardware irq bits */
-#define SOFT_INTERRUPT_MASK U(0x0F00000F) /* software irq bits */
-#define VME_INTERRUPT_MASK U(0x00885450) /* vme irq bits */
-#define OBIO_INTERRUPT_MASK U(0x10330180) /* on board I/O */
+#define HW_FAILURE_MASK 0xE0100000 /* hardware irq bits */
+#define SOFT_INTERRUPT_MASK 0x0F00000F /* software irq bits */
+#define VME_INTERRUPT_MASK 0x00885450 /* vme irq bits */
+#define OBIO_INTERRUPT_MASK 0x10330180 /* on board I/O */
#define HW_FAILURE_ACF ACF_BIT /* AC failure */
#define HW_FAILURE_ABRTO ARBTO_BIT /* Arbiter timeout */
@@ -283,14 +268,14 @@
#define MASK_LVL_4 (LVL7 | LVL6 | LVL5)
#define MASK_LVL_5 (LVL7 | LVL6)
#define MASK_LVL_6 (LVL7)
-#define MASK_LVL_7 U(0x00000000) /* all ints disabled */
+#define MASK_LVL_7 0x00000000 /* all ints disabled */
/* these are the various Z8536 CIO counter/timer registers */
-#define CIO_BASE U(0xfff83000)
-#define CIO_PORTC U(0xfff83000)
-#define CIO_PORTB U(0xfff83004)
-#define CIO_PORTA U(0xfff83008)
-#define CIO_CTRL U(0xfff8300c)
+#define CIO_BASE 0xfff83000
+#define CIO_PORTC 0xfff83000
+#define CIO_PORTB 0xfff83004
+#define CIO_PORTA 0xfff83008
+#define CIO_CTRL 0xfff8300c
#define CIO_MICR 0x00 /* Master interrupt control register */
#define CIO_MICR_MIE 0x80
@@ -345,37 +330,37 @@
#define CIO_IP 0x20 /* CTC Interrupt pending */
/* these are the DART read registers */
-#define DART_BASE U(0xfff82000)
-#define DART_MRA U(0xfff82000) /* mode A */
-#define DART_SRA U(0xfff82004) /* status A */
-#define DART_RBA U(0xfff8200c) /* receive buffer A */
-#define DART_IPCR U(0xfff82010) /* input port change */
-#define DART_ISR U(0xfff82014) /* interrupt status */
-#define DART_CUR U(0xfff82018) /* count upper */
-#define DART_CLR U(0xfff8201c) /* count lower */
-#define DART_MR1B U(0xfff82020) /* mode B */
-#define DART_SRB U(0xfff82024) /* status B */
-#define DART_RBB U(0xfff8202c) /* receive buffer B */
-#define DART_IVR U(0xfff82030) /* interrupt vector */
-#define DART_INP U(0xfff82034) /* input port */
-#define DART_STARTC U(0xfff82038) /* start counter cmd */
-#define DART_STOPC U(0xfff8203c) /* stop counter cmd */
+#define DART_BASE 0xfff82000
+#define DART_MRA 0xfff82000 /* mode A */
+#define DART_SRA 0xfff82004 /* status A */
+#define DART_RBA 0xfff8200c /* receive buffer A */
+#define DART_IPCR 0xfff82010 /* input port change */
+#define DART_ISR 0xfff82014 /* interrupt status */
+#define DART_CUR 0xfff82018 /* count upper */
+#define DART_CLR 0xfff8201c /* count lower */
+#define DART_MR1B 0xfff82020 /* mode B */
+#define DART_SRB 0xfff82024 /* status B */
+#define DART_RBB 0xfff8202c /* receive buffer B */
+#define DART_IVR 0xfff82030 /* interrupt vector */
+#define DART_INP 0xfff82034 /* input port */
+#define DART_STARTC 0xfff82038 /* start counter cmd */
+#define DART_STOPC 0xfff8203c /* stop counter cmd */
/* these are the DART write registers */
-#define DART_CSRA U(0xfff82004) /* clock select A */
-#define DART_CRA U(0xfff82008) /* command A */
-#define DART_TBA U(0xfff8200c) /* transmit buffer A */
-#define DART_ACR U(0xfff82010) /* auxiliary control */
-#define DART_IMR U(0xfff82014) /* interrupt mask reg*/
-#define DART_CTUR U(0xfff82018) /* counter/timer MSB */
-#define DART_CTLR U(0xfff8201c) /* counter/timer LSB */
-#define DART_MRB U(0xfff82020) /* mode B */
-#define DART_CSRB U(0xfff82024) /* clock select B */
-#define DART_CRB U(0xfff82028) /* command B */
-#define DART_TBB U(0xfff8202c) /* transmit buffer B */
-#define DART_OPCR U(0xfff82034) /* output port config*/
-#define DART_OPRS U(0xfff82038) /* output port set */
-#define DART_OPRR U(0xfff8203c) /* output port reset */
+#define DART_CSRA 0xfff82004 /* clock select A */
+#define DART_CRA 0xfff82008 /* command A */
+#define DART_TBA 0xfff8200c /* transmit buffer A */
+#define DART_ACR 0xfff82010 /* auxiliary control */
+#define DART_IMR 0xfff82014 /* interrupt mask reg*/
+#define DART_CTUR 0xfff82018 /* counter/timer MSB */
+#define DART_CTLR 0xfff8201c /* counter/timer LSB */
+#define DART_MRB 0xfff82020 /* mode B */
+#define DART_CSRB 0xfff82024 /* clock select B */
+#define DART_CRB 0xfff82028 /* command B */
+#define DART_TBB 0xfff8202c /* transmit buffer B */
+#define DART_OPCR 0xfff82034 /* output port config*/
+#define DART_OPRS 0xfff82038 /* output port set */
+#define DART_OPRR 0xfff8203c /* output port reset */
#ifndef _LOCORE
@@ -390,9 +375,9 @@ extern unsigned int *volatile int_mask_reg[MAX_CPUS];
#endif
-#define M188_IACK U(0xFFF85000)
+#define M188_IACK 0xFFF85000
#define M188_IVEC 0x40 /* vector returned upon MVME188 int */
-#endif /* __MACHINE_MVME188_H__ */
+#endif /* __MACHINE_MVME188_H__ */
diff --git a/sys/arch/mvme88k/include/mvme197.h b/sys/arch/mvme88k/include/mvme197.h
index 0f77f07e1f2..58781931f2d 100644
--- a/sys/arch/mvme88k/include/mvme197.h
+++ b/sys/arch/mvme88k/include/mvme197.h
@@ -1,4 +1,4 @@
-/* $OpenBSD: mvme197.h,v 1.3 2001/12/19 05:06:26 smurph Exp $ */
+/* $OpenBSD: mvme197.h,v 1.4 2003/09/16 20:52:19 miod Exp $ */
/*
* Copyright (c) 1996 Nivas Madhur
* Copyright (c) 1999 Steve Murphree, Jr.
@@ -45,30 +45,20 @@
*/
#ifndef __MACHINE_MVME197_H__
#define __MACHINE_MVME197_H__
-/*
- * VME187 CPU board constants - derived from Luna88k
- * This file is include from <machine/board.h>
- */
/*
- * Something to put append a 'U' to a long constant if it's C so that
- * it'll be unsigned in both ANSI and traditional.
+ * MVME197 CPU board constants - derived from Luna88k
+ * This file is included from <machine/board.h>
*/
-#ifndef UDEFINED
-#if defined(_LOCORE)
-# define U(num) num
-#else
-# if defined(__STDC__)
-# define U(num) num ## U
-# else
-# define U(num) num/**/U
-# endif
-#endif
-#endif
-#define M197_ILEVEL U(0xFFF00064) /* interrupt priority level */
-#define M197_IMASK U(0xFFF00065) /* interrupt mask level */
-#define M197_ISRC U(0xFFF0006F) /* interrupt SRC */
-#define M197_IACK U(0xFFF00100) /* interrupt ACK base */
+#define FLASH_START 0xFF800000 /* start of flash memory area */
+#define FLASH_SIZE 0x003FFFFF
+#define BUG197_START 0xFFF80000 /* start of BUG PROM (in OBIO) */
+#define BUG197_SIZE 0x0003FFFF
+
+#define M197_ILEVEL 0xFFF00064 /* interrupt priority level */
+#define M197_IMASK 0xFFF00065 /* interrupt mask level */
+#define M197_ISRC 0xFFF0006F /* interrupt SRC */
+#define M197_IACK 0xFFF00100 /* interrupt ACK base */
-#endif __MACHINE_MVME197_H__
+#endif /* __MACHINE_MVME197_H__ */
diff --git a/sys/arch/mvme88k/include/mvme1x7.h b/sys/arch/mvme88k/include/mvme1x7.h
index fe1e74f5e53..29bb00a4c60 100644
--- a/sys/arch/mvme88k/include/mvme1x7.h
+++ b/sys/arch/mvme88k/include/mvme1x7.h
@@ -1,4 +1,4 @@
-/* $OpenBSD: mvme1x7.h,v 1.9 2001/12/19 05:06:26 smurph Exp $ */
+/* $OpenBSD: mvme1x7.h,v 1.10 2003/09/16 20:52:19 miod Exp $ */
/*
* Copyright (c) 1996 Nivas Madhur
* Copyright (c) 1999 Steve Murphree, Jr.
@@ -45,55 +45,33 @@
*/
#ifndef __MACHINE_MVME1X7_H__
#define __MACHINE_MVME1X7_H__
-/*
- * VME1x7 CPU board constants - derived from Luna88k
- */
/*
- * Something to put append a 'U' to a long constant if it's C so that
- * it'll be unsigned in both ANSI and traditional.
+ * VME1x7 CPU board constants - derived from Luna88k
*/
-#ifndef UDEFINED
-#if defined(_LOCORE)
-#define U(num) num
-#else
-#if defined(__STDC__)
-#define U(num) num ## U
-#else
-#define U(num) num/**/U
-#endif
-#endif
-#endif
-#define BUGROM_START U(0xFF800000) /* start of BUG PROM */
-#define BUGROM_SIZE U(0x003FFFFF) /* size of BUG PROM */
-#define SRAM_START U(0xFFE00000) /* start of sram used by bug */
-#define SRAM_SIZE U(0x0001FFFF) /* size of sram */
-#define OBIO_START U(0xFFF00000) /* start of local IO */
-#define OBIO_SIZE U(0x000EFFFF) /* size of obio space */
-#define UTIL_START U(0xFFC00000) /* start of MVME188 utility space */
-#define UTIL_SIZE U(0x003FFFFF) /* size of MVME188 utility space */
+#define OBIO_START 0xFFF00000 /* start of local IO */
+#define OBIO_SIZE 0x000EFFFF /* size of obio space */
-#define INT_PRI_LEVEL U(0xFFF4203E) /* interrupt priority level */
-#define INT_MASK_LEVEL U(0xFFF4203F) /* interrupt mask level */
+#define INT_PRI_LEVEL 0xFFF4203E /* interrupt priority level */
+#define INT_MASK_LEVEL 0xFFF4203F /* interrupt mask level */
-#define LOCAL_IO_DEVS U(0xFFF00000) /* local IO devices */
+#define LOCAL_IO_DEVS 0xFFF00000 /* local IO devices */
-#define UTIL_ADDR U(0xFFC02000) /* PCCchip2 Regs */
-#define MEM_CTLR U(0xFFF43000) /* MEMC040 mem controller */
-#define SCC_ADDR U(0xFFF45000) /* Cirrus Chip */
-#define LANCE_ADDR U(0xFFF46000) /* 82596CA */
-#define SCSI_ADDR U(0xFFF47000) /* NCR 710 address */
-#define NCR710_SIZE U(0x00000040) /* NCR 710 size */
-#define MK48T08_ADDR U(0xFFFC0000) /* BBRAM, TOD */
+#define MEM_CTLR 0xFFF43000 /* MEMC040 mem controller */
+#define SCC_ADDR 0xFFF45000 /* Cirrus Chip */
+#define LANCE_ADDR 0xFFF46000 /* 82596CA */
+#define SCSI_ADDR 0xFFF47000 /* NCR 710 address */
+#define NCR710_SIZE 0x00000040 /* NCR 710 size */
+#define MK48T08_ADDR 0xFFFC0000 /* BBRAM, TOD */
-#define TOD_CAL_CTL U(0xFFFC1FF8) /* calendar control register */
-#define TOD_CAL_SEC U(0xFFFC1FF9) /* seconds */
-#define TOD_CAL_MIN U(0xFFFC1FFA) /* minutes */
-#define TOD_CAL_HOUR U(0xFFFC1FFB) /* hours */
-#define TOD_CAL_DOW U(0xFFFC1FFC) /* Day Of the Week */
-#define TOD_CAL_DAY U(0xFFFC1FFD) /* days */
-#define TOD_CAL_MON U(0xFFFC1FFE) /* months */
-#define TOD_CAL_YEAR U(0xFFFC1FFF) /* years */
+#define TOD_CAL_CTL 0xFFFC1FF8 /* calendar control register */
+#define TOD_CAL_SEC 0xFFFC1FF9 /* seconds */
+#define TOD_CAL_MIN 0xFFFC1FFA /* minutes */
+#define TOD_CAL_HOUR 0xFFFC1FFB /* hours */
+#define TOD_CAL_DOW 0xFFFC1FFC /* Day Of the Week */
+#define TOD_CAL_DAY 0xFFFC1FFD /* days */
+#define TOD_CAL_MON 0xFFFC1FFE /* months */
+#define TOD_CAL_YEAR 0xFFFC1FFF /* years */
-#endif /* __MACHINE_MVME1X7_H__ */
+#endif /* __MACHINE_MVME1X7_H__ */
diff --git a/sys/arch/mvme88k/include/pmap_table.h b/sys/arch/mvme88k/include/pmap_table.h
index 4fb8c331ab7..8d12e028e70 100644
--- a/sys/arch/mvme88k/include/pmap_table.h
+++ b/sys/arch/mvme88k/include/pmap_table.h
@@ -1,4 +1,4 @@
-/* $OpenBSD: pmap_table.h,v 1.8 2002/03/14 01:26:39 millert Exp $ */
+/* $OpenBSD: pmap_table.h,v 1.9 2003/09/16 20:52:19 miod Exp $ */
/*
* Mach Operating System
* Copyright (c) 1992 Carnegie Mellon University
@@ -25,25 +25,25 @@
* the rights to redistribute these changes.
*/
+#ifndef __MACHINE_PMAP_TABLE_H__
+#define __MACHINE_PMAP_TABLE_H__
+
/*
- * HISTORY
+ * Built-in mappings list.
+ * An entry is considered invalid if pm_size = 0, and
+ * end of list is indicated by pm_size 0xffffffff
*/
-
-
-/* an entry is considered invalid if pm_size = 0 */
-/* end of list is indicated by pm_size 0xffffffff */
-#ifndef __MACHINE_PAMP_TABLE_H__
-#define __MACHINE_PAMP_TABLE_H__
typedef struct {
- vm_offset_t phys_start; /* in bytes */
- vm_offset_t virt_start; /* in bytes */
- unsigned int size; /* in bytes */
- unsigned int prot; /* vm_prot_read, vm_prot_write */
- unsigned int cacheability; /* none, writeback, normal */
+ vm_offset_t phys_start; /* in bytes */
+ vm_offset_t virt_start; /* in bytes */
+ unsigned int size; /* in bytes */
+ unsigned int prot; /* vm_prot_read, vm_prot_write */
+ unsigned int cacheability; /* none, writeback, normal */
} pmap_table_entry;
-typedef pmap_table_entry *pmap_table_t;
+typedef const pmap_table_entry *pmap_table_t;
+
+pmap_table_t pmap_table_build(void);
-pmap_table_t pmap_table_build(unsigned memory_size);
-#endif /* __MACHINE_PAMP_TABLE_H__ */
+#endif /* __MACHINE_PMAP_TABLE_H__ */
diff --git a/sys/arch/mvme88k/mvme88k/cmmu.c b/sys/arch/mvme88k/mvme88k/cmmu.c
index a888a36ec24..dc7be3bc3bc 100644
--- a/sys/arch/mvme88k/mvme88k/cmmu.c
+++ b/sys/arch/mvme88k/mvme88k/cmmu.c
@@ -1,4 +1,4 @@
-/* $OpenBSD: cmmu.c,v 1.20 2002/03/14 01:26:39 millert Exp $ */
+/* $OpenBSD: cmmu.c,v 1.21 2003/09/16 20:52:22 miod Exp $ */
/*
* Copyright (c) 1998 Steve Murphree, Jr.
* Copyright (c) 1996 Nivas Madhur
@@ -61,7 +61,6 @@
#include <sys/types.h>
#include <sys/simplelock.h>
#include <machine/cmmu.h>
-#include <machine/cpus.h>
#include <machine/cpu_number.h>
/*
@@ -73,7 +72,6 @@
struct simplelock cmmu_cpu_lock;
unsigned cache_policy = /*CACHE_INH*/ 0;
unsigned cpu_sets[MAX_CPUS];
-unsigned number_cpus = 0;
unsigned master_cpu = 0;
int max_cpus, max_cmmus;
int cpu_cmmu_ratio;
diff --git a/sys/arch/mvme88k/mvme88k/machdep.c b/sys/arch/mvme88k/mvme88k/machdep.c
index 0736f31bf81..2fc8f1a1c4a 100644
--- a/sys/arch/mvme88k/mvme88k/machdep.c
+++ b/sys/arch/mvme88k/mvme88k/machdep.c
@@ -1,4 +1,4 @@
-/* $OpenBSD: machdep.c,v 1.111 2003/09/16 20:46:11 miod Exp $ */
+/* $OpenBSD: machdep.c,v 1.112 2003/09/16 20:52:22 miod Exp $ */
/*
* Copyright (c) 1998, 1999, 2000, 2001 Steve Murphree, Jr.
* Copyright (c) 1996 Nivas Madhur
@@ -126,7 +126,6 @@ void consinit(void);
vm_offset_t size_memory(void);
vm_offset_t memsize187(void);
int getcpuspeed(void);
-int getscsiid(void);
void identifycpu(void);
void save_u_area(struct proc *, vm_offset_t);
void load_u_area(struct proc *);
@@ -160,9 +159,16 @@ unsigned int *volatile int_mask_reg[MAX_CPUS] = {
};
#endif
+#if defined(MVME187) || defined(MVME197)
+volatile vm_offset_t obiova;
+#ifdef MVME187
volatile vm_offset_t bugromva;
volatile vm_offset_t sramva;
-volatile vm_offset_t obiova;
+#endif
+#ifdef MVME197
+volatile vm_offset_t flashva;
+#endif
+#endif
#ifdef MVME188
volatile vm_offset_t utilva;
#endif
@@ -520,14 +526,11 @@ cpu_startup()
*/
uarea_pages = UADDR;
uvm_map(kernel_map, (vaddr_t *)&uarea_pages, USPACE,
- NULL, UVM_UNKNOWN_OFFSET, 0, UVM_MAPFLAG(UVM_PROT_NONE,
- UVM_PROT_NONE,
- UVM_INH_NONE,
- UVM_ADV_NORMAL, 0));
- if (uarea_pages != UADDR) {
- printf("uarea_pages %x: UADDR not free\n", uarea_pages);
- panic("bad UADDR");
- }
+ NULL, UVM_UNKNOWN_OFFSET, 0,
+ UVM_MAPFLAG(UVM_PROT_NONE, UVM_PROT_NONE, UVM_INH_NONE,
+ UVM_ADV_NORMAL, 0));
+ if (uarea_pages != UADDR)
+ panic("uarea_pages %x: UADDR not free\n", uarea_pages);
/*
* Grab machine dependant memory spaces
@@ -540,48 +543,58 @@ cpu_startup()
*/
sramva = SRAM_START;
uvm_map(kernel_map, (vaddr_t *)&sramva, SRAM_SIZE,
- NULL, UVM_UNKNOWN_OFFSET, 0, UVM_MAPFLAG(UVM_PROT_NONE,
- UVM_PROT_NONE,
- UVM_INH_NONE,
- UVM_ADV_NORMAL, 0));
-
- if (sramva != SRAM_START) {
- printf("sramva %x: SRAM not free\n", sramva);
- panic("bad sramva");
- }
+ NULL, UVM_UNKNOWN_OFFSET, 0,
+ UVM_MAPFLAG(UVM_PROT_NONE, UVM_PROT_NONE, UVM_INH_NONE,
+ UVM_ADV_NORMAL, 0));
+ if (sramva != SRAM_START)
+ panic("sramva %x: SRAM not free\n", sramva);
+
+ /*
+ * Grab the BUGROM space that we hardwired in pmap_bootstrap
+ */
+ bugromva = BUG187_START;
+ uvm_map(kernel_map, (vaddr_t *)&bugromva, BUG187_SIZE,
+ NULL, UVM_UNKNOWN_OFFSET, 0,
+ UVM_MAPFLAG(UVM_PROT_NONE, UVM_PROT_NONE, UVM_INH_NONE,
+ UVM_ADV_NORMAL, 0));
+ if (bugromva != BUG187_START)
+ panic("bugromva %x: BUGROM not free\n", bugromva);
+
+ /*
+ * Grab the OBIO space that we hardwired in pmap_bootstrap
+ */
+ obiova = OBIO_START;
+ uvm_map(kernel_map, (vaddr_t *)&obiova, OBIO_SIZE,
+ NULL, UVM_UNKNOWN_OFFSET, 0,
+ UVM_MAPFLAG(UVM_PROT_NONE, UVM_PROT_NONE, UVM_INH_NONE,
+ UVM_ADV_NORMAL, 0));
+ if (obiova != OBIO_START)
+ panic("obiova %x: OBIO not free\n", obiova);
+ break;
#endif
#ifdef MVME197
case BRD_197:
-#endif
-#if defined(MVME187) || defined(MVME197)
/*
- * Grab the BUGROM space that we hardwired in pmap_bootstrap
+ * Grab the FLASH space that we hardwired in pmap_bootstrap
*/
- bugromva = BUGROM_START;
-
- uvm_map(kernel_map, (vaddr_t *)&bugromva, BUGROM_SIZE,
- NULL, UVM_UNKNOWN_OFFSET, 0, UVM_MAPFLAG(UVM_PROT_NONE,
- UVM_PROT_NONE,
- UVM_INH_NONE,
- UVM_ADV_NORMAL, 0));
- if (bugromva != BUGROM_START) {
- printf("bugromva %x: BUGROM not free\n", bugromva);
- panic("bad bugromva");
- }
+ flashva = FLASH_START;
+ uvm_map(kernel_map, (vaddr_t *)&flashva, FLASH_SIZE,
+ NULL, UVM_UNKNOWN_OFFSET, 0,
+ UVM_MAPFLAG(UVM_PROT_NONE, UVM_PROT_NONE, UVM_INH_NONE,
+ UVM_ADV_NORMAL, 0));
+ if (flashva != FLASH_START)
+ panic("flashva %x: FLASH not free\n", flashva);
/*
* Grab the OBIO space that we hardwired in pmap_bootstrap
*/
obiova = OBIO_START;
uvm_map(kernel_map, (vaddr_t *)&obiova, OBIO_SIZE,
- NULL, UVM_UNKNOWN_OFFSET, 0, UVM_MAPFLAG(UVM_PROT_NONE,
- UVM_PROT_NONE,
- UVM_INH_NONE,
- UVM_ADV_NORMAL, 0));
- if (obiova != OBIO_START) {
- printf("obiova %x: OBIO not free\n", obiova);
- panic("bad OBIO");
- }
+ NULL, UVM_UNKNOWN_OFFSET, 0,
+ UVM_MAPFLAG(UVM_PROT_NONE, UVM_PROT_NONE, UVM_INH_NONE,
+ UVM_ADV_NORMAL, 0));
+ if (obiova != OBIO_START)
+ panic("obiova %x: OBIO not free\n", obiova);
break;
#endif
#ifdef MVME188
@@ -591,14 +604,11 @@ cpu_startup()
*/
utilva = MVME188_UTILITY;
uvm_map(kernel_map, (vaddr_t *)&utilva, MVME188_UTILITY_SIZE,
- NULL, UVM_UNKNOWN_OFFSET, 0, UVM_MAPFLAG(UVM_PROT_NONE,
- UVM_PROT_NONE,
- UVM_INH_NONE,
- UVM_ADV_NORMAL, 0));
- if (utilva != MVME188_UTILITY) {
- printf("utilva %x: UTILITY area not free\n", utilva);
- panic("bad utilva");
- }
+ NULL, UVM_UNKNOWN_OFFSET, 0,
+ UVM_MAPFLAG(UVM_PROT_NONE, UVM_PROT_NONE, UVM_INH_NONE,
+ UVM_ADV_NORMAL, 0));
+ if (utilva != MVME188_UTILITY)
+ panic("utilva %x: UTILITY area not free\n", utilva);
break;
#endif
}
@@ -609,9 +619,8 @@ cpu_startup()
*/
size = MAXBSIZE * nbuf;
if (uvm_map(kernel_map, (vaddr_t *) &buffers, round_page(size),
- NULL, UVM_UNKNOWN_OFFSET, 0,
- UVM_MAPFLAG(UVM_PROT_NONE, UVM_PROT_NONE, UVM_INH_NONE,
- UVM_ADV_NORMAL, 0)))
+ NULL, UVM_UNKNOWN_OFFSET, 0, UVM_MAPFLAG(UVM_PROT_NONE,
+ UVM_PROT_NONE, UVM_INH_NONE, UVM_ADV_NORMAL, 0)))
panic("cpu_startup: cannot allocate VM for buffers");
minaddr = (vaddr_t)buffers;
@@ -654,19 +663,19 @@ cpu_startup()
* limits the number of processes exec'ing at any time.
*/
exec_map = uvm_km_suballoc(kernel_map, &minaddr, &maxaddr,
- 16*NCARGS, VM_MAP_PAGEABLE, FALSE, NULL);
+ 16 * NCARGS, VM_MAP_PAGEABLE, FALSE, NULL);
/*
* Allocate map for physio.
*/
phys_map = uvm_km_suballoc(kernel_map, &minaddr, &maxaddr,
- VM_PHYS_SIZE, 0, FALSE, NULL);
+ VM_PHYS_SIZE, 0, FALSE, NULL);
/*
* Allocate map for external I/O.
*/
iomap_map = uvm_km_suballoc(kernel_map, &iomapbase, &maxaddr,
- IOMAP_SIZE, 0, FALSE, NULL);
+ IOMAP_SIZE, 0, FALSE, NULL);
iomap_extent = extent_create("iomap", iomapbase,
iomapbase + IOMAP_SIZE, M_DEVBUF, NULL, 0, EX_NOWAIT);
diff --git a/sys/arch/mvme88k/mvme88k/pmap.c b/sys/arch/mvme88k/mvme88k/pmap.c
index 937c1e68120..2f65d0f4a12 100644
--- a/sys/arch/mvme88k/mvme88k/pmap.c
+++ b/sys/arch/mvme88k/mvme88k/pmap.c
@@ -1,4 +1,4 @@
-/* $OpenBSD: pmap.c,v 1.74 2003/08/20 19:35:50 miod Exp $ */
+/* $OpenBSD: pmap.c,v 1.75 2003/09/16 20:52:22 miod Exp $ */
/*
* Copyright (c) 2001, 2002, 2003 Miodrag Vallat
* Copyright (c) 1998-2001 Steve Murphree, Jr.
@@ -221,9 +221,6 @@ batc_entry_t batc_entry[BATC_MAX];
#endif /* PMAP_USE_BATC */
vaddr_t kmapva = 0;
-extern vaddr_t bugromva;
-extern vaddr_t sramva;
-extern vaddr_t obiova;
/*
* Internal routines
@@ -590,7 +587,8 @@ pmap_cache_ctrl(pmap_t pmap, vaddr_t s, vaddr_t e, u_int mode)
{
int spl;
pt_entry_t *pte;
- vaddr_t va, pteva;
+ vaddr_t va;
+ paddr_t pa;
boolean_t kflush;
int cpu;
u_int users;
@@ -638,10 +636,10 @@ pmap_cache_ctrl(pmap_t pmap, vaddr_t s, vaddr_t e, u_int mode)
/*
* Data cache should be copied back and invalidated.
*/
- pteva = ptoa(PG_PFNUM(*pte));
+ pa = ptoa(PG_PFNUM(*pte));
for (cpu = 0; cpu < MAX_CPUS; cpu++)
if (cpu_sets[cpu])
- cmmu_flush_remote_cache(cpu, pteva, PAGE_SIZE);
+ cmmu_flush_remote_cache(cpu, pa, PAGE_SIZE);
}
PMAP_UNLOCK(pmap, spl);
}
@@ -866,21 +864,21 @@ pmap_bootstrap(vaddr_t load_start, paddr_t *phys_start, paddr_t *phys_end,
vaddr = pmap_map(vaddr, (paddr_t)kmap, *phys_start,
VM_PROT_WRITE | VM_PROT_READ, CACHE_INH);
+#ifdef DEBUG
if (vaddr != *virt_start) {
/*
* This should never happen because we now round the PDT
* table size up to a page boundry in the quest to get
* mc88110 working. - XXX smurph
*/
-#ifdef DEBUG
if ((pmap_con_dbg & (CD_BOOT | CD_FULL)) == (CD_BOOT | CD_FULL)) {
printf("1: vaddr %x *virt_start 0x%x *phys_start 0x%x\n", vaddr,
*virt_start, *phys_start);
}
-#endif
*virt_start = vaddr;
*phys_start = round_page(*phys_start);
}
+#endif
#if defined (MVME187) || defined (MVME197)
/*
@@ -942,7 +940,7 @@ pmap_bootstrap(vaddr_t load_start, paddr_t *phys_start, paddr_t *phys_end,
* OBIO should be mapped cache inhibited.
*/
- ptable = pmap_table_build(0);
+ ptable = pmap_table_build();
#ifdef DEBUG
if ((pmap_con_dbg & (CD_BOOT | CD_FULL)) == (CD_BOOT | CD_FULL)) {
printf("pmap_bootstrap: -> pmap_table_build\n");
@@ -951,11 +949,8 @@ pmap_bootstrap(vaddr_t load_start, paddr_t *phys_start, paddr_t *phys_end,
for (; ptable->size != (size_t)(-1); ptable++){
if (ptable->size) {
- /*
- * size-1, 'cause pmap_map rounds up to next pagenumber
- */
pmap_map(ptable->virt_start, ptable->phys_start,
- ptable->phys_start + (ptable->size - 1),
+ ptable->phys_start + ptable->size,
ptable->prot, ptable->cacheability);
}
}
@@ -1003,6 +998,7 @@ pmap_bootstrap(vaddr_t load_start, paddr_t *phys_start, paddr_t *phys_end,
if ((pte = pmap_pte(kernel_pmap, virt)) == PT_ENTRY_NULL)
pmap_expand_kmap(virt, VM_PROT_READ | VM_PROT_WRITE);
}
+
/*
* Switch to using new page tables
*/
@@ -1202,8 +1198,7 @@ pmap_create(void)
* memory for page tables should be CACHE DISABLED on MVME188
*/
pmap_cache_ctrl(kernel_pmap,
- (vaddr_t)segdt, (vaddr_t)segdt+ (SDT_SIZE*2),
- CACHE_INH);
+ (vaddr_t)segdt, (vaddr_t)segdt + s, CACHE_INH);
}
#endif
/*
diff --git a/sys/arch/mvme88k/mvme88k/pmap_table.c b/sys/arch/mvme88k/mvme88k/pmap_table.c
index 69d50549b3f..43ede1caf7a 100644
--- a/sys/arch/mvme88k/mvme88k/pmap_table.c
+++ b/sys/arch/mvme88k/mvme88k/pmap_table.c
@@ -1,4 +1,4 @@
-/* $OpenBSD: pmap_table.c,v 1.14 2001/12/22 09:49:39 smurph Exp $ */
+/* $OpenBSD: pmap_table.c,v 1.15 2003/09/16 20:52:22 miod Exp $ */
/*
* Mach Operating System
@@ -30,74 +30,63 @@
#include <sys/systm.h>
#include <sys/types.h>
#include <machine/board.h>
-#include <machine/cmmu.h> /* CMMU stuff */
+#include <machine/cmmu.h>
#include <uvm/uvm_extern.h>
-#include <machine/pmap_table.h> /* pmap_table.h*/
+#include <machine/pmap_table.h>
-#define R VM_PROT_READ
-#define RW VM_PROT_READ|VM_PROT_WRITE
-#define CW CACHE_WT
-#define CI CACHE_INH
-#define CG CACHE_GLOBAL
+#define R VM_PROT_READ
+#define RW (VM_PROT_READ | VM_PROT_WRITE)
+#define CW CACHE_WT
+#define CI CACHE_INH
+#define CG CACHE_GLOBAL
-#undef VEQR_ADDR
-#define VEQR_ADDR 0
/* phys_start, virt_start, size, prot, cacheability */
#ifdef MVME187
-static pmap_table_entry m187_board_table[] = {
- { BUGROM_START, BUGROM_START, BUGROM_SIZE, RW, CI},
- { SRAM_START , SRAM_START , SRAM_SIZE , RW, CG},
- { OBIO_START , OBIO_START , OBIO_SIZE , RW, CI},
- { 0 , 0 , 0xffffffff , 0 , 0},
+const pmap_table_entry
+m187_board_table[] = {
+ { BUG187_START, BUG187_START, round_page(BUG187_SIZE), RW, CI },
+ { SRAM_START , SRAM_START , round_page(SRAM_SIZE) , RW, CG },
+ { OBIO_START , OBIO_START , round_page(OBIO_SIZE) , RW, CI },
+ { 0, 0, 0xffffffff, 0, 0 },
};
#endif
#ifdef MVME188
-static pmap_table_entry m188_board_table[] = {
- { MVME188_UTILITY, MVME188_UTILITY, MVME188_UTILITY_SIZE, RW, CI},
- { 0 , 0 , 0xffffffff , 0, 0},
+const pmap_table_entry
+m188_board_table[] = {
+ { MVME188_UTILITY, MVME188_UTILITY,
+ round_page(MVME188_UTILITY_SIZE), RW, CI },
+ { 0, 0, 0xffffffff, 0, 0 },
};
#endif
#ifdef MVME197
-static pmap_table_entry m197_board_table[] = {
- { BUGROM_START, BUGROM_START, BUGROM_SIZE, RW, CI},
- { OBIO_START , OBIO_START , OBIO_SIZE , RW, CI},
- { 0 , 0 , 0xffffffff , 0 , 0},
+const pmap_table_entry
+m197_board_table[] = {
+ { FLASH_START, FLASH_START, round_page(FLASH_SIZE), RW, CI },
+ { OBIO_START , OBIO_START , round_page(OBIO_SIZE) , RW, CI },
+ /* No need to mention BUG here - it is contained inside OBIO */
+ { 0, 0, 0xffffffff, 0, 0 },
};
#endif
pmap_table_t
-pmap_table_build(endoftext)
- unsigned endoftext;
+pmap_table_build(void)
{
- unsigned int i;
- pmap_table_t bt, pbt;
-
switch (brdtyp) {
#ifdef MVME187
case BRD_187:
- bt = m187_board_table;
- break;
+ return m187_board_table;
#endif
#ifdef MVME188
case BRD_188:
- bt = m188_board_table;
- break;
+ return m188_board_table;
#endif
#ifdef MVME197
case BRD_197:
- bt = m197_board_table;
- break;
+ return m197_board_table;
#endif
+ default:
+ return NULL; /* silence warning */
}
-
- /* round off all entries to nearest segment */
- pbt = bt;
- for (i = 0; pbt->size != 0xffffffff; i++) {
- if (pbt->size>0)
- pbt->size = (pbt->size + PAGE_MASK) & ~PAGE_MASK;
- pbt++;
- }
- return bt;
}
generated by cgit v1.2.3 (git 2.25.1) at 2024-12-16 22:58:01 +0000