diff options
Diffstat (limited to 'sys')
| -rw-r--r-- | sys/arch/hppa/hppa/genassym.cf | 3 | ||||
| -rw-r--r-- | sys/arch/hppa/hppa/locore.S | 22 | ||||
| -rw-r--r-- | sys/arch/hppa/include/cpu.h | 11 |
3 files changed, 20 insertions, 16 deletions
diff --git a/sys/arch/hppa/hppa/genassym.cf b/sys/arch/hppa/hppa/genassym.cf index bb4d2bd18f1..e875dea0d54 100644 --- a/sys/arch/hppa/hppa/genassym.cf +++ b/sys/arch/hppa/hppa/genassym.cf @@ -1,4 +1,4 @@ -# $OpenBSD: genassym.cf,v 1.36 2010/04/19 16:32:53 jsing Exp $ +# $OpenBSD: genassym.cf,v 1.37 2010/05/16 14:54:43 jsing Exp $ # # Copyright (c) 1982, 1990, 1993 @@ -161,6 +161,7 @@ member ci_curproc member ci_psw member ci_cpl member ci_ipending +member ci_trap_save # system calls export SYSCALLGATE diff --git a/sys/arch/hppa/hppa/locore.S b/sys/arch/hppa/hppa/locore.S index 2f88ad4b5d9..faec9089ef0 100644 --- a/sys/arch/hppa/hppa/locore.S +++ b/sys/arch/hppa/hppa/locore.S @@ -1,4 +1,4 @@ -/* $OpenBSD: locore.S,v 1.168 2010/04/19 16:32:53 jsing Exp $ */ +/* $OpenBSD: locore.S,v 1.169 2010/05/16 14:54:43 jsing Exp $ */ /* * Copyright (c) 1998-2004 Michael Shalayeff @@ -102,10 +102,6 @@ #define FPEMU_STACKSIZE (1*NBPG) .data - .align 64 -$trap_tmp_save - .block TF_PHYS - .size $trap_tmp_save, .-$trap_tmp_save .export netisr, data .align 16 @@ -721,8 +717,8 @@ $syscall_return * hopefully no page fault would happen on or after the copy, * and interrupts are disabled. */ - ldil L%$trap_tmp_save, t2 - ldo R%$trap_tmp_save(t2), t2 + mfctl cr29, t2 + ldo CI_TRAP_SAVE(t2), t2 /* use ,bc each cache line */ ldw 0(t3), r1 ! ldw 4(t3), t1 ! stw r1, 0(t2) ! stw t1, 4(t2) ldw 8(t3), r1 ! ldw 12(t3), t1 ! stw r1, 8(t2) ! stw t1, 12(t2) @@ -809,8 +805,8 @@ $syscall_return * since we don't use it anyway. */ ssm 0, r0 - ldil L%$trap_tmp_save, t3 - ldo R%$trap_tmp_save(t3), t3 + mfctl cr29, t3 + ldo CI_TRAP_SAVE(t3), t3 nop ! nop ! nop ! nop ! nop rsm RESET_PSL, r0 $syscall_return_phys @@ -1557,8 +1553,8 @@ ENTRY(TLABEL(all),0) /* do not overwrite tr4(cr28) */ mtctl t3, tr2 - ldil L%$trap_tmp_save, t3 - ldo R%$trap_tmp_save(t3), t3 + mfctl cr29, t3 + ldo CI_TRAP_SAVE(t3), t3 stw t1, TF_R22(t3) /* use ,bc */ stw t2, TF_R21(t3) @@ -1721,8 +1717,8 @@ $trapnowvirt /* * Copy partially saved state from the store into the frame */ - ldil L%$trap_tmp_save, t2 - ldo R%$trap_tmp_save(t2), t2 + mfctl cr29, t2 + ldo CI_TRAP_SAVE(t2), t2 /* use ,bc each cache line */ ldw 0(t2), r1 ! ldw 4(t2), t1 ! stw r1, 0(t3) ! stw t1, 4(t3) ldw 8(t2), r1 ! ldw 12(t2), t1 ! stw r1, 8(t3) ! stw t1, 12(t3) diff --git a/sys/arch/hppa/include/cpu.h b/sys/arch/hppa/include/cpu.h index 0087c71e7d4..40b3af0414b 100644 --- a/sys/arch/hppa/include/cpu.h +++ b/sys/arch/hppa/include/cpu.h @@ -1,4 +1,4 @@ -/* $OpenBSD: cpu.h,v 1.69 2010/04/29 13:14:44 jsing Exp $ */ +/* $OpenBSD: cpu.h,v 1.70 2010/05/16 14:54:43 jsing Exp $ */ /* * Copyright (c) 2000-2004 Michael Shalayeff @@ -68,7 +68,14 @@ #include <sys/queue.h> #include <sys/sched.h> +/* + * Note that the alignment of ci_trap_save is important since we want to keep + * it within a single cache line. As a result, it must be kept as the first + * entry within the cpu_info struct. + */ struct cpu_info { + register_t ci_trap_save[16]; + struct device *ci_dev; int ci_cpuid; hppa_hpa_t ci_hpa; @@ -85,7 +92,7 @@ struct cpu_info { struct schedstate_percpu ci_schedstate; u_int32_t ci_randseed; -}; +} __attribute__((__aligned__(64))); #ifdef MULTIPROCESSOR #define HPPA_MAXCPUS 1 |