diff options
Diffstat (limited to 'sys')
| -rw-r--r-- | sys/arch/mips64/include/proc.h | 10 | ||||
| -rw-r--r-- | sys/arch/mips64/include/rm7000.h | 99 | ||||
| -rw-r--r-- | sys/arch/mips64/mips64/context.S | 27 | ||||
| -rw-r--r-- | sys/arch/mips64/mips64/cp0access.S | 25 | ||||
| -rw-r--r-- | sys/arch/mips64/mips64/cpu.c | 4 | ||||
| -rw-r--r-- | sys/arch/mips64/mips64/exception.S | 87 | ||||
| -rw-r--r-- | sys/arch/mips64/mips64/genassym.cf | 7 | ||||
| -rw-r--r-- | sys/arch/mips64/mips64/interrupt.c | 9 | ||||
| -rw-r--r-- | sys/arch/mips64/mips64/mips64_machdep.c | 6 | ||||
| -rw-r--r-- | sys/arch/mips64/mips64/trap.c | 21 | ||||
| -rw-r--r-- | sys/arch/sgi/sgi/machdep.c | 82 |
11 files changed, 11 insertions, 366 deletions
diff --git a/sys/arch/mips64/include/proc.h b/sys/arch/mips64/include/proc.h index 198b98594a4..44dd452163a 100644 --- a/sys/arch/mips64/include/proc.h +++ b/sys/arch/mips64/include/proc.h @@ -1,4 +1,4 @@ -/* $OpenBSD: proc.h,v 1.9 2016/03/06 19:42:27 mpi Exp $ */ +/* $OpenBSD: proc.h,v 1.10 2016/08/16 13:03:58 visa Exp $ */ /* * Copyright (c) 1992, 1993 @@ -55,13 +55,7 @@ struct mdproc { vaddr_t md_fpbranchva; /* vaddr of fp branch destination */ vaddr_t md_fpslotva; /* initial vaddr of delay slot */ -/* The following is RM7000 dependent, but kept in for compatibility */ - int md_pc_ctrl; /* performance counter control */ - int md_pc_count; /* performance counter */ - int md_pc_spill; /* performance counter spill */ - quad_t md_watch_1; - quad_t md_watch_2; - int md_watch_m; + int32_t md_obsolete[10]; /* Were RM7000-specific data. */ }; /* diff --git a/sys/arch/mips64/include/rm7000.h b/sys/arch/mips64/include/rm7000.h deleted file mode 100644 index 524535ea603..00000000000 --- a/sys/arch/mips64/include/rm7000.h +++ /dev/null @@ -1,99 +0,0 @@ -/* $OpenBSD: rm7000.h,v 1.4 2016/03/06 19:42:27 mpi Exp $ */ - -/* - * Copyright (c) 2001-2004 Opsycon AB (www.opsycon.se / www.opsycon.com) - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * 1. Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * - * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS - * OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED - * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE - * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY - * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL - * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS - * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) - * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT - * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY - * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF - * SUCH DAMAGE. - * - */ - -#ifndef _MIPS64_RM7000_H_ -#define _MIPS64_RM7000_H_ - -/* - * QED RM7000 specific defines. - */ - -/* - * Performance counters. - */ - -#define PCNT_SRC_CLOCKS 0x00 /* Clock cycles */ -#define PCNT_SRC_INSTR 0x01 /* Total instructions issued */ -#define PCNT_SRC_FPINSTR 0x02 /* Float instructions issued */ -#define PCNT_SRC_IINSTR 0x03 /* Integer instructions issued */ -#define PCNT_SRC_LOAD 0x04 /* Load instructions issued */ -#define PCNT_SRC_STORE 0x05 /* Store instructions issued */ -#define PCNT_SRC_DUAL 0x06 /* Dual issued pairs */ -#define PCNT_SRC_BRPREF 0x07 /* Branch prefetches */ -#define PCNT_SRC_EXTMISS 0x08 /* External cache misses */ -#define PCNT_SRC_STALL 0x09 /* Stall cycles */ -#define PCNT_SRC_SECMISS 0x0a /* Secondary cache misses */ -#define PCNT_SRC_INSMISS 0x0b /* Instruction cache misses */ -#define PCNT_SRC_DTAMISS 0x0c /* Data cache misses */ -#define PCNT_SRC_DTLBMISS 0x0d /* Data TLB misses */ -#define PCNT_SRC_ITLBMISS 0x0e /* Instruction TLB misses */ -#define PCNT_SRC_JTLBIMISS 0x0f /* Joint TLB instruction misses */ -#define PCNT_SRC_JTLBDMISS 0x10 /* Joint TLB data misses */ -#define PCNT_SRC_BRTAKEN 0x11 /* Branches taken */ -#define PCNT_SRC_BRISSUED 0x12 /* Branches issued */ -#define PCNT_SRC_SECWBACK 0x13 /* Secondary cache writebacks */ -#define PCNT_SRC_PRIWBACK 0x14 /* Primary cache writebacks */ -#define PCNT_SRC_DCSTALL 0x15 /* Dcache miss stall cycles */ -#define PCNT_SRC_MISS 0x16 /* Cache misses */ -#define PCNT_SRC_FPEXC 0x17 /* FP possible exception cycles */ -#define PCNT_SRC_MULSLIP 0x18 /* Slip cycles due to mult. busy */ -#define PCNT_SRC_CP0SLIP 0x19 /* CP0 Slip cycles */ -#define PCNT_SRC_LDSLIP 0x1a /* Slip cycles due to pend. non-b ld */ -#define PCNT_SRC_WBFULL 0x1b /* Write buffer full stall cycles */ -#define PCNT_SRC_CISTALL 0x1c /* Cache instruction stall cycles */ -#define PCNT_SRC_MULSTALL 0x1d /* Multiplier stall cycles */ -#define PCNT_SRC_ELDSTALL 0x1d /* Excepion stall due to non-b ld */ -#define PCNT_SRC_MAX 0x1d /* Maximum PCNT select code */ - -/* - * Counter control bits. - */ - -#define PCNT_CE 0x0400 /* Count enable */ -#define PCNT_UM 0x0200 /* Count in User mode */ -#define PCNT_KM 0x0100 /* Count in kernel mode */ - -/* - * Performance counter system call function codes. - */ -#define PCNT_FNC_SELECT 0x0001 /* Select counter source */ -#define PCNT_FNC_READ 0x0002 /* Read current value of counter */ - - -#ifdef _KERNEL -__BEGIN_DECLS -int rm7k_perfcntr(int, long, long, long); -void rm7k_perfintr(struct trapframe *); -int rm7k_watchintr(struct trapframe *); -void cp0_setperfcount(int); -void cp0_setperfctrl(int); -int cp0_getperfcount(void); -__END_DECLS -#endif /* _KERNEL */ - -#endif /* _MIPS64_RM7000_H_ */ diff --git a/sys/arch/mips64/mips64/context.S b/sys/arch/mips64/mips64/context.S index 137b7fc2ae8..94d0e5cc586 100644 --- a/sys/arch/mips64/mips64/context.S +++ b/sys/arch/mips64/mips64/context.S @@ -1,4 +1,4 @@ -/* $OpenBSD: context.S,v 1.55 2016/08/14 08:23:52 visa Exp $ */ +/* $OpenBSD: context.S,v 1.56 2016/08/16 13:03:58 visa Exp $ */ /* * Copyright (c) 2002-2003 Opsycon AB (www.opsycon.se / www.opsycon.com) @@ -345,31 +345,6 @@ LEAF(proc_trampoline, 0) jal s0 move a0,s1 # invoke callback. -#if 0 /* && defined(RM7000_ICR) */ - lw t0, cpu_is_rm7k - beqz t0, 1f # not an RM7K. Don't do IC reg. - NOP - - GET_CPU_INFO(t1, t0) - PTR_L t0, CI_CURPROC(t1) # set up rm7k. - ld v0, P_WATCH_1(t0) - dmtc0 v0, COP_0_WATCH_1 - ld v0, P_WATCH_2(t0) - dmtc0 v0, COP_0_WATCH_2 - lw v0, P_WATCH_M(t0) - mtc0 v0, COP_0_WATCH_M - lw v0, P_PC_CTRL(t0) - lw v1, P_PC_COUNT(t0) - nop;nop - mtc0 v0, COP_0_PC_CTRL - nop;nop;nop;nop - mtc0 v1, COP_0_PC_COUNT - nop;nop;nop;nop - li v0, IC_INT_PERF - ctc0 v0, COP_0_ICR # enable perfcntr interrupt. -1: -#endif - MFC0 t0, COP_0_STATUS_REG MFC0_HAZARD LI t1, ~SR_INT_ENAB diff --git a/sys/arch/mips64/mips64/cp0access.S b/sys/arch/mips64/mips64/cp0access.S index b92dcfbecb9..642b800ea79 100644 --- a/sys/arch/mips64/mips64/cp0access.S +++ b/sys/arch/mips64/mips64/cp0access.S @@ -1,4 +1,4 @@ -/* $OpenBSD: cp0access.S,v 1.19 2012/10/03 11:18:23 miod Exp $ */ +/* $OpenBSD: cp0access.S,v 1.20 2016/08/16 13:03:58 visa Exp $ */ /* * Copyright (c) 2001-2003 Opsycon AB (www.opsycon.se / www.opsycon.com) @@ -220,26 +220,3 @@ LEAF(cp0_set_trapbase, 0) NOP END(cp0_set_trapbase) #endif - -#ifdef notused -LEAF(cp0_getperfcount, 0) - MFC0 v0, COP_0_PC_COUNT - MFC0_HAZARD - j ra - NOP -END(cp0_getperfcount) - -LEAF(cp0_setperfcount, 0) - MTC0 a0, COP_0_PC_COUNT - MTC0_HAZARD - j ra - NOP -END(cp0_setperfcount) - -LEAF(cp0_setperfctrl, 0) - MTC0 a0, COP_0_PC_CTRL - MTC0_HAZARD - j ra - NOP -END(cp0_setperfctrl) -#endif diff --git a/sys/arch/mips64/mips64/cpu.c b/sys/arch/mips64/mips64/cpu.c index 04467e07cbf..3c8111d09b9 100644 --- a/sys/arch/mips64/mips64/cpu.c +++ b/sys/arch/mips64/mips64/cpu.c @@ -1,4 +1,4 @@ -/* $OpenBSD: cpu.c,v 1.59 2015/12/25 08:34:50 visa Exp $ */ +/* $OpenBSD: cpu.c,v 1.60 2016/08/16 13:03:58 visa Exp $ */ /* * Copyright (c) 1997-2004 Opsycon AB (www.opsycon.se) @@ -51,7 +51,6 @@ struct cpuset cpus_running; #endif vaddr_t cache_valias_mask; -int cpu_is_rm7k = 0; struct cfattach cpu_ca = { sizeof(struct device), cpumatch, cpuattach @@ -175,7 +174,6 @@ cpuattach(struct device *parent, struct device *dev, void *aux) printf("PMC-Sierra RM7000 CPU"); else printf("PMC-Sierra RM7000A CPU"); - cpu_is_rm7k++; break; case MIPS_R8000: printf("MIPS R8000 CPU"); diff --git a/sys/arch/mips64/mips64/exception.S b/sys/arch/mips64/mips64/exception.S index 41c37aedac7..3c158a1cc96 100644 --- a/sys/arch/mips64/mips64/exception.S +++ b/sys/arch/mips64/mips64/exception.S @@ -1,4 +1,4 @@ -/* $OpenBSD: exception.S,v 1.38 2014/03/26 19:38:18 miod Exp $ */ +/* $OpenBSD: exception.S,v 1.39 2016/08/16 13:03:58 visa Exp $ */ /* * Copyright (c) 2002-2003 Opsycon AB (www.opsycon.se / www.opsycon.com) @@ -266,55 +266,12 @@ NNON_LEAF(u_intr, FRAMESZ(CF_SZ), ra) PTR_L t0, CI_CURPROCPADDR(t1) # curprocpaddr SAVE_CPU_SREG(t0, 0) -#ifdef PERFCNTRS - lw t0, cpu_is_rm7k - beqz t0, 1f # not an RM7K. Don't do perf save. - nop - - mfc0 v0, COP_0_PC_CTRL - PTR_L t0, curproc - sw v0, P_PC_CTRL(t0) - dmfc0 v0, COP_0_WATCH_1 - dmfc0 v1, COP_0_WATCH_2 - sd v0, P_WATCH_1(t0) - sd v1, P_WATCH_2(t0) - mfc0 v0, COP_0_WATCH_M - mfc0 v1, COP_0_PC_COUNT - sw v0, P_WATCH_M(t0) - sw v1, P_PC_COUNT(t0) - mtc0 zero, COP_0_PC_CTRL - dmtc0 zero, COP_0_WATCH_1 - dmtc0 zero, COP_0_WATCH_2 - nop;nop;nop;nop -1: -#endif jal ast nop /* * Restore user registers and return. NOTE: interrupts are enabled. */ -#ifdef PERFCNTRS - lw t0, cpu_is_rm7k - beqz t0, 1f # not an RM7K. Don't do perf setup. - - GET_CPU_INFO(t1, t0) - PTR_L t0, CI_CURPROC(t1) # set up rm7k. - ld v0, P_WATCH_1(t1) - dmtc0 v0, COP_0_WATCH_1 - ld v0, P_WATCH_2(t1) - dmtc0 v0, COP_0_WATCH_2 - lw v0, P_WATCH_M(t1) - mtc0 v0, COP_0_WATCH_M - lw v0, P_PC_CTRL(t1) - lw v1, P_PC_COUNT(t1) - nop;nop - mtc0 v0, COP_0_PC_CTRL - nop;nop;nop;nop - mtc0 v1, COP_0_PC_COUNT - nop;nop;nop;nop -1: -#endif GET_CPU_INFO(t1, t0) PTR_L t0, CI_CURPROCPADDR(t1) RESTORE_CPU_SREG(t0, 0) @@ -419,27 +376,6 @@ NNON_LEAF(u_general, FRAMESZ(CF_SZ), ra) MTC0 t0, COP_0_STATUS_REG MTC0_SR_IE_HAZARD -#ifdef PERFCNTRS - lw t0, cpu_is_rm7k - beqz t0, 1f # not an RM7K. Don't do perf save. - nop - - mfc0 v0, COP_0_PC_CTRL - PTR_L t0, CI_CURPROC(k1) - sw v0, P_PC_CTRL(t0) - dmfc0 v0, COP_0_WATCH_1 - dmfc0 v1, COP_0_WATCH_2 - sd v0, P_WATCH_1(t0) - sd v1, P_WATCH_2(t0) - mfc0 v0, COP_0_WATCH_M - mfc0 v1, COP_0_PC_COUNT - sw v0, P_WATCH_M(t0) - sw v1, P_PC_COUNT(t0) - mtc0 zero, COP_0_PC_CTRL - nop;nop;nop;nop -1: -#endif - jal trap PTR_S a3, CF_RA_OFFS(sp) # for debugging @@ -457,27 +393,6 @@ NNON_LEAF(u_general, FRAMESZ(CF_SZ), ra) nop 4: -#ifdef PERFCNTRS - lw t0, cpu_is_rm7k - beqz t0, 1f # not an RM7K. Don't do perf setup. - - GET_CPU_INFO(t1, t0) - PTR_L t0, CI_CURPROC(k1) # set up rm7k. - ld v0, P_WATCH_1(t0) - dmtc0 v0, COP_0_WATCH_1 - ld v0, P_WATCH_2(t0) - dmtc0 v0, COP_0_WATCH_2 - lw v0, P_WATCH_M(t0) - mtc0 v0, COP_0_WATCH_M - lw v0, P_PC_CTRL(t0) - lw v1, P_PC_COUNT(t0) - nop;nop - mtc0 v0, COP_0_PC_CTRL - nop;nop;nop;nop - mtc0 v1, COP_0_PC_COUNT - nop;nop;nop;nop -1: -#endif MFC0 t0, COP_0_STATUS_REG # disable interrupts LI t1, ~SR_INT_ENAB and t0, t0, t1 diff --git a/sys/arch/mips64/mips64/genassym.cf b/sys/arch/mips64/mips64/genassym.cf index 5d400173f2d..16c107d2b93 100644 --- a/sys/arch/mips64/mips64/genassym.cf +++ b/sys/arch/mips64/mips64/genassym.cf @@ -1,4 +1,4 @@ -# $OpenBSD: genassym.cf,v 1.12 2014/07/09 08:49:20 deraadt Exp $ +# $OpenBSD: genassym.cf,v 1.13 2016/08/16 13:03:58 visa Exp $ # # Copyright (c) 1997 Per Fogelstrom / Opsycon AB # @@ -43,11 +43,6 @@ member p_cpu member p_stat member p_vmspace member P_ASTPENDING p_md.md_astpending -member P_PC_CTRL p_md.md_pc_ctrl -member P_PC_COUNT p_md.md_pc_count -member P_WATCH_1 p_md.md_watch_1 -member P_WATCH_2 p_md.md_watch_2 -member P_WATCH_M p_md.md_watch_m struct pcb member pcb_regs diff --git a/sys/arch/mips64/mips64/interrupt.c b/sys/arch/mips64/mips64/interrupt.c index f82f1861381..f8b8ebda1be 100644 --- a/sys/arch/mips64/mips64/interrupt.c +++ b/sys/arch/mips64/mips64/interrupt.c @@ -1,4 +1,4 @@ -/* $OpenBSD: interrupt.c,v 1.66 2016/03/06 19:42:27 mpi Exp $ */ +/* $OpenBSD: interrupt.c,v 1.67 2016/08/16 13:03:58 visa Exp $ */ /* * Copyright (c) 2001-2004 Opsycon AB (www.opsycon.se / www.opsycon.com) @@ -40,8 +40,6 @@ #include <machine/intr.h> #include <machine/frame.h> -#include <mips64/rm7000.h> - #ifdef DDB #include <mips64/db_machdep.h> #include <ddb/db_sym.h> @@ -129,11 +127,6 @@ interrupt(struct trapframe *trapframe) atomic_inc_long((unsigned long *)&soft_count.ec_count); } -#ifdef RM7K_PERFCNTR - if (pending & CR_INT_PERF) - rm7k_perfintr(trapframe); -#endif - for (i = 0; i <= last_low_int; i++) { uint32_t active; active = cpu_int_tab[i].int_mask & pending; diff --git a/sys/arch/mips64/mips64/mips64_machdep.c b/sys/arch/mips64/mips64/mips64_machdep.c index f6e2e3e2913..4fc2648094c 100644 --- a/sys/arch/mips64/mips64/mips64_machdep.c +++ b/sys/arch/mips64/mips64/mips64_machdep.c @@ -1,4 +1,4 @@ -/* $OpenBSD: mips64_machdep.c,v 1.20 2016/03/06 19:42:27 mpi Exp $ */ +/* $OpenBSD: mips64_machdep.c,v 1.21 2016/08/16 13:03:58 visa Exp $ */ /* * Copyright (c) 2009, 2010, 2012 Miodrag Vallat. @@ -159,10 +159,6 @@ setregs(p, pack, stack, retval) #endif if (ci->ci_fpuproc == p) ci->ci_fpuproc = NULL; - p->p_md.md_ss_addr = 0; - p->p_md.md_pc_ctrl = 0; - p->p_md.md_watch_1 = 0; - p->p_md.md_watch_2 = 0; retval[1] = 0; } diff --git a/sys/arch/mips64/mips64/trap.c b/sys/arch/mips64/mips64/trap.c index 195f914124b..56e05264694 100644 --- a/sys/arch/mips64/mips64/trap.c +++ b/sys/arch/mips64/mips64/trap.c @@ -1,4 +1,4 @@ -/* $OpenBSD: trap.c,v 1.117 2016/08/14 08:23:52 visa Exp $ */ +/* $OpenBSD: trap.c,v 1.118 2016/08/16 13:03:58 visa Exp $ */ /* * Copyright (c) 1988 University of Utah. @@ -70,8 +70,6 @@ #include <machine/regnum.h> #include <machine/trap.h> -#include <mips64/rm7000.h> - #ifdef DDB #include <mips64/db_machdep.h> #include <ddb/db_output.h> @@ -677,12 +675,6 @@ fault_common_no_miss: if (trapframe->cause & CR_BR_DELAY) va += 4; printf("watch exception @ %p\n", va); -#ifdef RM7K_PERFCNTR - if (rm7k_watchintr(trapframe)) { - /* Return to user, don't add any more overhead */ - return; - } -#endif i = SIGTRAP; typ = TRAP_BRKPT; break; @@ -706,17 +698,6 @@ fault_common_no_miss: trapframe->pc, 0, 0); else locr0->pc += 4; -#ifdef RM7K_PERFCNTR - if (instr == 0x040c0000) { /* Performance cntr trap */ - int result; - - result = rm7k_perfcntr(trapframe->a0, trapframe->a1, - trapframe->a2, trapframe->a3); - locr0->v0 = -result; - /* Return to user, don't add any more overhead */ - return; - } else -#endif /* * GCC 4 uses teq with code 7 to signal divide by * zero at runtime. This is one instruction shorter diff --git a/sys/arch/sgi/sgi/machdep.c b/sys/arch/sgi/sgi/machdep.c index 069aaa1b755..100de8d242a 100644 --- a/sys/arch/sgi/sgi/machdep.c +++ b/sys/arch/sgi/sgi/machdep.c @@ -1,4 +1,4 @@ -/* $OpenBSD: machdep.c,v 1.151 2016/03/06 19:42:27 mpi Exp $ */ +/* $OpenBSD: machdep.c,v 1.152 2016/08/16 13:03:58 visa Exp $ */ /* * Copyright (c) 2003-2004 Opsycon AB (www.opsycon.se / www.opsycon.com) @@ -71,10 +71,6 @@ CACHE_PROTOS(ip22) CACHE_PROTOS(tcc) #endif -#ifdef CPU_RM7000 -#include <mips64/rm7000.h> -#endif - #include <dev/cons.h> #include <mips64/arcbios.h> @@ -1012,79 +1008,3 @@ is_memory_range(paddr_t pa, psize_t len, psize_t limit) return FALSE; } - -#ifdef CPU_RM7000 -#ifdef RM7K_PERFCNTR -/* - * RM7000 Performance counter support. - */ -int -rm7k_perfcntr(cmd, arg1, arg2, arg3) - int cmd; - long arg1, arg2, arg3; -{ - int result; - quad_t cntval; - struct proc *p = curproc; - - - switch(cmd) { - case PCNT_FNC_SELECT: - if ((arg1 & 0xff) > PCNT_SRC_MAX || - (arg1 & ~(PCNT_CE|PCNT_UM|PCNT_KM|0xff)) != 0) { - result = EINVAL; - break; - } -#ifdef DEBUG -printf("perfcnt select %x, proc %p\n", arg1, p); -#endif - p->p_md.md_pc_count = 0; - p->p_md.md_pc_spill = 0; - p->p_md.md_pc_ctrl = arg1; - result = 0; - break; - - case PCNT_FNC_READ: - cntval = p->p_md.md_pc_count; - cntval += (quad_t)p->p_md.md_pc_spill << 31; - result = copyout(&cntval, (void *)arg1, sizeof(cntval)); - break; - - default: -#ifdef DEBUG -printf("perfcnt error %d\n", cmd); -#endif - result = -1; - break; - } - return(result); -} - -/* - * Called when the performance counter d31 gets set. - * Increase spill value and reset d31. - */ -void -rm7k_perfintr(trapframe) - struct trapframe *trapframe; -{ - struct proc *p = curproc; - -#ifdef DEBUG - printf("perfintr proc %p!\n", p); -#endif - cp0_setperfcount(cp0_getperfcount() & 0x7fffffff); - if (p != NULL) { - p->p_md.md_pc_spill++; - } -} - -int -rm7k_watchintr(trapframe) - struct trapframe *trapframe; -{ - return(0); -} - -#endif /* RM7K_PERFCNTR */ -#endif /* CPU_RM7000 */ |