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AgeCommit message (Expand)Author
2020-06-18Document sioctl_desc structure maxval attributeAlexandre Ratchov
2020-06-18Fix comments about sioctl_desc's maxval fieldAlexandre Ratchov
2020-06-18The next step is to use that we have cached the result of the matrixTheo Buehler
2020-06-17Fix broken HID descriptors of Elecom trackballs.Ulf Brosziewski
2020-06-17Print CPU name and cache info in the same way as we do on arm64.Mark Kettenis
2020-06-17Manually tag the section option.Ingo Schwarze
2020-06-17Fix length check in ca_getreq().tobhe
2020-06-17More pmap bits, mostly from powerpc andd arm64.Mark Kettenis
2020-06-17Instead of performing three distinct allocations per created pipe,anton
2020-06-17Explicitly unmap DMA memory using pmap_kremove(9).Mark Kettenis
2020-06-17We are no longer using the "keep" file as a flag.Florian Obser
2020-06-17needs param.h, not types.hTheo de Raadt
2020-06-17Document that rand() returns non-deterministic random numbers unless aTim van der Molen
2020-06-17Expose SMR list and pointer macros to userspace. This enables the useVisa Hankala
2020-06-17ddb(4); be explicit that the parameter to trace /t uses the radixStuart Henderson
2020-06-17Remove the bus specific sc_ih (interrup handle) variable and use the commonClaudio Jeker
2020-06-17put pci_intr_establish_cpu() in, but commented out for now.David Gwynne
2020-06-17Let iwx(4) firmware decide which Tx rate to use.Stefan Sperling
2020-06-17Attach secondary CPUs early. Since on most machine we need psci(4) toMark Kettenis
2020-06-17mark up an argument with Fa, not VaDavid Gwynne
2020-06-17have a go at documenting pci_intr_map_msix.David Gwynne
2020-06-17replace a long and wrapped Fn line with Fo Fa FcDavid Gwynne
2020-06-17if the chip did rss, use the hash from the chip as an mbuf flowid.David Gwynne
2020-06-17make ph_flowid in mbufs 16bits by storing whether it's set in csum_flags.David Gwynne
2020-06-17Remove some of the unnecessary complications in the calculation of theTheo Buehler
2020-06-17enable multiple queues (and interrupts on multiple cpus) on vmx(4).David Gwynne
2020-06-17tweak previous;Jason McIntyre
2020-06-17add a dumb pci_intr_establish_cpu().David Gwynne
2020-06-17pci_intr_establish_cpu() for establishing an interrupt no a specific cpu.David Gwynne
2020-06-17syncTheo de Raadt
2020-06-17wire intrmap into the buildDavid Gwynne
2020-06-17make intrmap_cpu return a struct cpu_info *, not a "cpuid number" thing.David Gwynne
2020-06-17use atomic_set() in kref_init()Jonathan Gray
2020-06-17kref_sub() interface was removed from linux and is unusedJonathan Gray
2020-06-17add pci_intr_msix_count(), to get the msi-x table size for a device.David Gwynne
2020-06-17sparc64 should define __HAVE_PCI_MSIXDavid Gwynne
2020-06-17use WRITE_ONCE and READ_ONCE for set and readJonathan Gray
2020-06-17manpage for the bits of intrmap we're using at the moment.David Gwynne
2020-06-17add intrmap, an api that picks cpus for devices to attach interrupts to.David Gwynne
2020-06-17Do not do logical negation of a bitshifted field.mortimer
2020-06-16make intr_barrier run sched_barrier on the cpu the interrupt pinned to.David Gwynne
2020-06-16Remove old commented out line and fix indent.mortimer
2020-06-16Some simplifications.Mark Kettenis
2020-06-16Add missing dependeny.Mark Kettenis
2020-06-16Fix strlcpy() size parameter in refldbld(), it was a byte too small.Todd C. Miller
2020-06-16typosChristian Weisgerber
2020-06-16remove some unused definesJonathan Gray
2020-06-16implement atomic_inc_not_zero() by way of atomic_add_unless()Jonathan Gray
2020-06-16remove a dead storeJonathan Gray
2020-06-16rework SYNOPSIS/usage() to show better the various use formats,Jason McIntyre