Age | Commit message (Collapse) | Author |
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BUS_DMA_COHERENT flag was mapped as device memory which does not use the
store buffer. It is now mapped as normal inner and outer non-cacheable
which does.
While we drain the cpu store buffer for this case, on cortex a9 systems we
also need to explicitly drain the PL310 L2's store buffer. With PL310
revisions r3p2 and later this is done automatically after being present in
the store buffer for 256 cycles. On i.MX6 PL310 is rev r3p1 which does
not have this behaviour. This issue is i.MX6 errata ERR055199 and PL310
errata 769419.
This change restores io performance with a usb flash drive attached to
my cubox. Raw reads go from 3 MB/s to 19 MB/s for example.
Based on code written by patrick@ some time ago.
ok kettenis@ patrick@
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sun5i and sun7i.
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ok patrick@
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ok patrick@
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OK jca@ martijn@ millert@
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should unvis() it too, but I think this is enough, at least for now.
ok krw@
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OK halex, krw
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updated struct vattr afterwards, so the call can be removed. Remove both
calls and the function itself, inlining the last remaining call.
ok millert
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and pl011consaddr as the pl011consaddr addresss may have been translated.
Set cn_dev at this point as well as in com(4) and imxuart(4) to handle cases
where stdout is not serial0.
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Exynos differed from everything else by not having GIC at fixed offsets
from PERIPHBASE. Now that ampintc/GIC attaches using FDT we get the ranges
out of the FDT instead of using offsets from PERIPHBASE.
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ok deraadt@
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message headers would not be altered as expected.
ok gilles@
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similar to the example in connect(2). OK tedu@
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ok deraadt@
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Restrict the block size to 512 bytes for now. While Linux and NetBSD seem
to allow larger block sizes (4096 and 8192 bytes) I'm getting errors wth an
older 2G Sandisk SD card that advertises support for 1024 byte blocks.
Implement switching between the 400 KHz "discovery" clock and the 25 MHz
"operational" clock. Enable the right clock based on the SD/MMC "unit"
number. Don't advertise highspeed capabilities for now as I'm not sure
how the adjust the clock timing in that case.
Fix the way we calculate the number of blocks and the size of the total data
transfer to matc what we do in sdhc(4).
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effect. This will let us have different settings on armv7 and zaurus and
also unconfuses this developer.
ok tom@, deraadt@
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ok kettenis@ deraadt@ mlarkin@
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Reported by & similar diff by guenther@ some time ago, ok eric@
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http://www.tuhs.org/Archive/PDP-11/Distributions/research/1972_stuff/unix_2nd_edition_manual.pdf
patch from Sevan Janiyan <venture37 at geeklan dot co dot uk>
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are open, all except the innermost open block got a bogus MDOC_ENDED
marker, in some situations triggering segfaults down the road
which tb@ found with afl(1).
Fix the logic error by figuring out up front whether an end macro
has a matching body, and if it hasn't, don't mark any blocks as broken.
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ignore body end markers of lists breaking other blocks.
Fixing a logical error that caused a NULL deref found by tb@ with afl(1).
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ok patrick@
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-RA timer on em0 is set to 16:0
+RA timer on em0 is set to 16.0s
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Printing is already done with %llu/(unsigned long long) casts.
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add a special case for the missing "rpath" and "tty" promises.
Issue found and initial analysis by Jan Stary, thanks!
ok deraadt
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and roff-level nodes (e.g. tbl or eqn) follow, don't run into an
assertion. Instead, wrap the roff-level nodes in their own row.
Issue found by tb@ with afl(1).
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Noticed by mglocker@.
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ok kettenis@
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is needed.
ok visa@, patrick@
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Avoid doing so for the early console and instead rely on the firmware to
set up the right baud rate and such.
ok visa@, millert@, jsg@
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optimise pf_patch_32(); simplify pf_match_addr()
OK mikeb@
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OK mpi@ mikeb@
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(probably landed in dev because it has support for this viper thing,
but i like consistency for the /dev/null parts.)
ok kettenis
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