Age | Commit message (Collapse) | Author |
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and not something we guarantee to userspace
ok jca@
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from all but one call
ok jca@
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ok jca@
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of ELFDEFNNAME(NO_ADDR)
ok jca@
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ok jca@
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Reported by Ryan, pulse.purge at gmail.com
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ok krw@
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ok krw@
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ok mpi@ henning@ sashan@
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we need to make sure to clean the data and invalidate the instruction
cache upon entering a page with pmap_enter(). Since it is possible
that pmap_enter() does not directly enter the page, we need to do the
same dance in the pmap fault fixup code. Every new writeable mapping
or write removes a page's flag to mark it unflushed. The next time
pmap_enter() is called or a fault happens on that VA, it has to be
flushed and invalidated again. This was heavily discussed with Dale
Rahn.
On the Pine64 and Raspberry Pi 3 we have been very lucky to not run
into any cache issues, especially with the instruction cache. The
AMD Seattle seems to be a different kind of beast where we actually
have to care about these things. This finally brings the machine
into userland.
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RhostsRSAAuthentication from regression test sshd_config.
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ok dlg@ a while ago
some input from jca@ who wrote the same diff
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asynchronous callbacks. Make the IPsec functions void, there is
already a counter in the error path.
OK mpi@
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pagetables as well. Also replace the number for write-back with a proper
define.
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true. Instead, unless overwritten by the device tree, we should ask the
generic timer for its frequency. This fixes time on my AMD Seattle and
should improve time management on QEMU as well.
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these currently to 255. Thus making it impossible to use higher IRQs
than that. The AMD Seattle SoC though seems to provide 448 IRQs, which
is kind of out of bounds, so raise them to the proper values. This
makes interrupts work on that machine.
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actually want.
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failed. Add a counter for that case.
OK dhill@
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by pre-allocating two cryptodesc objects and storing them in an array
instead of a linked list. If more than two cryptodesc objects are
required use mallocarray to fetch them. Adapt the drivers to the new
API.
This change results in one pool-get per ESP packet instead of three.
It also simplifies softraid crypto where more cryptodesc objects are
allocated than used.
From, with and ok markus@, ok bluhm@
"looks sane" mpi@
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extra scroll of the entire terminal; issuing DECSTBM first prevents
this. Do that for now.
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provided error code matches the error that is currently on the top of the
error stack.
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Found by Hrvoje Popovski.
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useful to propagate the error. When an error occurs in an asynchronous
network path, incrementing a counter is the right thing. There are
four places where an error is not accounted, just add a comment for
now.
OK mpi@ visa@
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ok mpi@
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not reset colours when in SGR 0), so we can't use it without more
trouble than it is worth. Abandon the idea for now.
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Make sure that the beginning of a new request starts with an
alphabetic character. This is a quick way to detect non-ASCII
requests (eg. TLS on port 80). The full validation of the request
method is done once the input line is read.
Make sure that non-terminated lines do not exceed the
SERVER_MAXHEADERLENGTH which is 8k. As the current read watermark is
set to 64k, this means that the limit check is triggered after max.
64k of input, depending on the TCP read buffer.
OK benno@ jsing@
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and avoids giving the impression that one should follow the link to find
examples.
jmc agrees; go ahead rpe
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This prevents a deadlock with the X server and some wireless drivers.
The real fix is to take unix domain socket code out of the NET_LOCK().
Issue reported by pirofti@ and ajacoutot@
ok tb@, stsp@, pirofti@
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this lets me pass the specific argument to an aen handler in mfii.
it also unbreaks the tree.
found by jmatthew@
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this didnt make sense previously since the mbuf pools had item
limits that meant the cpus had to coordinate via a single counter
to make sure the limit wasnt exceeded.
mbufs are now limited by how much memory can be allocated for pages
from the system. individual pool items are no longer counted and
therefore do not have to be coordinated.
ok bluhm@ as part of a larger diff.
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this replaces individual calls to pool_init, pool_set_constraints, and
pool_sethardlimit with calls to m_pool_init. m_pool_init inits the
mbuf pools with the mbuf pool allocator, and because of that doesnt
set per pool limits.
ok bluhm@ as part of a larger diff
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m_pool_init is basically a call to pool_init with everythign except
the size and alignment specified, and a call to pool_set_constraints
so the memroy is always dma reachable. it also wires up the memory
with the custom mbuf pool allocator.
ok bluhm@ as part of a larger diff
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the custom allocator is basically a wrapper around the multi page
pool allocator, but it has a single global memory limit managed by
the wrapper.
currently each of the mbuf pools has their own memory limit (or
none in the case of the myx pool) independent of the other pools.
this means each pool can allocate up to nmbclust worth of mbufs,
rather than all of them sharing the one limit. wrapping the allocator
like this means we can move to a single memory limit for all mbufs
in the system.
ok bluhm@ as part of a larger diff
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more specificially we probe the disk if it goes from UNCONFIGURED_GOOD
to a SYSTEM disk, and detach it if goes from being a SYSTEM disk
to anything else.
this semantic comes from the lsi^Wavago code in the illumos mr_sas
driver. seems to work fine.
i think this covers all the ways a passthru disk can transition on
these boards.
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