Age | Commit message (Collapse) | Author |
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- move the file format stuff into a more logical grouping
- use an ENVIRONMENT section
- remove the Rs block. it was incorrect, and not really worth updating
input/ok krw
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previous check ensures positive numbers
ok halex@
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confirmed by, and ok, millert
thanks also krw for input
whilst here, knock out a useless .Pp
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This fixes an issue which aborted the address traversal / SNMP walk when
an "any"/0.0.0.0 address was configured on an interface. The problem
was found with a pppoe(4) device that is typically configured with 0.0.0.0
on startup.
Found and fix tested by Gerhard Roth
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making files stand-alone, some __restrict additions.
tweaks kettenis@; ports testing and fixes landry@ and jasper@
ok millert@
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consistent when the effective gid isn't also a supplementary group.
ok beck@
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is 29320LPE since it is a single channel adapter. No functional change
other than priting the correct chipset in the dmesg.
Pointed out by henning petersen.
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ok gilles@
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normally instead of with a value of 2. Also avoids unlinking the
file "stdout" in the current directory in this case.
OK miod@ sthen@ henning@ beck@
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ie:
reject from 192.168.1.0/24 for domain "openbsd.org"
accept from 192.168.0.0/16 for domain "openbsd.org" deliver to mbox
it was documented but not working.
ok eric@ & chl@
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that can be filled. OK dlg@, mikeb@
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ok haesbaert@
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boundary; uvm depends on this and will KASSERT this for its own safety.
Found the hard way, rounding direction discussed with ariane@ (I initially
wanted to round down, but it makes more sense to round up).
Of course noone in his right mind ought to run OMAGIC binaries (-:
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ok eric@ gilles@
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basically an IP22 system (R4000 Indigo2) with the ECC memory board of IP28,
and a so-called ``streaming'' L2 cache.
IP26 kernels currently boot single-user, but don't live long; I am suspecting
a bug in the tcc cache routines, but am currently not able to find it (come
to think of it, my understanding of how this cache works could be wrong, and
of course there is no documentation for it but what can be gathered from
IRIX' <sys/IP26.h> comments and defines).
Hopefully this situation will improve in the near future; in the meantime I
am commiting this as `work in progress' to make sure this code doesn't get
lost.
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which allows them to run on IP26 (POWER Indigo2 R8000).
Crank boot blocks version.
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This allows MI code to support both 32-bit ARCS systems, as well as 64-bit
R8000 and R1x000 systems.
While there, #if 0 out ARCBios routines currently not used by the kernel.
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exception-specific code, clock-specific code, and L1 cache-specific code. L2
cache is per-design, of which only two exist: SGI Power Indigo2 (IP26) and SGI
Power Challenge (IP21) and are not covered by this commit.
R8000 processors also are 64-bit only processors with 64-bit coprocessor 0
registers, and lack so-called ``compatibility'' memory spaces allowing 32-bit
code to run with sign-extended addresses and registers.
The intrusive changes are covered by #ifdef CPU_R8000 stanzas. However,
trap() is split into a high-level wrapper and a new function, itsa(),
responsible for the actual trap servicing (which name couldn't be helped
because I'm an incorrigible punster). While an R8000 exception may cause
(via trap() ) multiple exceptions to be serviced, non-R8000 processors will
always service one exception in trap(), but they are nevertheless affected
by this code split.
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into a global. This allows R12000 O2 systems to set the DSD bit in once for
all, instead of having to set it every time in setregs().
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as some odd mips designs need moro than 32 bits in there. This causes a lot
of mechanical changes everywhere getsr() is used.
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knowledge to <machine/pte.h>. Add specific routines for tlb handling setup
(at cpu initialization time) and tlb ASID wrap.
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register update, status register update causing a change to the interrupt
enable flag, and a few other arcane ones. <mips64/asm.h> will provide
(supposedly sane) defaults, and <machine/asm.h> may override these with
better tuned versions.
Use these macros instead of random strings of nop in the various .S files
requiring hazard workarounds.
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to context.S, to eventually allow alternate versions of exception.S to be used.
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move from/to register instructions, as well as a NOP macro. These will be
used in a later diff to allow specific processors to use slightly different
instructions or encodings.
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such statements with it.
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ok halex@
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ok halex@
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- move mfa_session() prototype to smtpd.h
- make mfa session use a tree
- make static functions static
- merge mfa_session_init() into mfa_session()
ok chl@
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"wow!" gilles@
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It's not documented and not implemented.
ok gilles@
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The baud rate on CP1201/2/3 devices can be set in one of two ways:
- The USLCOM_SET_BAUD_DIV command (0x01)
- The USLCOM_SET_BAUD_RATE command (0x13)
Devices based on the CP1204 will only accept the latter command, and ignore
the former. As the latter command works on all chips that this driver
supports, switch to always using it.
A slight confusion here is that the previously used command was incorrectly
named USLCOM_BAUD_RATE - even though we no longer use it, rename it to
USLCOM_SET_BAUD_DIV to closer match the name used in the datasheet.
This change reflects a similar change made in the Linux driver, which was
submitted by preston.fick at silabs.com, and has been tested on all of the
uslcom(4) devices I have to hand.
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ok jmc
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pointed out by Andrew Ngo.
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