Age | Commit message (Collapse) | Author |
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been done earlier because these new and improved constraints lose bigtime
with gcc3, so be sure to compile your kernel with gcc 4 only if you have
atomic.h 1.10 onwards.
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past, pull that code out seperately.
ok guenther miod
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compat names kept in <machine/param.h>. In <sys/socket.h>, pull
in <sys/_types.h> instead of the namespace polluting <machine/param.h>
and completely eliminate __CMSG_ALIGN, replaced by _ALIGN
ok deraadt@
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Since the underlying types of the int_fast types are set by machine/_types.h,
put internal macros in that same file and define the exposed
INT_FAST*_{MIN,MAX} macros from those.
ok millert@, kettenis@
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ok guenther@
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long" for __off_t. This is a C++ ABI bump, but martynas@ already
bumped libstdc++.
Discussed and requested by many on icb.
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also print a meaningful message if the kernel load address conflicts with the
SRM memory areas, so that we can know which kernel load address to use.
Requires `make includes' before attempting to build bootblocks.
Tweaks mk@, `nice' deraadt@
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The new world order of pmemrange makes this data completely redundant
(being dealt with by the pmemrange constraints instead). Remove all code
that messes with the freelist.
While touching every caller of uvm_page_physload() anyway, add the flags
argument to all callers (all but one is 0 and that one already used
PHYSLOAD_DEVICE) and remove the macro magic to allow callers to continue
without it.
Should shrink the code a bit, as well.
matthew@ pointed out some mistakes i'd made.
``freelist death, I like. Ok.' ariane@
`I agree with the general direction, go ahead and i'll fix any fallout
shortly'' miod@ (68k 88k and vax i could not check would build)
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Doesn't matter much since C++ ABI used by GCC doesn't mangle variable
names; however technically is required by Section 7.5 of the C++ spec.
Discussed with/OK guenther@, matthew@.
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Delivering FPE with non-masked exceptions doesn't work on Alpha; I
suspect there's a bug in the kernel trap handler.
FE_INEXACT is intentionally left out of FE_ALL_EXCEPT; since the
inexact exception is not being maintained. Otherwise it will lead
to the bogus results.
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so that the userland actually gets the proto.
OK kettenis@, miod@.
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(interrupt was not for me), 1 (positive interrupt was for me), or -1
(i am not sure...). We have continued with this practice in as many
drivers as possible, throughout the tree.
This makes some of the architectures use that information in their
interrupt handler calling code -- if 1 is returned (and we know
this specific machine does not have edge-shared interrupts), we
finish servicing other possible handlers on the same pin. If the
interrupt pin remains asserted (from a different device), we will
end up back in the interrupt servicing code of course... but this is
cheaper than calling all the chained interrupts on a pin.
This does of course count on shared level interrupts being properly
sorted by IPL.
There have been some concerns about starvation of drivers which
incorrectly return 1. Those drivers should be hunted down so that
they return -1.
(other architectures will follow)
ok kettenis drahn dlg miod
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Discussed and okay drahn@. Okay deraadt@.
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Okay guenther@, millert@.
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ok guenther
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a physical address [more precisely, something suitable to pass to pmap_enter()'sphysical address argument].
This allows MI drivers to implement mmap() routines without having to know
about the pmap_phys_address() implementation and #ifdef obfuscation.
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for it. This makes the netisr a real C function which will help further
development. No noticable performance change on i386 and amd64.
With input from kettenis@ and miod@ additional OKs mikeb@ and henning@
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its better as a per arch MD define anyway. all default to MAXDSIZ as before.
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implement them, and they are of questionable usefulness.
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to complete matthew@'s commit of a few days ago, and drop __HAVE_CPU_MUTEX_LEVEL
define. With help from, and ok deraadt@.
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ok deraadt miod
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and thus should be using spltty()
from Matthew Dempsky
ok oga guenther
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fallback definition in <sys/sched.h>, so that there is no hidden include
ordering requirement between <machine/intr.h> and <sys/sched.h>.
ok deraadt@ tedu@
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rather than defining it separately for each architecture.
Also set it to 4, to accommodate for future UTF-8 support (rfc3629).
Diff by stsp, committing to catch the libc major bump
ok kettenis@, guenther@
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ok jsing@, miod@
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with larger footprint than the usual 2MB, as encountered on some of the
most recent alpha systems.
Tested on many models (DEC 3000, PC164, AS500, ES40, and more)
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necessary for some old SRM version. From NetBSD.
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While there, add two more RPB system type values.
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provide and use BUS_SPACE_BARRIER_xxx.
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to make sure the register holding the ld_l and st_c addresses doesn't
get reused when gcc's register allocator is too aggressive.
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Saves every damned driver calling bzero(), and continues the M_ZERO,
PR_ZERO symmetry.
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MD code would free resources that couldn't be freed until we were no
longer running in that processor. However, it's is unused on all
architectures since mikeb@'s tss changes on x86 earlier in the year.
ok miod@
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adding splsoftassert().
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remove the special casing in splassert().
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levels. This will allow for platforms where soft interrupt levels do not
map to real hardware interrupt levels to have soft ipl values overlapping
hard ipl values without breaking spl asserts.
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happens instead of panicing; while there, start providing more details
for ev6 processor machine checks as well.
This allows power supplies to be unplugged and exchanged while the system
is running, without causing the kernel to crash.
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protected by __ISO_C_VISIBLE > 1999. With a little help from miod@.
ok miod@
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which are uniform for the profclock on each cpu in a SMP system (but using
a different seed for each cpu). on all cpus, avoid seeding with a value out
of the [0, 2^31-1] range (since that is not stable)
ok kettenis drahn
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anything special to prod a cpu to leave the idle loop in signotify.
powerpc, i386, amd64 and sparc64 will follow soon so that everyone has
the same interface to wake an idling cpu.
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