Age | Commit message (Collapse) | Author |
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(noticed because of another issue: one consumer is a high level busdriver,
but also contains i2c support, so the isa #define for ia_irq clashes
against i2c)
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honour this setting and consider them level-triggered instead of `polarity
decided by the first driver to use it'.
Add explicit code to turn registration of edge-triggered interrupts 3 and 4
into level-triggered, if they were set up a level-triggered by the SRM.
Based upon a NetBSD diff which eventually got reverted in NetBSD. However,
it turns out this is necessary for the kernel to correctly run with serial
console on my Multia.
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stack, for {e,}isa drivers might have a need for them way after autoconf - at
least pcic@isa does.
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isa_chipset_tag_t, not an isa_chipset_tag_t *, as isa_chipset_tag_t is already
a pointer.
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behind a bridge, if the SRM didn't pick an interrupt line for them.
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interrupt storm at the end of autoconf.
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space read, for errors may not cause a machine check.
This makes phantom PCI devices disappear on alphabook.
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with the base address of the window, which only works if its size is smaller
than the address it begins at.
Until these assumptions are carefully fixed, revert r1.9, and go back to using
only one direct map window.
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the fan sensors on systems without RMC. From NetBSD, ok deraadt@
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ok miod@
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back to sgmap if the direct mapping fails.
ok miod@
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interrupt is routed through the ISA PIC, the interrupt is edge-triggered
(despite PCI interrupts being level-triggered).
Attempt to recognize this and correctly setup the PIC ELCR register to `edge'.
This allows ES40 systems (and maybe others, but apparently all the other alpha
systems with on-board M5237 correctly route its interrupt as a PCI interrupt)
to reliably boot multiuser without suffering from USB interrupt storms (this is
especially noticeable when using glass console which, unlike serial console,
does not trigger other interrupts to give other devices a chance to run).
However, this is not enough yet to allow for proper USB device usage; your
mileage may vary.
Tested by bluhm@ and me. Putting it early in the release cycle so that
regressions on other systems, if any, can hopefully get noticed soon enough.
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ok dlg@ mpi@ deraadt@
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ok miod@
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unconditional call in machdep.c!boot(). Except that the cpp conditional
enabling its use was not in machdep.c's scope, so this function was never
called. Ouch.
Remove it from boot() and grow a ca_activate method to the sio(4/alpha) device,
which will take care of invoking sio_intr_shutdown() if DVACT_POWERDOWN.
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adapted from a long gone FreeBSD.
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ok kettenis@
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siop data parity errors when parity is enabled. This ought to help Alphabook
systems, as well as early Multia. Tested on Multia.
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miod did not disagree.
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Allows pcic to attach and correctly pick a suitable interrupt on Multia.
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many LCA-based systems apparently don't. From NetBSD.
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No functional change.
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ok guenther millert kettenis
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boot() as required.
ok miod
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This mandatory function will get invoked in pci_probe_device(), and allows
a pci host driver to alter the pci_attach_args passed to a device when
attaching.
This function will also, if returning non-zero, cause the device to be
skipped completely during all the phases of the PCI device discovery
(i.e. ressource enumeration, ressource assignment, and actual attachment).
This particular feature is experimental and might be reverted in the future
(or the scope narrowed to device attachment only).
A dummy #define pci_probe_device_hook() 0 is added to all platforms except
sgi, where real functions (currently only returning 0) are added; real meat
will be added shortly.
Discussed at s2k11, no objection from the usual suspects.
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(interrupt was not for me), 1 (positive interrupt was for me), or -1
(i am not sure...). We have continued with this practice in as many
drivers as possible, throughout the tree.
This makes some of the architectures use that information in their
interrupt handler calling code -- if 1 is returned (and we know
this specific machine does not have edge-shared interrupts), we
finish servicing other possible handlers on the same pin. If the
interrupt pin remains asserted (from a different device), we will
end up back in the interrupt servicing code of course... but this is
cheaper than calling all the chained interrupts on a pin.
This does of course count on shared level interrupts being properly
sorted by IPL.
There have been some concerns about starvation of drivers which
incorrectly return 1. Those drivers should be hunted down so that
they return -1.
(other architectures will follow)
ok kettenis drahn dlg miod
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given pcitag_t configuration address space. Currently, all pci controllers
will return the usual 0x100 bytes of PCI configuration space, but this will
eventually change on PCIe-capable controlers.
ok kettenis@
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Bogus chunks pointed out by matthew@ and miod@. No cookies for
marco@ and jasper@.
ok deraadt@ miod@ matthew@ jasper@ macro@
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ok kettenis, deraadt
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side effect, this change makes displayed messages shorter.
miod@ has observed that `Horse' is the codename of the chip, which
gets paired with a `Saddle' companion chip. there is one hose
(i.e., bus) per chip; others (`Tsunami') have two hoses per chip,
or even four (`Typhoon'); so, `Horse' is not really a typo.
written with clever advice from krw@ and miod@
miod@ has suggested the capitalization for `Saddle'.
ok krw@, miod@
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are very close to the Tsunami systems (rpb family 34) and share the existing
Tsunami code; the tsc(4) Tsunami controller code is extended to handle the
Titan differences, except for the Titan AGP GART which is left unsupported
for now.
Tested to not cause regressions on DS20 (deraadt@) and ES40 (miod@).
Titan support tested by Sergey Prysiazhnyi on DS25, many thanks for your time!
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From FreeBSD.
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BUS_SPACE_MAP_LINEAR in i/o space, or noncacheable linear TURBOchannel
mappings).
From NetBSD
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tga on non-bwx machines. Reported and fix tested by kurt@
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Tested by myself, sthen, oga, kettenis, and jasper.
Input from sthen and jasper.
ok kettenis
(Manpage follows shortly.)
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provide and use BUS_SPACE_BARRIER_xxx.
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bus_space_alloc() as a bitmask of flags, and not a boolean controlling
cacheability; and make sure the three MI BUS_SPACE_MAP_xxx values documented
in the manual page are defined on all platforms as well.
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