Age | Commit message (Collapse) | Author |
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This does not yet work for amd64 - getting the structure into the tree so
others can help.
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ok nicm@
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MI float.h which pulls in and defines the values that are needed from
there, and repair sys/limits.h so that it defines the values it needs
as well (depending on POSIX version, XPG version, etc). guenther has
a more exact selection of that coming for limits.h.
this also fixes a few mistakes for the vax.
reviewed by kettenis and guenther.
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a new "machine comaddr" command that makes it possible to configure the
io port used to access the serial port. This can be used to use serial ports
on a puc(4) device as serial console.
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setting %fs, resulting in it not getting restored properly later
ok mikeb@ deraadt@
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hangs on resume. Discussed with and ok kettenis, haesbaert
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"Processor May Incorrectly Update Stack Pointer" by setting a bit
marked 'reserved' in an MSR that is only "documented" to exist on 12h.
AMD claim this problem can only occur in 64-bit mode, set the workaround
bit on i386 in case this isn't true and in the interest of keeping the
errata in sync between i386/amd64.
ok deraadt@
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Discussed with many on hackers.
"Go ahead" kettenis@
"Get to it" deraadt@
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different scheme.
ok jsg@
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is the DUID that we booted from, which is not always going to be the same
as the DUID that we mount root on.
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This is all documented at:
http://support.amd.com/us/Embedded_TechDocs/25481.pdf (page 20)
http://www.intel.com/assets/pdf/appnote/241618.pdf (page 41)
ok jsg@
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past, pull that code out seperately.
ok guenther miod
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for pointing to the thread-control-block. Support for mapping this
to the correct hardware register can be added as it's finished;
start with support for amd64, sparc, and sparc64. Includes syscalls
for getting and setting it (for a portable __errno implementation) as
well as creating a new thread with an initial value for it.
discussed with miod@, kettenis@, deraadt@; committing to get the syscalls
in with the impending libc bump and do further refinements in tree
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This mandatory function will get invoked in pci_probe_device(), and allows
a pci host driver to alter the pci_attach_args passed to a device when
attaching.
This function will also, if returning non-zero, cause the device to be
skipped completely during all the phases of the PCI device discovery
(i.e. ressource enumeration, ressource assignment, and actual attachment).
This particular feature is experimental and might be reverted in the future
(or the scope narrowed to device attachment only).
A dummy #define pci_probe_device_hook() 0 is added to all platforms except
sgi, where real functions (currently only returning 0) are added; real meat
will be added shortly.
Discussed at s2k11, no objection from the usual suspects.
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compat names kept in <machine/param.h>. In <sys/socket.h>, pull
in <sys/_types.h> instead of the namespace polluting <machine/param.h>
and completely eliminate __CMSG_ALIGN, replaced by _ALIGN
ok deraadt@
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Since the underlying types of the int_fast types are set by machine/_types.h,
put internal macros in that same file and define the exposed
INT_FAST*_{MIN,MAX} macros from those.
ok millert@, kettenis@
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ok guenther@
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filled in. Move D_CLONE down to 0x0001 as suggested by thib.
ok deraadt thib
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the MDP_IRET flag in md_proc, then switch sigcode to enter the kernel
via syscall instead of int$80. Rearrange the return paths in both the
sysretq and iretq paths to reduce how long interrupts are blocked and
shave instructions.
ok kettenis@, extra testing krw@
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triples the number of interrupt vectors that can be handled by the primary
CPU. Important for MSI, but could also fix some issues with large machines
loaded with a lot of devices.
tested by many; ok deraadt@, marco@
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The new world order of pmemrange makes this data completely redundant
(being dealt with by the pmemrange constraints instead). Remove all code
that messes with the freelist.
While touching every caller of uvm_page_physload() anyway, add the flags
argument to all callers (all but one is 0 and that one already used
PHYSLOAD_DEVICE) and remove the macro magic to allow callers to continue
without it.
Should shrink the code a bit, as well.
matthew@ pointed out some mistakes i'd made.
``freelist death, I like. Ok.' ariane@
`I agree with the general direction, go ahead and i'll fix any fallout
shortly'' miod@ (68k 88k and vax i could not check would build)
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Doesn't matter much since C++ ABI used by GCC doesn't mangle variable
names; however technically is required by Section 7.5 of the C++ spec.
Discussed with/OK guenther@, matthew@.
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frequencies on newer AMD systems.
Driver written by Bryan Steele / brynet gmail.com
Put it in deraadt@
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this code differs somewhat from the i386 code because the amd64 interrupt
subsystem is quite different. Still disabled like on i386.
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kernel so that it can use it to identify the root disk. This will be
needed in order to correctly boot from a softraid volume.
ok deraadt@ marco@ krw@
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says; for couple of reasons:
- makes it actually work, since the code clears ~FE_ALL_EXCEPT bits.
- standard requires that.
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feedback & ok guenther@, matthew@
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(interrupt was not for me), 1 (positive interrupt was for me), or -1
(i am not sure...). We have continued with this practice in as many
drivers as possible, throughout the tree.
This makes some of the architectures use that information in their
interrupt handler calling code -- if 1 is returned (and we know
this specific machine does not have edge-shared interrupts), we
finish servicing other possible handlers on the same pin. If the
interrupt pin remains asserted (from a different device), we will
end up back in the interrupt servicing code of course... but this is
cheaper than calling all the chained interrupts on a pin.
This does of course count on shared level interrupts being properly
sorted by IPL.
There have been some concerns about starvation of drivers which
incorrectly return 1. Those drivers should be hunted down so that
they return -1.
ok and help from various people. In snaps for about a week now.
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Additional testing by jasper@ and pea@
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and the problem isn't obvious yet.
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Add pcb_fsbase to the PCB for tracking what the value for the thread
is, and ci_cur_fsbase to struct cpu_info for tracking the CPU's current
value for FS.base, then on return to user-space, skip the setting if the
CPU has the right value already. Non-threaded processes without TLS leave
FS.base zero, which can be conveniently optimized: setting %fs zeros
FS.base for fewer cycles than wrmsr.
ok kettenis@
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Discussed and okay drahn@. Okay deraadt@.
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mask out invalid bits to prevent a protect fault.
Original diff by joshe@; further feedback and ok kettenis@
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of them, as well as some other unused proc md_flags bits: MDP_COMPAT and
MDP_SYSCALL.
ok mikeb@
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512-byte sectors) as some BIOSen get confused when we ask for sectors
higher up.
Uss u_int throughout the boot code to calculate sector addresses,
since 32 bits is enough to do 28 ^ 1 - 1 arithmetic. Add checks
for wraparound.
I can now install and boot from the 7th extended partition below
128GB.
Much feedback & guidance from deraadt@. Also from weingart@ on
BIOS io.
ok deraadt@ (less a couple of minor tweaks found in testing)
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Add missing __statement modifiers and correct %1 to %0 in the asm.
ok mikeb@, pirofti@, drahn@
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Okay guenther@, millert@.
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ok ketttenis
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access to PCIe extended configuration space access on modern i386 and amd64
machines.
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ok guenther
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