summaryrefslogtreecommitdiff
path: root/sys/arch/amd64
AgeCommit message (Collapse)Author
2022-01-02Prism54 (only full-mac varients) -> Prism54 Full-MACJonathan Gray
2022-01-02convension -> conventionJonathan Gray
2022-01-02spellingJonathan Gray
2022-01-01Add ENTRY_NB() macro for doing an ASM function entry without settingPhilip Guenther
the binding to global (NB == "no binding"), as clang 13 is now warning about changing the binding from global to weak. This first pass does amd64 and sparc64 and pulls DEFS.h out of the per-arch directory to a common directory; others to follow ok kettenis@
2021-12-31avaialble -> availableJonathan Gray
2021-12-31specifed -> specifiedJonathan Gray
2021-12-28Now that -A prints -- markers as it is supposed to filter them out whenOtto Moerbeek
doing the consistency check for locore.o; ok millert@
2021-12-26Add address locators for the ACPI "bus" and use these to fix the order ofMark Kettenis
the com(4) devices to match the traditional order one the ISA bus. ok patrick@, anton@
2021-12-20Make mtw(4) known to the config(8) framework.hastings
Not enabled yet. Pending firmware availability. ok stsp@ jmatthew@
2021-12-17Disable a few warning flags that were introduced and enabled by defaultPatrick Wildt
with LLVM 13.
2021-12-16Attach com over acpi on amd64. Some hardware uses a different interruptAnton Lindqvist
assignment compared to the the legacy one supported by com over isa. This causes the console to halt once userland takes over as no interrupts are received. The actual address and irq can be read from ACPI, kettenis@ already added support for arm64 which paved the way for amd64. Some consoles that previously attached over isa are now expected to attach over acpi. Thanks to patrick@ for testing on arm64. ok kettenis@
2021-12-14delete incorrect comment about sys/cdefs.hTheo de Raadt
2021-12-09Fix cpuid leaf clamping to let through cpuid(0x15) when we have anPhilip Guenther
invariant TSC and report that correctly in the guest's cpuid(0).eax prompted by debug messages in report from Josh Grosse (josh(at)jggimi.net) ok mlarkin@
2021-12-09We only have one syscall table: inline sysent/SYS_MAXSYSCALL andPhilip Guenther
SYS_syscall as the nosys() function into the MD syscall entry routines and the SYSCALL_DEBUG support. Adjust alpha's syscall check to match the other archs. Also, make sysent const to get it into .rodata. With that, 'struct emul' is unused: delete it and all its references ok millert@
2021-12-07Add missing kernel unlock in error path.Anton Lindqvist
ok dv@ Reported-by: syzbot+c773ba1ce9b2d259d27f@syzkaller.appspotmail.com
2021-12-04vmm(4): reload vmcs after possible sleep pointsDave Voutila
Guests running on Intel hosts that sleep on a lock might have their process moved to another cpu core by the scheduler. If this happens, the VMCS needs to be remotely cleared and locally loaded otherwise vmx instructions will fail. vmd(8) will receive a failure code and abort the guest. This change stores the current (last) cpu the process was on before attempting a function call that may sleep (e.g. uvm_fault(9)). Upon function return, perform the VMCS dance if needed. Tested with help from Mischa Pieters. OK mlarkin@
2021-11-29vmm(4): bump remote vmclear spinout ticksDave Voutila
Older/slower hosts could easily hit the cap under load. Set it to the same value we use in mplock_debug. ok mlarkin@
2021-11-27stop building kernels with -Wno-uninitialized on clang archsJonathan Gray
this hides real problems that could be found at build time ok kettenis@ visa@, ok sashan@ on amd64/i386
2021-11-22vmm(4): copyout guest state on VM_EXIT_NONEDave Voutila
Partly related to a bug reported by kn@. We should be copying out the guest exit state (including registers) when we succesfully return from the vcpu run loop even if we don't require an emulation assist from userland/vmd(8). This condition was introduced when I removed the use of yield() and instead exit the kernel if the scheduler says we've hogged the cpu. ok mlarkin@
2021-11-19Correct the CPUID() and CPUID_LEAF() macros to not include a trailingPhilip Guenther
semicolon ok deraadt@
2021-11-14Make sure efiboot is built with RELA/REL relocations and not RELR,Philip Guenther
as self_reloc.c only handles the former. ok deraadt@ kettenis@
2021-11-11Retire switch(4) it never really was production ready and the OpenFlowClaudio Jeker
API implemented is a deadend. OK akoshibe@ yasuoka@ deraadt@ kn@ patrick@ sthen@
2021-11-07Enable igc(4).Patrick Wildt
ok deraadt@
2021-11-02Remove trailing whitespaceMike Larkin
2021-11-02Enable igc(4).Patrick Wildt
Tested by kevlo@
2021-10-26Improve unhibernate performance (30% on some machines, another upcoming diffTheo de Raadt
shows gains up to 50%) by skipping attach of irrelevant devices, which are tagged CD_SKIPHIBERNATE in the per-driver cfdriver. In particular, usb devices are not attached, so they don't need to detach during the suspend-unpack-resume. New bootblocks are required (which tell the kernel it's job is unhibernate before configure runs) tested by various
2021-10-25typos in comments, from jj, reported by Elyes Haouas on ircStuart Henderson
2021-10-24#define open O_* flags in libsa/stand.h, so that bootblocks can useTheo de Raadt
O_RDONLY rather using 0 ok beck
2021-10-24Stop setting etype in the MD crypto code. So far we have set the etypePatrick Wildt
and returned the error, which made the MI crypto code set the etype for a second time. We still have to set etype after calling the MD process function, as the callers of crypto_invoke() still expect error handling to be shown through the etype. But at least now all MD crypto code does not have to worry about that anymore. Once the callers are changed to not look at etype anymore, we can get rid of it completely. ok tobhe@
2021-10-23Retire asynchronous crypto API as it is no longer required by any driver andTobias Heider
adds unnecessary complexity. Dedicated crypto offloading devices are not common anymore. Modern CPU crypto acceleration works synchronously, eliminating the need for callbacks. Replace all occurrences of crypto_dispatch() with crypto_invoke(), which is blocking and only returns after the operation has completed or an error occured. Invoke callback functions directly from the consumer (e.g. IPsec, softraid) instead of relying on the crypto driver to call crypto_done(). ok bluhm@ mvs@ patrick@
2021-10-21Remove hifn(4), safe(4), and ubsec(4) crypto drivers. They requireAlexander Bluhm
the asynchronous crypto API which makes progress in MP difficult. The hardware is rarely available. They support only obsolete crypto algorithms. Scheduling crypto tasks via PCI is probably slower than the CPU, especailly as modern CPUs have their own accelerators.
2021-10-13The kernel crypto framework sometimes returned an error, sometimesAlexander Bluhm
the callback was called, and sometimes both. So the caller of that API could not release resources correctly. A bunch of errors can or should not happen, replace them with an assert. Remove redundant checks. crypto_invoke() should not return the error, but pass it via callback. Some old hardware drivers keep part of their inconsistency as I cannot test them. OK mpi@
2021-10-06Change sendsig() interface so that the MD code does not need to accessClaudio Jeker
data from struct process anymore. This changes how siginfo and onstack are accessed and make sendsig() more MP friendly. With and OK semarie@ OK kettenis@
2021-09-14Make pmap_extract() mpsafe by grabbing the kernel lock for userland pmapsMark Kettenis
while walking the page tables. ok mpi@, deraadt@
2021-09-14Enable cy(4) on amd64.Jan Klemkow
ok deraadt
2021-09-13vmm(4): add limit to number of vcpusDave Voutila
After fixing previous syzbot issues related to lock contention, the reproducer code managed to hit an issue where it can exhaust kernel memory by allocating vcpus. Since each vcpu (regardless if it's SVM or VMX-capable) requires wiring some number of pages of memory, it was possible to starve other parts of the kernel. This change limits the total number of vcpus to 512, a conservative number given vmm(4) only supports single vcpu guests at the moment. ok mlarkin@
2021-09-13Enable uaq(4) on amd64. Investigations into problems on other platformsJonathan Matthew
are ongoing.
2021-09-06Serialize access to the global list of pmaps with a mutex.Martin Pieuchot
This prevents possible corruption due to a concurrent access between pmap_growkernel() & pmap_create/pmap_destroy(). Discussed with and ok kettenis@
2021-09-05vmm(4): raise vm pool ipl to IPL_MPFLOORDave Voutila
Similar to the recent change by mpi in revision 1.288, commitid: A4zhVhOoHAIpRGBJ, raise the ipl level of the vm_pool to IPL_MPFLOOR to prevent lock ordering issues. ok mpi@
2021-09-05vmm(4): fix vcpu locking issues reported by syzbotDave Voutila
Syzbot found 3 issues related to the new vcpu lock. This diff adds a write lock to vm_rwregs (needed on VMX as vmread instructions require taking ownership of the vcpu to load the VMCS) and prevents locking the vcpu in vm_run if we fail the cas operation for toggling vcpu state. In the future, we can push the locking in vm_rwregs on AMD SVM systems. The panics in question: panic: rw_enter: vcpulock locking against myself panic: lock (rwlock) vcpulock not locked panic: vcpulock: lock not held Reported-by: syzbot+1dab11e14aa7a159cadf@syzkaller.appspotmail.com Reported-by: syzbot+36244e105daffa1a81b6@syzkaller.appspotmail.com Reported-by: syzbot+c78b5644c7dc3d9b689a@syzkaller.appspotmail.com ok mlarkin@
2021-09-05Introduce dummy pagers for 'special' subsystems using UVM objects.Martin Pieuchot
Some pmaps (x86, hppa) and the buffer cache rely on UVM objects to allocate and manipulate pages. These objects should not be manipulated by uvm_fault() and do not currently require the same locking enforcement. Use the dummy pagers to explicitly document which UVM functions are meant to manipulate UVM objects (uobj) that do not need the upcoming `vmobjlock' and instead still rely on the KERNEL_LOCK(). Tested by many as part of a larger diff. ok kettenis@, beck@
2021-09-04To mitigate against spectre attacks, AMD processors without theAlexander Bluhm
IBRS feature need an lfence instruction after every near ret. Place them after all functions in the kernel which are implemented in assembler. Change the retguard macro so that the end of the lfence instruction is 16-byte aligned now. This prevents that the ret instruction is at the end of a 32-byte boundary. The latter would cause a performance impact on certain Intel processors which have a microcode update to mitigate the jump conditional code erratum. See software techniques for managing speculation on AMD processors revision 9.17.20 mitigation G-5. See Intel mitigations for jump conditional code erratum revision 1.0 november 2019 2.4 software guidance and optimization methods. OK deraadt@ mortimer@
2021-09-04in backtraces, print as many arguments as the function actually hasJasper Lievisse Adriaanse
since amd64 is compiled with -msave-args we have all arguments available to print and there's no reason to limit this to six. discussed with kettenis@
2021-09-03add kprobes provider for dtJasper Lievisse Adriaanse
this allows us to dynamically trace function boundaries with btrace by patching prologues and epilogues with a breakpoint upon which the handler records the data, sends it back to userland for btrace to consume. currently it's hidden behind DDBPROF, and there is still a lot to cleanup and improve, but basic scripts that observe return codes from a probed function work. from Tom Rollet, with various changes by me feedback and ok mpi@
2021-09-03vmm(4): grab kernel lock before vmspace initDave Voutila
We need the kernel lock before calling some uvm functions. Fixes a panic reported by syzbot. Reported-by: syzbot+dd7a70eaf794705db27e@syzkaller.appspotmail.com ok mlarkin@
2021-09-02add aq(4) to amd64 RAMDISK_CD and riscv64 RAMDISKMike Larkin
2021-09-02aq(4) driver for Aquantia 1/2.5/5/10Gb/s PCIe ethernet adaptersMike Larkin
Adds support for Aquantia AQC1xx family of PCIe ethernet adapters. This driver supports 1Gbps through 10Gbps modes of operation based on the hardware and media/switch capabilities. The initial code was ported from NetBSD, with jmatthew@ finishing up the Tx/Rx ring support and interrupt handler routine. The driver only supports devices using firmware V2. This diff enables aq(4) on riscv64 and amd64, the only platforms where I have tested the driver, but it likely works on other architectures as well.
2021-09-02rename rw locks to avoid ambiguity and verbosenessDave Voutila
Syzbot might complain about "new" panics, but to help debug a recent report it helps to have unique rw lock names. "sounds good to me" @mlarkin
2021-09-01Prevent lock ordering issue by raising ipl level of vcpu_pool to IPL_MPFLOOR.Martin Pieuchot
Reported-by: syzbot+c8905496cd61610f77e2@syzkaller.appspotmail.com ok mlarkin@
2021-09-01Older AMD CPUs that do not support IBRS need an lfence after retAlexander Bluhm
to stop speculation. This seems to be necessary when the branch predictor hits the ret for the first time. In their white paper to mitigate speculation attacks, AMD's retpoline example has an explicit lfence. Adjust our retpoline assembly macro in the kernel. OK guenther@ mortimer@ deraadt@
generated by cgit v1.2.3 (git 2.25.1) at 2025-01-19 09:08:49 +0000