Age | Commit message (Collapse) | Author |
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tested on a GENERIC config from all arches.
ok deraadt@ miod@
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no binary change
ok deraadt@
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given pcitag_t configuration address space. Currently, all pci controllers
will return the usual 0x100 bytes of PCI configuration space, but this will
eventually change on PCIe-capable controlers.
ok kettenis@
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used in cpu_switch() for handling it. Also, delete an unnecessary
instruction that I added while debugging the pm_cpus handling before
ok kettenis@
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early MD and late MI files must be split up so that vers.o can sneak
between. Issue spotted by bluhm, repair discussed with miod
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having it linked last is bad (on at least i386 and amd64) because the lapic
is mapped over the start of the data segment -- savecore(8) then reads the
version string for a fixed buffer space, and reads into the lapic area
causing unintended side-effects (at least on Intel X5570 and X5680)
found by pedro, discussed with kettenis and mpf and miod
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tested by dlg@, ok jsing@
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requested by deraadt@
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all 48 cores in one of my boxes.
requested by deraadt@
made possible by the recent pmap diff by kettenis@
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implement them, and they are of questionable usefulness.
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out-of-bounds array access later on.
Allows OpenBSD to boot on machines with more than 32 CPUs/cores.
ok krw@, jsing@, dlg@
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until possible removal, if indeed this causes no regression for scanner users.
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aren't enough to keep track of possible cores these days anyway.
36-core amd64 box encountered by dlg@
ok dlg@ kettenis@
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because it is always PCKBC_KBD_SLOT
ok krw@, miod@
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This has never happened and this wouldn't make much sense on anything but
hp300, if at all, nowadays.
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MI header file.
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kernel, currently limited to low-hanging fruit: these variables were used
by bus_dma to specify the range in which to allocate memory, back when
uvm_pglistalloc() was stupid and would not walk the vm_physseg[].
Nowadays, except on some platforms for early initialization, these variables
are not used, or do not need to be global variables. Therefore:
- remove `extern' declarations of avail_start and avail_end (or close cousins,
such as arm physical_start and physical_end) from files which no longer need
to use them.
- make them local variables whenever possible.
- remove them when they are assigned to but no longer used.
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uncommenting it is intentional.
ok deraadt@
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#include "foo.h"
#if NFOO > 0
(whole file)
#endif
since config(8) file inclusion rules already do it for you.
ok deraadt@
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ok krw@ deraadt@
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use proper define for the initial counter block
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next to the cpu's GDT, also making the double-fault stack per-CPU,
leaving it at the top of the page of the CPU's idle process. Inline
pmap_activate() and pmap_deactivate() into the asm cpu_switchto
routine, adding a check for the new pmap already being marked as
active on the CPU. Garbage collect the hasn't-been-used-in-years
GDT update IPI.
Tested by many; ok mikeb@, kettenis@
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.h files into the ctags run as well to bring #define's and structs and
such into scope. Problem reported by thib
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these devices are different from the RTL8191SU/RTL8192SU ones that are
not supported by this driver.
requires a firmware (urtwn-firmware-1.0)
committed over a Hercules HWNUp-150 (RTL8188CU).
ok deraadt@
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for vmt to attach after vmt_probe succeeds. this prevents vmt from
appearing at other attach points hanging off mainbus.
found by phessler@ and debugged gently by claudio@
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consistent with the rest of the file.
requested to be a seperate commit by kettenis@
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real panic. this brings amd64 inline with all of the other arches.
OK kettenis@, mikeb@, krw@, guenther@, thib@
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register with the null selector (disabling use of it), stop reloading
it on every context switch, and blow away the table itself, as well
as the pcb and pmap bits that were used to track it. Also, delete
two other unused pcb members: pcb_usersp and pcb_flags. (Deleting
pcb_usersp also keeps the pcb_savefpu member aligned properly.)
Finally, delete the defines for the unimplemented AMD64_{GET,SET}_LDT
sysarch() calls.
Tested by various with both AMD and Intel chips
ok mikeb@
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"sure." deraadt@
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segments in the GDT instead of the LDT and eliminate the GDT slots
that we don't actually use.
tested on both amd and intel by several
not really the right person, but ok: kettenis@
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ok mlarkin
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ok kettenis marco miod
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anymore.
ok kettenis
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ok kettenis
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This prevents a protection fault if a userland signal handler
scribbles all over it's struct sigcontext
Help from and ok guenther@ kettenis@
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to complete matthew@'s commit of a few days ago, and drop __HAVE_CPU_MUTEX_LEVEL
define. With help from, and ok deraadt@.
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with CPL == 0 but the user's GS.base, so the normal INTRENTRY handling
won't work. Contrawise, the asm that trap() redirects us to when that
happens (resume_iret) sees a trapframe showing CPL==3 but it's run with
the kernel's GS.base, so INTRENTRY won't work there either.
asm style fixes drahn@ and mikeb@
ok kettenis@
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due to the way arguments are parsed, pid has to be specified
in the hexadecimal notation.
tested by me and sthen, ok sthen kettenis
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