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rather have the USB HCI emulate it during boot, while legacy mode is enabled.
This causes pckbd0 to attach as the console device, but is lost as soon as
the USB HCI driver attaches.
The disappearance of the emulated PS/2 controller can however be detected
in pckbc(4) - which is supposed to attach after [eou]hci(4), with the controller
refusing to ack commands and replying ``please resend'' instead.
In that case, the kernel will now no longer attach pckbd, and will perform a
new console input device selection, allowing the (real) usb keyboard to
become the console.
Thanks to krw@ for countless tests on legacy-free hardware; also tested on
more conventional hardware by naddy@ and I.
Only amd64 and i386 platforms are affected by this change.
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Tested by myself, sthen, oga, kettenis, and jasper.
Input from sthen and jasper.
ok kettenis
(Manpage follows shortly.)
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errnos. Note that the error strings are being ignored, since we long ago
decided to not spam the console, and there is no other nice way to use the
errors (without changing the ioctls to pass it back)
The errno is now useful, since we can pass b_error from failing IO up, and
the drive can decide how to use that
ok miod
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for claudio@ ok deraadt@
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should help in future using large pages for text/etc.
Also, since we do not use the .eh frame stuff, we can
nuke them, saving some bytes...
Ok kettenis@, "more control over linking is a good thing,
but I can't comment further" art@.
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Ok oga@, "the time is now" deraadt@.
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some additional code.
ok toby@, oga@
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exactly the same the mi could will use if bufinit() is invoked with
bufpages == 0.
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anymore. Get rid of it completely.
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right now, we do a pmap_kenter_pa(), we then get the pte (behind pmap's
back) and check for the cache inhibit bit (if needed). If it isn't what
we want (this is the normal case) then we change it ourselves, and do a
manual tlb shootdown (i386 was a bit more stupid about it than amd64,
too).
Instead, make it so that like on some other archs (sparc64 comes to
mind) you can pass in flags in the low bits of the physical address,
pmap then does everything correctly for you.
Discovered this when I had some code doing a lot of bus_space_maps(), it
was incredibly slow, and profilling was dominated by
pmap_tlb_shootwait();
discussed with kettenis@, miod@, toby@ and art@.
ok art@
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fixes stability problems on some machines; ie. crashes in
in cpu_idle_cycle
from netbsd, via dhill
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ok deraadt@
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a few arches where toolchain limitations apply) will embed some symbolic
information about the various structs used within the kernel, and have
new ddb commands allowing struct display and some useful information
gathering. Kernel rodata increase varies accross platforms from ~150KB to
~300KB.
This option is not enabled by default.
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returning an error. so next time we mess around, we may get annoying
printfs.
Fix this.
ok kettenis@
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No longer allocate a static amount of memory for messages in MD
boot path; message queues, message metadata, and message data now
all use dynamic memory, which means that runtime sysctls should now
be trivial to implement.
Since I'm going to be around all week to fix any breakage, this should
probably just go in now.
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this driver was written by Pyun YongHyeon from FreeBSD.
"go ahead" deraadt@
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Now instead of the global object hashtable, we have a per object tree.
Testing shows no performance difference and a slight code shrink. OTOH when
locking is more fine grained this should be faster due to lock contention on
uvm.hashlock.
ok thib@, art@.
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after c2k9
allows buffer cache to be extended and grow/shrink dynamically
tested by many, ok oga@, "why not just commit it" deraadt@
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would do manually.
sparc64 does a similar thing already.
ok kettenis@
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provide and use BUS_SPACE_BARRIER_xxx.
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makes Enhanced SpeedStep work on new machines, but requires
acpimadt0 to be enabled.
ok by jsg@ and claudio@
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bus_space_alloc() as a bitmask of flags, and not a boolean controlling
cacheability; and make sure the three MI BUS_SPACE_MAP_xxx values documented
in the manual page are defined on all platforms as well.
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of the bus_space_tag_t it contains; an upcoming implementation will need
to know the rbus_tag_t for which it works at this point.
All callers updated accordingly; no functional change intended.
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logic to be chipset dependent; no functional change yet.
ok kettenis@
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More architectures hopefully to follow.
ok kettenis@
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allocator).
"i can't see any obvious problems" oga
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separately).
a change at or just before the hackathon has either exposed or added a
very very nasty memory corruption bug that is giving us hell right now.
So in the interest of kernel stability these diffs are being backed out
until such a time as that corruption bug has been found and squashed,
then the ones that are proven good may slowly return.
a quick hitlist of the main commits this backs out:
mine:
uvm_objwire
the lock change in uvm_swap.c
using trees for uvm objects instead of the hash
removing the pgo_releasepg callback.
art@'s:
putting pmap_page_protect(VM_PROT_NONE) in uvm_pagedeactivate() since
all callers called that just prior anyway.
ok beck@, ariane@.
prompted by deraadt@.
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three
commits:
1) The sysctl allowing bufcachepercent to be changed at boot time.
2) The change moving the buffer cache hash chains to a red-black tree
3) The dynamic buffer cache (Which depended on the earlier too).
ok on the backout from marco and todd
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ok deraadt@ kettenis@
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> extend uvm_page_physload to have the ability to add "device" pages to the
> system.
since it was overlayed over a system that we warned would go "in to be
tested, but may be pulled out". oga, you just made me spend 20 minutes
of time I should not have had to spend doing this.
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My
bios0: ASUSTeK Computer INC. P5K-E
cpu0: Intel(R) Core(TM)2 Quad CPU Q6600 @ 2.40GHz, 2405.74 MHz
cpu1: Intel(R) Core(TM)2 Quad CPU Q6600 @ 2.40GHz, 2405.46 MHz
cpu2: Intel(R) Core(TM)2 Quad CPU Q6600 @ 2.40GHz, 2405.46 MHz
cpu3: Intel(R) Core(TM)2 Quad CPU Q6600 @ 2.40GHz, 2405.46 MHz
can't boot with this in. It always hangs somewhere in fsck'ing if
any, or between netstart and local daemons if no fsck'ing. Also
fubars theo's real amd machine.
Much more testing needed for this.
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this might need to be revisted later if its clear that there are machines
which only come up with a single state but more may appear after a PPC
change but for now we will just not initilize on systems with a single
state a boot. Solves a divide by zero panic when using the PDC diff on
broken hardware.
ok marco@, krw@
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as well, reminded by miod@
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eventually be needed by bouncebuffers, and I need it for some of my evil
graphics shitz.
ok kettenis@ with some tweaks
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system.
This is needed in the case where you need managed pages so you can
handle faulting and pmap_page_protect() on said pages when you manage
memory in such regions (i'm looking at you, graphics cards).
these pages are flagged PG_DEV, and shall never be on the freelists,
assert this. behaviour remains unchanged in the non-device case,
specifically for all archs currently in the tree we panic if called
after bootstrap.
ok art@, kettenis@, ariane@, beck@.
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in the IPI handler so that it works when it interrupts userspace,
waiting for the droppmap IPI to complete when destroying it, and
(most importantly) don't call pmap_tlb_droppmap() from cpu_exit().
Tested by myself and ckuethe, as our machines choked on the original.
ok @art
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still support all different methods of getting states without e.g.
(highest/lowest state), and on i386 use the tables. The only change
should be the deletion of the mV from the printf at boot.
ok jsg@
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IPIs are handled without blocking interrupts. This solves the random lockups
people have been seeing with apmd -C, thanks to marco@ for showing me how
to reliably recreate this hang, and claudio@ for telling me it was also
affecting his Athlon64 machine so I stopped chasing bugs in est.
ok oga@, weingart@
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immediately when biglock wasn't held. But there is nothing inherently
wrong with doing copyin/copyout faults without holding biglock, so
just remove the check because it prevent us from doing copyin in
syscall before we grab the biglock.
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aperture, which will take your memory, bind it to agp, and return you the
aperture address. It's essentially the same as iommu on amd64 in the way it
works.
This will be used by the upcoming (works but is slow and will not be
enabled at first) drm memory management code for intel igp chipsets.
Right now the sync function for intagp is really slow (doing a wbinvd()
on every sync), this is in the process of getting fixed, but the size of
the diffs in my trees was getting silly.
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information in files.conf like it should be.
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Tested on multiple i386 and it works, amd64 works also with a few
exceptions that will get fixed.
The initial effort of importing was done by oga@, thanks!
Lots of testing and debugging by mlarkin@ and me.
Okay deraadt@, oga@, mlarkin@.
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