| Age | Commit message (Collapse) | Author |
|---|
|
theoretically the current solution of using the direct (and direct
uncached) maps is better for tlb pressure, two direct maps is dangerous,
especially when we support Page Attribute Tables (soon), since that will
cause illegal cache aliases. When that work is done a clever solution
may be worked out.
"reluctant ok, the uncached direct map is evil" art@
|
|
MD code would free resources that couldn't be freed until we were no
longer running in that processor. However, it's is unused on all
architectures since mikeb@'s tss changes on x86 earlier in the year.
ok miod@
|
|
|
|
made testers of art's affinity diff go insane)
ok krw@ miod@
|
|
- Split up run queues so that every cpu has one.
- Make setrunqueue choose the cpu where we want to make this process
runnable (this should be refined and less brutal in the future).
- When choosing the cpu where we want to run, make some kind of educated
guess where it will be best to run (very naive right now).
Other:
- Set operations for sets of cpus.
- load average calculations per cpu.
- sched_is_idle() -> curcpu_is_idle()
tested, debugged and prodded by many@
|
|
levels. This will allow for platforms where soft interrupt levels do not
map to real hardware interrupt levels to have soft ipl values overlapping
hard ipl values without breaking spl asserts.
|
|
11h (Turion) still needs testing, so isn't part of this commit.
ok reyk@, marco@
|
|
Firstly, don't keep identical data for each of the GARTs (we keep them
in sync, but there is one per cpu socket), all that varies is the
pci_tag_t, so just keep an array of those and have the rest of the
information once.
Secondly, don't keep the softc as a global, use the _cookie field of the
dmatag_t, that's what it's there for.
Finally, use dmamap_map to map the page tables, instead of the direct NC
map. This is because later changes to support PAT will be a lot easier
with one direct map (where we change the cacheability if needed), since
otherwise it's just asking for illegal cache aliases.
More changes will be upcoming.
Tested by a few people, with an without bigmem, thanks to those.
weingart@ liked the direction this is going, marco@ and kettenis@ oked it.
|
|
a define needed to get to ``private'' functions that needs to be defined
5 or more times isn't much use and may cause namespace issues anyway.
Other archs will probably follow.
Discussed in portugal. "Hell yes" weingart@, ok kettenis@, no
objections miod@
|
|
on amd64 as well.
ok dlg@
|
|
ok jsg@
|
|
try to be smart for the address range, uvm_pglistalloc() is smart enough
nowadays.
|
|
APM_IOC_{SUSPEND,STANDBY}_REQ: This is to fix an issue with apm suspend
where a call to zzz suspended the machine immediately, not giving anyone
listening for apm events (other than apmd) a chance to deal with the
upcoming change. This hit X hard since the introduction of drm, since it
needs to have time to idle the 3d engine and otherwise get the device
into a recoverable state. Such things are needed until we support
modesetting in the kernel.
Now, instead of forcing a suspend, using ioctl sends out an event similar
to if you had put the lid down, giving all userland applications a
chance to reply.
tested by sthen@ and beck@, especial thanks to sthen for sitting there
while I tried to debug this remotely, I owe him beer.
Prompted by and ok deraadt@
|
|
ok deraadt@
|
|
ok toby and tedu
|
|
hanging machines. backed out correctly this time, as pointed out by tedu.
|
|
code from mlarkin and me
help from art,toby,jordan and several others
ok jordan, go for it deraadt
|
|
"I like it" deraadt "sweet" tedu "love it" marco
|
|
|
|
if attempts are made to read it. So read MSR_TEMPERATURE_TARGET only
when ci_model == 0xe.
Found when my Core i7 box blew up. FreeBSD allows a few more chips
but this allows my box to boot.
ok jsg@
|
|
in seperate variables in struct cpu_info instead
of duplicating the process of extracting it from the signature.
Discussed with several, 'just do it' weingart@, ok mikeb@
|
|
Reported by and diff from Remco <remco at d-compu.dyndns.org>, thanks!
Checked with kettenis@.
ok kettenis
|
|
|
|
per mlarkin request.
Code from mlarkin, mptramp code from kurt
Lots of comments weingart, art & others
Tested in snaps for weeks
ok kurt, marco
|
|
ok deraadt@
|
|
Prodded by oga@ (a long time ago) and mikeb@
Also ok by kettenis@ and grange@
|
|
run(4) has been reported to work on sparc64 by Maxim Belooussov so I'm
pretty confident that it works on all arches.
|
|
|
|
ok miod@
|
|
and use it to implement BUS_DMA_NOCACHE for uncached mappings of dma
memory. Needed for some broken hardware.
Discussion with art, miod, kettenis and toby, ok miod.
|
|
In order to do that we have to remove all sleeping parts: sleeping
memory allocation and a sleeping lock. Thus we're moving this code
to the spinning lock (mutex) and getting rid of the GDT grow code.
Downside is that now we're pre-allocating 64kb of memory per CPU
from the start, but this might be optimized in future.
This also unifies GDT code and MAXGDTSIZ define across i386 and amd64.
With help from mickey.
ok toby, art
|
|
ok miod@ tedu@
|
|
ok miod@
|
|
mutex with ipl set to IPL_HIGH. While i'm here, unify the code with
i386, by giving the same lock to the i386 code.
This lock is mostly for MP, but could actually prevent a race where a
process is doing pci_conf_{read,write}, and then an interrupt fire and
also does pci_conf_{read,write}. Since this is a two stage process, the
interrupt could race with the one, causing the value to the written to
the wrong place, or the wrong value to be written.
Tested by many. "go ahead" kettenis@.
|
|
|
|
environment sensors. These are found at least on VIA Epia SN18000G
boards.
Not enabled at 0x162e and 0x164e because probing these may not be
safe according to kettenis (guess where my schsio is).
Much help from kettenis. Input from const and fgs.
ok kettenis
|
|
ok kettenis@
|
|
that worked around its presence
ok'ed by miod@
|
|
ok jmc@ stevesk@
|
|
ok kettenis@
|
|
BIOSes.
ok deraadt@ (for the amd64 bit, or the i386 bit, can't remember which)
|
|
Noticed by dlg on system that comes with url(4).
|
|
(if the stge(4) entry is commented, so is the ipgphy(4) entry then).
this allows ipgphy0 to attach to my stge0, which has a IC+ 1000A chip
discussed with and ok jsg@, ok dlg@
|
|
the driver supports legacy 802.11abg modes only (no 802.11n yet.)
WPA works, with hardware encryption/decryption.
committed over an RT2800U (RT2870+RT2820).
enabled on i386 and amd64 GENERIC only for now.
thanks to Paul Lin at Ralink for letting us ship the firmware under an
appropriate license.
"man page looks ok" jmc@
"you should commit it" jsg@, ok deraadt@
|
|
it won't get included in kernel crash dumps.
ok dlg@
|
|
|
|
map. The standard doesn't tell us to look there, Linux and NetBSD don't look
there either. It seems that some BIOSes use this memory as a scratch area
to build the final ACPI tables which means we can accidentally find what
seems like a valid RSDP there. Fixes PR 5847.
ok krw@, marco@
|
|
#ifdef __i386__ code that can go now things have been cleaned up.
|
|
Mostly KNF issues, some reorganisation of the code.
ok dlg@, deraadt@, krw@
|
|
ok kettenis
|
