Age | Commit message (Expand) | Author |
2017-08-20 | Add Cortex-A55 and Cortex-A75 part numbers. | Jonathan Gray |
2017-04-27 | Bring over the changes to mainbus(4) and simplebus(4) from arm64. | Mark Kettenis |
2017-04-24 | Add support for Cortex-A12. Even though ARM rebranded these as Cortex-A17 | Mark Kettenis |
2017-01-04 | unifdef CPU_XSCALE_PXA2X0, ARM_MMU_XSCALE, ARM_MMU_GENERIC (armv3) | Jonathan Gray |
2017-01-01 | recognise Cortex A32 | Jonathan Gray |
2016-08-25 | Enable the UWXN bit in the SCTRL register when available. This should | Mark Kettenis |
2016-08-24 | Replace pmap_fault_fixup() with an access flag fault handler on armv7. | Mark Kettenis |
2016-08-14 | Remove code for Intel 80219/80321 xscale processors used by armish. | Jonathan Gray |
2016-08-14 | Fix setting the SMP bit in the Auxiliary Control Register. The old code was | Mark Kettenis |
2016-08-06 | Put page tables in normal cachable memory on armv7. Check if the MMU walks | Mark Kettenis |
2016-07-31 | Recognise Cortex A35 and Cortex A73. | Jonathan Gray |
2016-07-31 | Instead of testing MIDR values for every model of Cortex processor check | Jonathan Gray |
2016-04-04 | Read cache line sizes from CP15 Cache Type Register. | Patrick Wildt |
2016-04-04 | Set the SMP/coherency bit in ACTLR on Cortex A models it is documented | Jonathan Gray |
2016-03-22 | Remove support for ARM11. This was the last unused and unmaintained | Patrick Wildt |
2016-03-22 | Remove support for ARM10. | Patrick Wildt |
2016-03-22 | Remove support for ARM9E. This is another step in the plan to remove | Patrick Wildt |
2016-03-22 | Remove defines for unsupported chips, add V5TEJ and remove incorrect | Jonathan Gray |
2016-03-19 | Remove support for the XScale 80200. We don't use it, it didn't compile | Patrick Wildt |
2016-03-19 | Remove support for IXP425. This is another architecture that is not | Patrick Wildt |
2016-03-19 | Remove support for StrongARM (SA1) and IXP12x0. Both are ARMv4 and | Patrick Wildt |
2016-03-18 | Remove support for ARM9T (armv4t). Not used by any of the arm platforms. | Jonathan Gray |
2016-03-18 | Remove support for ARM8, an old armv4 processor without thumb that was | Jonathan Gray |
2016-03-02 | fix the name of the define for the a72 mask | Jonathan Gray |
2016-01-31 | Switch from PSR_X_bit and X32_bit PSR macro names to just PSR_X. | Jonathan Gray |
2016-01-23 | In some cases machines with virtualisation extensions will boot into a | Jonathan Gray |
2015-05-29 | add some more cortex A ids | Jonathan Gray |
2015-01-17 | Add an ascii bit/field diagram for armv7-a psr to match the | Jonathan Gray |
2013-11-26 | 1 << 31 cleanup. Eitan Adler pointed out that there has been a | Theo de Raadt |
2013-08-06 | add Cortex A15 R4 | Jonathan Gray |
2013-04-28 | Improved dealing of ARMv7 faults. Added ARMv7 fault descriptions. | Patrick Wildt |
2013-01-18 | Update the ARM CPU ID information. The IDs aren't vendor/product | Patrick Wildt |
2011-09-20 | Late spring cleaning of the arm code for old dusty bits we do not want to | Miod Vallat |
2011-03-17 | - recognize OMAP3630/DM3730, as found in the beagleboard xM | Jasper Lievisse Adriaanse |
2010-02-03 | typo. CPU_ID_ARM1022EJS -> CPU_ID_ARM1026EJS | Kevin Lo |
2009-05-24 | Improve the ARMv7 support, still work in progress. | Dale Rahn |
2009-05-11 | Add some (not used yet) control regiser bit definitions. | Dale Rahn |
2009-05-08 | Pieces of arm11 and armv7 support for newer cpus. This is work in progress | Dale Rahn |
2008-09-11 | add support for arm9e core, taken from NetBSD. | Kevin Lo |
2006-05-29 | Add support for i80321 based systems. | Dale Rahn |
2004-12-30 | Add pxa270 id | Dale Rahn |
2004-02-01 | Arm port, NetBSD codebase stripped down, 32bit only support. | Dale Rahn |