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path: root/sys/arch/arm64/arm64
AgeCommit message (Expand)Author
2017-08-09fix format stringsJonathan Gray
2017-08-09remove duplicated PAGE macros and drop type suffixJonathan Gray
2017-08-08Arm64 compilers like many others anymore will use floating point registersDale Rahn
2017-08-06Fix TCR definitions to avoid integer overflow. Rename TCR_ASID_16 to TCR_ASMark Kettenis
2017-08-05Do not enable fpu until after AST state is checked and processed.Dale Rahn
2017-07-20Bring SIBUS/SIGSEGV reporting in line with amd64 and i386.Mark Kettenis
2017-06-29TEMPORARILY disable gap compilation, until lld is fixed/updated toTheo de Raadt
2017-06-04Remove comment that no longer is true. esym is not written by ourPatrick Wildt
2017-06-04Split early startup code out of locore.S into locore0.S. Adjust linkPatrick Wildt
2017-05-30Kill db_sym_t.Martin Pieuchot
2017-05-27Use EFI memory map to discover available physical memory.Mark Kettenis
2017-05-21Give the vp pool its own allocator. Avoiding the logic that creates largeMark Kettenis
2017-05-18AAPCS64 requires 16 byte stack alignment. Set the bits in the systemJonathan Gray
2017-05-10Remove pmep_pa_is_mem(). Instead create write-back cachable mappings byMark Kettenis
2017-05-06Print full MIDR for CPUs that can't be identified.Mark Kettenis
2017-05-06Now that we have a table of Cavium part numbers add the part number forJonathan Gray
2017-05-05Add the missing cache flush operations for non-coherent mappings.Mark Kettenis
2017-05-04Recognize various Cavium ThunderX cores.Mark Kettenis
2017-05-03Bring boot() in line with our other architectures.Mark Kettenis
2017-05-02Zap silly diagnostic reboot message.Mark Kettenis
2017-05-02The pmap_vp_enter() function should only ever be called for userland mappingsMark Kettenis
2017-04-30Rename Debugger() into db_enter().Martin Pieuchot
2017-04-29Move the userret() call out of data_abort() and simply call it just before weMark Kettenis
2017-04-29Call refreshcreds() in ast() since we may get there without going throughMark Kettenis
2017-04-29store cpu model information in the buffer used by the hw.model sysctlJonathan Gray
2017-04-27Add code to identify the CPUs on arm64 systems. The primary CPU is attachedMark Kettenis
2017-04-24Stop dumping registers on "normal" segmentation faults. Do print the contentsMark Kettenis
2017-04-15The tlb flushes in pmap_set_{l1,l2,l3} use ranges that don't fully make sense.Mark Kettenis
2017-04-13Use the non-interrupt-safe pool allocator for the vp pool to avoid runninngMark Kettenis
2017-04-11Revise 'struct fpreg' and dump floating-point register in core dumps. AlsoMark Kettenis
2017-04-04Cleanup the code further. Get rid of the remaining C++-style comments,Mark Kettenis
2017-04-02On ARMv8, the translation table walk is fully coherent so there is noMark Kettenis
2017-03-28Add an instruction synchronisation barrier instruction after changingJonathan Gray
2017-03-28Previous W^X diff only changed the access permissions in the bootstrap pageMark Kettenis
2017-03-24Simplify ASID allocation code considerably by allocating an ASID up frontMark Kettenis
2017-03-22Implement kernel W^X for arm64. For this purpose align the different segmentsMark Kettenis
2017-03-21Revise the definition of "struct reg" to have a layout compatible with otherMark Kettenis
2017-03-16Remove some unused variables, unused types, duplicated/unused functionMark Kettenis
2017-03-13When we do an ASID rollover, we unassign all ASIDs and do a completeMark Kettenis
2017-03-13Don't limit physmem to 2GB confirmed to work with 16GB by deraadt@.Jonathan Gray
2017-03-12Add a "dsm ishst" barrier before TLB maintenance instructions. The ARMv8Mark Kettenis
2017-03-12Bring SROP mitigation to arm64. Make some small modifications to the armMark Kettenis
2017-03-12Simplify pmap_proc_iflush(); there is no need for the per-page logic if weMark Kettenis
2017-03-09Change the interrupt routing API to take a pointer to a "struct cpu_info"Mark Kettenis
2017-03-08Establish API to route interrupts to specific CPU cores.Patrick Wildt
2017-02-28Switch geteblks()'s size argument from int to size_t. It's called withMartin Natano
2017-02-25MSI interrupts are established in a different way as well. Instead ofPatrick Wildt
2017-02-24Retire the global interrupt establish and disestablish API. It has beenPatrick Wildt
2017-02-24Implement an API for establishing legacy PCI interrupts. This specificPatrick Wildt
2017-02-22The AMD Seattle SoC incorporates DMA coherent controllers, especiallyPatrick Wildt
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