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and install systems where the firmware uses a non-standard speed. This is
important for various boards that use a Rockchip SoC where the vendor thinks
using 1500000 bps as the serial console speed is a good idea (it isn't).
ok deraadt@, visa@, patrick@
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OK guenther@
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OK guenther@
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workaround for branch target injection attacks (CVE 2017-5715).
ok patrick@, jsg@
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operations. This resolves one of the failures frequently seen
on QEMU where spawning processes while another process is working
can lead to crashes.
Committing on behalf of drahn@
ok kettenis@ jsg@
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applications will crash without this lock as other threads attempt
to walk the tree while another thread is adding/removing mappings.
Committing on behalf of drahn@
ok kettenis@
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syscall) confirm the stack register points at MAP_STACK memory, otherwise
SIGSEGV is delivered. sigaltstack() and pthread_attr_setstack() are modified
to create a MAP_STACK sub-region which satisfies alignment requirements.
Observe that MAP_STACK can only be set/cleared by mmap(), which zeroes the
contents of the region -- there is no mprotect() equivalent operation, so
there is no MAP_STACK-adding gadget.
This opportunistic software-emulation of a stack protection bit makes
stack-pivot operations during ROPchain fragile (kind of like removing a
tool from the toolbox).
original discussion with tedu, uvm work by stefan, testing by mortimer
ok kettenis
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PROC_STACK() in the upcoming stack pointer checking diff and probably fixes
bugs where ptrace(2) and core dumps would report the wrong register state.
ok deraadt@
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of address celss in the child unit specifier should be fetched from the
interrupt controller node. Fix this as the current code doesn't work on
the MACCHIATObin for example.
ok patrick@
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ok kettenis@
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ok kettenis@
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Extend the logic already present for panic() to any DDB-related
operation such that if ddb(4) is entered because of a fault or
other trap it is still possible to call 'boot reboot'.
While here stop printing splassert() messages as well, to not fill
the buffer.
ok visa@, deraadt@
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From Arrtturi Alm.
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ok patrick@
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like we already do in the code that flushes the BTB.
ok jsg@
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The account flag `ASU' will no longer be set but that makes suser()
mpsafe since it no longer mess with a per-process field.
No objection from millert@, ok tedu@, bluhm@
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ok millert@
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boot interface to the "netboot" group. efiboot grabs the MAC address
from the PXE environment, passes it to the kernel, where it is matched
against the list of ethernet interfaces and the boot device is set.
Concept and most of the code cribbed from amd64.
ok kettenis@
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ok patrick@
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pmap_copy_page().
ok patrick@
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the secondary CPUs receive clock interrupts. Based on diffs from drahn@.
ok patrick@
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ok patrick@
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from dran@.
ok patrick@
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ok patrick@
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definitive list of block devices supported on an architecture.
ok kettenis@ deraadt@
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ok patrick@
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secondary CPUs. This involves adjusting get_virt_delta() to account for the
fact that it may no longer live near the start of kernel code. Heavily based
on a diff from drahn@.
ok patrick@, deraadt@
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fixed.
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attacks by flushing the branch predictor cache (BTB) on context switches
and page faults in kkernel address space. Note that this relies on the
presence of firmware (such as Arm Trusted Firmware) that provides PSCI
services that flush the BTB on entry as described in Arm Trusted Firmware
Security Advisory TFV 6.
ok patrick@, visa@
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guaranteed to be available after pmap_map_early() returns. Fixes a hang
seen with the in-progress SMP work.
ok patrick@
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option MULTIPROCESSOR on a single CPU.
ok patrick@
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Skip these mappings during the remap-pahse as they are likely to be in
a different 512G bloch as memory and SetVirtualAddressMap() shouldn't need
them. But do assign a new virtual address and let efi(4) create a mapping.
Add a PMAP_DEVICE flag such that pmap_enter() can continue to be used
to create these mappings.
ok patrick@
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OK mpi@
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is running. This provides protection against meltown on cores that are
vilnerable (just Cortex-A75 so far) but also seems to be an essential to
protect against spectre-like attacks against the kernel.
This implementation only exposes a single treampoline page that does not
contain any kernel virtual addresses and also hides the real virtual address
of the exception vectors, which helps on cores vulnerable to "variant 3a"
(Cortex-A57, Cortex-A72). The implementation is inspired by the work done
by Will Deacon for Linux, but there are no knobs to turn it off. The
overhead is fairly limited: around 3-4% slowdown on Cortex-A57.
ok patrick@, deraadt@
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a time-of-day clock device based on the GetTime() and SetTime() services.
The virtual memory mappings for the runtime services calls are implemented
through a separate pmap that is only activated when we make a runtime services
call.
ok tom@, visa@
tested by naddy@
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Add an interface to establish additional VA=PA 1G block mappings for use by
upcoming EFI runtime services support.
ok guenther@
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ok millert@ krw@
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ok guenther@
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to SMC64 functions don't get truncated. Implement support for the CPU_ON
call.
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at address zero. Spotted by Artturi Alm.
ok patrick@
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sections doesn't work when the -r option is used. Disable the unmapping
code again until lld gets fixed.
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disabled while lld was growing up, but forgotten about when gap.o was
added back.
ok deraadt@
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implement hw.cpuspeed using the clock framework.
ok patrick@
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ok jsg@
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