Age | Commit message (Collapse) | Author |
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ok patrick@, jsg@
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differences between the i386 and amd64 versions of the code and
switch to using the standard C integer exact width integer types.
ok deraadt@
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ok deraadt@, jsg@
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enough memory for the device table to cover the entire DeviceID space.
ok patrick@
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of the ICC_PMR_EL1 registers varies with the value being written. Change the
value we write to probe the number of writable bits to a value that yields
the desired result.
Suggested by drahn@
ok patrick@
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defined in device trees that link together thermal sensors and cooling
devices to actively or passively cool devices when certain trip points
are reached.
ok mlarkin@ patrick@
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an earlier diff from sf@.
ok jmatthew@, also ok mlarkin@, sf@ for a slightly different earlier version
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ok patrick@
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tables if no address has been assigned yet to prevent a panic in
pci_intr_establish(9) later.
ok patrick@
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Makes MSI/MSI-X actually work reliably on machines with agintc(4).
ok patrick@
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implements mapping of MSI and MSI-X interrupts with new generic functions.
Fixes a use-after-free in sone PCI device drivers that call pci_intr_string(9)
after pci_intr_establish(9).
ok deraadt@
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ok patrick@
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a new pci_machdep.c file such that it can be re-used by other arm64
PCI host bridge drivers in the future.
ok patrick@
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prefetchable and "normal" mmio at the host bridge level we can simply pass
the same extent.
ok patrick@
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ok patrick@
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'looks good' kettenis@
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configuration done by TF-A between boards we have to shift the priorities
that we use for both the architected ICC_PMR_EL1 register and the
memory mapped priority registers on the GIC in different ways. Make this
explicit in the code and try to handle all the cases we care about.
This includes QEMU and RK3399 boards that still use the TF-A version
provided by Rockchip.
Seems to make the rockpro64 run stable with a GENERIC kernel.
ok drahn@, patrick@
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ok phessler, deraadt
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just like we do for simplebus(4).
ok patrick@, visa@
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ok patrick@, dlg@, visa@
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those instead of the size of the parent address cells.
ok kettenis@
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NB: acpi(4) is not hooked up to this yet.
previous version OK deraadt@ patrick@
OK jsg@
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this was avoided previously because during the early stages of the
port, there were mostly unsupported devices. the situation is a bit
better now, so make the missing drivers more obvious so people can
get interested.
ok kettenis@
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with the lowest IPL. Once we actually run the IRQ handler
we raise to the highest IPL. Fixes a crash seen when having
a network card in the PCIe slot of the MacchiatoBin.
ok ccardenas@
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ok patrick@
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for now as amd64/i386 firmware still caters for legacy OSes that only
support a single PCI segment.
ok patrick@
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Inspired by an earlier diff from drahn@
ok patrick@, jsg@
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It treats all access to the memory mapped registers as "secure" even if
we're running in non-secure mode. As a result, during bringup of OpenBSD
on the RK3399, I got confused and tweaked the interrupt priorities in a way
that is wrong (but worked on the RK3399.
Fix those priorities to match what they should be according to the
documentation (and works on other hardware that includes a GICv3) and
add code that detects the broken RK3399 GIC and adjusts the priorities
accordingly. Also remove (broken) code that tries to mess around with
group 0 interrupts and fix setting bits in the GICD_CTLR register on the
broken RK3399 GIC.
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and those that are indexed by the assigned CPU (unit) number. Fix the
shuffling of the affinity fields are shuffled around to match the spec.
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- Don't dereference sc_prop if we're not handling an LPI. Fixes a crash
on qemu when emulating a GICv3 without ITS (and therefore no LPIs(.
- Use the true IPL when calculating the priority of an LPI. The old
code used a variable that still had the IPL_MPSAFE flag in it.
- Write to the right GITS_BASERn instead of ialways writing to GITS_BASER0.
- Flush the cache after initializing/modifying the in-memory tables. The
GICv3 on the SynQuacer isn't fully coherent and only supports the
"non-shareable" attribute for its in-memory tables. So we have to flush
the cache to the point of coherency to guarentee that the GIC sees our
changes to those tables. Throw in a full memory barrier for good measure.
Also add support for the SynQuacer pre-ITS.
ok jsg@, patrick@
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Fixes machines with more than 8 cores.
ok jsg@, patrick@
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type 0 configuration requests correctly which results in devices on bus 0
appearing multiple times. Fix this by adding a quirk and match the
appropriate compatible string.
ok jsg@, patrick@
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ok patrick@
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up to 24.
ok patrick@
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rkpcie(4).
ok patrick@
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MSI support can selectively disable the use of MSI.
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ok patrick@
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bridges based on information provided by ACPI.
ok mlarkin@
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the od1000 that I built myself seems to use the FPU when setting the RTC,
and the UEFI standard allows this.
ok drahn@
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(physical) address such that acpidump(8) can read it and dump the tables
on arm64 systems.
ok deraadt@
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ok jsg@
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ok jsg@
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ok patrick@
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ok patrick@
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ok visa@, patrick@
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