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path: root/sys/arch/arm64/include
AgeCommit message (Expand)Author
2022-02-24Fix PIC_SYM() macro: it never needs to token paste, so it's notPhilip Guenther
2022-02-23unifdef __ELF__Jonathan Gray
2022-02-04Define __HAVE_PMAP_MPSAFE_ENTER_COW; the ARMv8 architecture requiresMark Kettenis
2022-01-02slignment -> alignmentJonathan Gray
2022-01-01Rewrite the kernel FPU handling code. The new code saves the FPU stateMark Kettenis
2021-11-22Hack alert! Apple M1 systems still don't work with an MP kernel.Mark Kettenis
2021-09-02Fix the TCR_TG0_xxx definitions and add TCR_TG0_4K to the initial settingMark Kettenis
2021-08-30Remove typedef of db_addr_t; mpi converted the users of it to vaddr_t alreadyJasper Lievisse Adriaanse
2021-07-06Introduce CPU_IS_RUNNING() and us it in scheduler-related code to preventMark Kettenis
2021-06-11Store the device tree node in the pcitag_t like we do on powerpc64 andiMark Kettenis
2021-06-02kernel: introduce per-CPU panic(9) message bufferscheloha
2021-05-17Rename some MD structs by giving them an architecture-neutral name inMark Kettenis
2021-05-16ansiJonathan Gray
2021-05-15Use intr_enable()/int_disable()/intr_restore() instead ofMark Kettenis
2021-05-01Remove NetBSDisms that crept into the arm64 version of this file.Mark Kettenis
2021-03-27Make sure that all CPUs end up with the same bits set in SCTLR_EL1.Mark Kettenis
2021-03-27Add ARMv8.5 instruction set related CPU features.Mark Kettenis
2021-03-22Load MSI pages through bus_dma(9). Our interrupt controllers for MSIsPatrick Wildt
2021-03-11spellingJonathan Gray
2021-03-08Revise the ASID allocation sheme to avoid a hang when running out of freeMark Kettenis
2021-02-28Add memory attributes for stage-2 pagetables.Patrick Wildt
2021-02-25Add some infrastructure in the PCI chipset tag for pci_probe_device_hook()Patrick Wildt
2021-02-23remove some unused includesJonathan Gray
2021-02-21One CPUs that implement the VHE extension and have the E2H bit set, keepMark Kettenis
2021-02-17Add support for FIQs. We need these to support agtimer(4) on Apple M1 SoCsMark Kettenis
2021-02-16Introduce BUS_SPACE_MAP_POSTED such that we can distinguish betweenMark Kettenis
2021-02-15While it should be possible to use "normal uncachable" mappings forMark Kettenis
2020-10-21last argument to pmap_fault_fixup() is unused, delete itTheo de Raadt
2020-10-18Add code to print CPU features.Mark Kettenis
2020-08-17Enable PAN (Privileged Access Never) on CPUs that support it. This meansMark Kettenis
2020-08-14Remove "for all XXX platforms" from comment. Fixes the issue pointed outMark Kettenis
2020-07-17Re-work intr_barrier(9) on arm64 to remove layer violation. So far wePatrick Wildt
2020-07-16Store struct cpu_info * in arm64's interrupt wrap. intr_barrier() canPatrick Wildt
2020-07-16To be able to have intr_barrier() on arm64, we need to be able toPatrick Wildt
2020-07-15Userland timecounter implementation for arm64.Mark Kettenis
2020-07-14Implement pci_intr_establish_cpu() on arm64 and armv7. The function pointerPatrick Wildt
2020-07-14Extend the interrupt API on arm64 and armv7 to be able to pass aroundPatrick Wildt
2020-07-06Add support for timeconting in userland.Paul Irofti
2020-06-30Remove obsolete <machine/stdarg.h> header. Nowadays the varargVisa Hankala
2020-06-05Implement cpu_rnd_messybits() as a read of the virtual counter xoredChristian Weisgerber
2020-06-05Allow userland access to the virtual counter.Mark Kettenis
2020-05-31introduce "cpu_rnd_messybits" for use instead of nanotime in dev/rnd.c.David Gwynne
2020-05-17Fix typo in comment.Mark Kettenis
2020-05-17Add machdep.compatible.Mark Kettenis
2020-04-13Fix some of the more esoteric bus_space functions. TheMark Kettenis
2020-02-20controler -> controllerJonathan Gray
2019-11-07Convert db_addr_t -> vaddr_t but leave the typedef for now.Martin Pieuchot
2019-10-17Cache flush operations on arm64 were being incorrectly treated as writeDale Rahn
2019-09-01Newer ARMv8 processors now include a new CSV2 field in their processorMark Kettenis
2019-08-04Fix a typo I noticed reviewing the smbios code cleanup diff.kmos
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