Age | Commit message (Collapse) | Author |
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ok jsg@
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bus_space_read_region_n, bus_space_write_region_n and
bus_space_set_region_n functions were all broken.
Fixes mvneta(4) on arm64.
ok patrick@
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operations, however they should be treated as read per the design.
Switch to using bit defines, correct said defines.
Fixes cache flushing causing Firefox to abort.
ok kettenis@ kurt@
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feature register that can indicate that a processor is not vulnarable to
Spectre v2 attacks. Use this field in favour of adding specific processors
to a whitelist. Continue to whitelist the few processors that are known
not to be vulnerable but don't set the appropriate value in the CSV2 field.
ok jsg@
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(stirng -> string)
ok kettenis@ who pointed out I should fix the new arm64 smbiosvar.h too
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differences between the i386 and amd64 versions of the code and
switch to using the standard C integer exact width integer types.
ok deraadt@
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ok deraadt@, jsg@
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clamping the maximum DVFS state.
ok mlarkin@, patrick@
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an earlier diff from sf@.
ok jmatthew@, also ok mlarkin@, sf@ for a slightly different earlier version
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ok kettenis@
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ok kettenis@
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ok kettenis@
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implements mapping of MSI and MSI-X interrupts with new generic functions.
Fixes a use-after-free in sone PCI device drivers that call pci_intr_string(9)
after pci_intr_establish(9).
ok deraadt@
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we need KVA to keep track of all the RAM pages, machines with a lot
of memory easily exhaust our KVA space. We need about 1G of KVA
per 32G of memory, so with 16G of KVA we can maintain close to 512G
of memory.
ok kettenis@
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a new pci_machdep.c file such that it can be re-used by other arm64
PCI host bridge drivers in the future.
ok patrick@
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commit to unbreak the build.
from kettenis@
ok drahn@
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ok patrick@
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details from the ELF header instead of faking it.
Proposal from mlarkin, tested on most architectures already
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in libm since the rounding mode is in fpcr, not fpsr. Since both FPU
registers are 32-bit we can store them in the 64-bit fenv_t to make
handling the bits easier.
While there add FE_DENORMAL, which also exists on x86. Also make sure
that whenever we are being passed an exception mask, we only allow the
bits that are supported by hardware.
Found by regression tests
Debugged with Moritz Buhl
ok kettenis@
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so that pmap.h can be included as part of the mmap_hint regression test.
From Moritz Buhl
ok bluhm@
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NB: acpi(4) is not hooked up to this yet.
previous version OK deraadt@ patrick@
OK jsg@
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including cpu.h machine/intr.h etc without first including param.h when
MULTIPROCESSOR is defined.
ok visa@
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byteswapping code.
ok guenther@ kettenis@
This fixes a corner case triggered by the comms/hylafax port where
htons() can't be compiled in C++ code:
"Don't know how to handle indirect register inputs yet for constraint 'r'"
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4MB which is far too low especially when the platform is able to run MP.
New limits are, amd64 = 256M; arm64, mips64, sparc64 = 64M; alpha, arm,
hppa, i386, powerpc = 32M; m88k, sh = 8M
Still rather conservative numbers but much better than before. At least
some hangs of arm64 build boxes was caused by this.
OK kettenis@, visa@
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ok patrick@, jsg@
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May help ports builders to not run out of memory.
Lots of agreement and OK n2k18@
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ok kettenis@
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through the CLIDR_EL1 register.
ok patrick@
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ok patrick@
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OK deraadt@ mpi@
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for now as amd64/i386 firmware still caters for legacy OSes that only
support a single PCI segment.
ok patrick@
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cases in kernel and libc.
ok deraadt@
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ok jsg@
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so that we can include firmware-dependant code in generic drivers to be
able to extract metadata information like MAC addresses and out-of-band
interrupts from the ACPI/FDT tables.
ok kettenis@
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Discussed with kettenis@
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arm_intr_* prefix with fdt_intr_*.
ok kettenis@
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Disable userland debug communication access while there.
ok patrick@
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ok patrick@
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bridges based on information provided by ACPI.
ok mlarkin@
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Single step is not yet supported but reading and setting registers are
working as expected, breakpoints also are working.
ok kettenis@
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ok drahn@
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ok krw@, millert@, drahn@
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ok patrick@, drahn@
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ok drahn@
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ok drahn@
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