| Age | Commit message (Expand) | Author |
|---|
| 2017-04-27 | Use (32-bit) word-sized access in the a4x bus space routine even if only | Mark Kettenis |
| 2017-04-27 | Add code to identify the CPUs on arm64 systems. The primary CPU is attached | Mark Kettenis |
| 2017-04-24 | Stop dumping registers on "normal" segmentation faults. Do print the contents | Mark Kettenis |
| 2017-04-20 | Hook up mutex(9) to witness(4). | Visa Hankala |
| 2017-04-16 | Define EXT_IMPLICIT_NBIT like we do on sparc64 and mips64. Makes vaious | Mark Kettenis |
| 2017-04-15 | The tlb flushes in pmap_set_{l1,l2,l3} use ranges that don't fully make sense. | Mark Kettenis |
| 2017-04-13 | A little bit more trivial cleanup. | Mark Kettenis |
| 2017-04-13 | Use the non-interrupt-safe pool allocator for the vp pool to avoid runninng | Mark Kettenis |
| 2017-04-13 | Provide mips64 with kernel-facing TCB_{GET,SET} macros that store it | Philip Guenther |
| 2017-04-11 | Recognize break conditions and enter ddb if ddb.console is set. | Mark Kettenis |
| 2017-04-11 | Revise 'struct fpreg' and dump floating-point register in core dumps. Also | Mark Kettenis |
| 2017-04-08 | For legacy interrupt use the tag of the topmost bridge to establish the | Mark Kettenis |
| 2017-04-08 | Bring over the changes I made to the armv7 version of this driver such that | Mark Kettenis |
| 2017-04-04 | Cleanup the code further. Get rid of the remaining C++-style comments, | Mark Kettenis |
| 2017-04-02 | On ARMv8, the translation table walk is fully coherent so there is no | Mark Kettenis |
| 2017-03-28 | Add an instruction synchronisation barrier instruction after changing | Jonathan Gray |
| 2017-03-28 | Previous W^X diff only changed the access permissions in the bootstrap page | Mark Kettenis |
| 2017-03-26 | Switch arm64 generic timer to use virtual timer instead of physical | Dale Rahn |
| 2017-03-24 | Simplify ASID allocation code considerably by allocating an ASID up front | Mark Kettenis |
| 2017-03-22 | Implement kernel W^X for arm64. For this purpose align the different segments | Mark Kettenis |
| 2017-03-21 | Revise the definition of "struct reg" to have a layout compatible with other | Mark Kettenis |
| 2017-03-16 | Remove some unused variables, unused types, duplicated/unused function | Mark Kettenis |
| 2017-03-15 | Fix building profiling kernels by passing the -p flag to config(8) | Theo Buehler |
| 2017-03-13 | When we do an ASID rollover, we unassign all ASIDs and do a complete | Mark Kettenis |
| 2017-03-13 | Don't limit physmem to 2GB confirmed to work with 16GB by deraadt@. | Jonathan Gray |
| 2017-03-12 | Add a "dsm ishst" barrier before TLB maintenance instructions. The ARMv8 | Mark Kettenis |
| 2017-03-12 | Bring SROP mitigation to arm64. Make some small modifications to the arm | Mark Kettenis |
| 2017-03-12 | Remove some unused cruft. | Mark Kettenis |
| 2017-03-12 | Simplify pmap_proc_iflush(); there is no need for the per-page logic if we | Mark Kettenis |
| 2017-03-11 | Set EVT_NOTIFY_SIGNAL when calling boot services CreateEvent(). | Jonathan Gray |
| 2017-03-10 | enable amphy(4) for udav(4) and urlphy(4) for url(4) | Jonathan Gray |
| 2017-03-09 | Change the interrupt routing API to take a pointer to a "struct cpu_info" | Mark Kettenis |
| 2017-03-08 | Enable msk(4). | Patrick Wildt |
| 2017-03-08 | Enable eephy(4). | Patrick Wildt |
| 2017-03-08 | Enable re(4). | Patrick Wildt |
| 2017-03-08 | Enable ix(4). Requested by deraadt@ | Jonathan Gray |
| 2017-03-08 | Enable em(4), ahci(4), nvme(4) and USB controllers attached to pci(4). | Patrick Wildt |
| 2017-03-08 | Establish API to route interrupts to specific CPU cores. | Patrick Wildt |
| 2017-03-07 | enable vioscsi(4) | Jonathan Gray |
| 2017-03-03 | enable FFS2 on armv7 and arm64 ramdisks | Jonathan Gray |
| 2017-03-01 | Remove SYSCALL_DEBUG arm64 has been multiuser for a while now. | Jonathan Gray |
| 2017-02-28 | Switch geteblks()'s size argument from int to size_t. It's called with | Martin Natano |
| 2017-02-28 | build with USER_PCICONF to enable /dev/pci* | Jonathan Gray |
| 2017-02-25 | Enable ampintcmsi(4), pciecam(4), ppb(4) and virtio(4). | Patrick Wildt |
| 2017-02-25 | Implement ampintcmsi(4) in ampintc(4) to support MSI. The GICv2M is an | Patrick Wildt |
| 2017-02-25 | MSI interrupts are established in a different way as well. Instead of | Patrick Wildt |
| 2017-02-25 | Implement support for interrupt types. The GIC only seems to support | Patrick Wildt |
| 2017-02-24 | Retire the global interrupt establish and disestablish API. It has been | Patrick Wildt |
| 2017-02-24 | Implement an API for establishing legacy PCI interrupts. This specific | Patrick Wildt |
| 2017-02-24 | Hook up pciecam(4), but don't compile it yet. | Patrick Wildt |
