| Age | Commit message (Expand) | Author |
|---|
| 2024-07-10 | Hook up the Qualcomm UEFI Secure Application that handles EFI variables to | Mark Kettenis |
| 2024-07-10 | Missed some files in previous commit to split vmd into mi/md. | Dave Voutila |
| 2024-07-07 | Add device tree mapping for Lenovo Yoga Slim 7x. | Patrick Wildt |
| 2024-07-06 | remove ampintc_intr_string(), unused on arm64 | Jonathan Gray |
| 2024-07-05 | When trying to enable multiple MSI vectors, check the flag first whether | Patrick Wildt |
| 2024-07-03 | Right now MSIs don't work on the Qualcomm Snapdragon X Elite (X1E80100). | Patrick Wildt |
| 2024-07-03 | Add device tree mapping for Asus Vivobook S15. | Mark Kettenis |
| 2024-07-03 | Map BUS_SPACE_MAP_PREFETCHABLE to Normal-NC. There are other memory | Mark Kettenis |
| 2024-07-03 | Switch to a table for mapping smbios vendor/product to device tree file | Mark Kettenis |
| 2024-07-02 | Fix unintended comparison between signed and unsigned integer. | Mark Kettenis |
| 2024-07-02 | Give the Qualcomm Snapdragon X Elite (X1E80100) the same treatment as its | Patrick Wildt |
| 2024-07-02 | The traditional LL/SC atomics perform poorly on modern arm64 systems with | Mark Kettenis |
| 2024-06-30 | we don't need the NOBYFOUR space-savings option anymore, that codepath | Theo de Raadt |
| 2024-06-23 | If an ioctl(2) request isn't implemented we should return ENOTTY. | Mark Kettenis |
| 2024-06-23 | While Qualcomm Snapdragon X Elite (X1E80100) claims to support 32 device-id | Patrick Wildt |
| 2024-06-23 | Add support for ACPI firmware that provides the base address of individual | Mark Kettenis |
| 2024-06-23 | Enable EPAN if it is available. | Mark Kettenis |
| 2024-06-21 | recognise Qualcomm Oryon; ok kettenis@ | Jonathan Gray |
| 2024-06-20 | Instead of allocating an arbitrary amount of extra space, let the EFI | Mark Kettenis |
| 2024-06-19 | The GICv3 redistributor spacing on the X1E80100 (Snapdragon X Elite) | Patrick Wildt |
| 2024-06-19 | The X1E80100 (Snapdragon X Elite) joins the group of chips that require | Patrick Wildt |
| 2024-06-17 | KNF | Mark Kettenis |
| 2024-06-14 | When loading a device tree using the "mach dtb" command, give firmware | Mark Kettenis |
| 2024-06-12 | remove BMAJ and CMAJ defines only used by arm64; ok deraadt@ | Jonathan Gray |
| 2024-06-11 | Clamp CPU clock frequencies to [min, max] range when determining the | Mark Kettenis |
| 2024-06-11 | remove drm prototypes duplicating those in sys/conf.h | Jonathan Gray |
| 2024-05-30 | arm64: move cpu_suspended out of #ifdef SUSPEND | Theo Buehler |
| 2024-05-29 | recognise Cortex-X925 (Blackhawk), Cortex-A725 (Chaberton) | Jonathan Gray |
| 2024-05-28 | Rework the pmap ASID handling to not require the SCHED_LOCK | Claudio Jeker |
| 2024-05-28 | Garbage collect sleep_abort(); it doesn't do anything useful anymore. | Mark Kettenis |
| 2024-05-27 | Decode remaining ID_AA64ISAR1_EL1 features. | Mark Kettenis |
| 2024-05-26 | Implement wakeup interrupts on amd64. Provide a dummy implementation for | Mark Kettenis |
| 2024-05-22 | remove prototypes with no matching function and externs with no var | Jonathan Gray |
| 2024-05-13 | remove prototypes with no matching function | Jonathan Gray |
| 2024-05-07 | drop the MD byte-swap micro-optimizations on clang architectures | Christian Weisgerber |
| 2024-05-01 | Add per-CPU caches to the pmemrange allocator. | Martin Pieuchot |
| 2024-04-29 | remove prototypes for removed functions | Jonathan Gray |
| 2024-04-19 | Revert per-CPU caches a double-free has been found by naddy@. | Martin Pieuchot |
| 2024-04-17 | Add per-CPU caches to the pmemrange allocator. | Martin Pieuchot |
| 2024-04-13 | Split out Spectre-V2 and Spectre-BHB mitigation code like I did for | Mark Kettenis |
| 2024-03-27 | Initialize pmap_tramp.pm_mtx before use. | Kurt Miller |
| 2024-03-25 | Add rpigpio(4), a driver for the RP1 GPIO controller on the Raspberry Pi 5. | Patrick Wildt |
| 2024-03-24 | Enable cad(4). | Patrick Wildt |
| 2024-03-18 | Implement Spectre-V4 mitigations. The only real effect of this change is | Mark Kettenis |
| 2024-03-18 | Add support for the new layout of the CCSIDR_EL1 register that was | Mark Kettenis |
| 2024-03-17 | The feature is called SSBS instead of SBSS. | Mark Kettenis |
| 2024-03-16 | Set the HCR_API and HCR_APK bits in the HCR_EL2 when CPUs boot in EL2. | Mark Kettenis |
| 2024-03-16 | recognise Cortex-A520AE (Hayes AE), Cortex-A720AE (Hunter AE) | Jonathan Gray |
| 2024-03-15 | According to errata AC03_CPU_12, AmpereOne needs the loopy branches with a | Mark Kettenis |
| 2024-03-13 | Expose BTI support to userland. | Mark Kettenis |
