summaryrefslogtreecommitdiff
path: root/sys/arch/arm
AgeCommit message (Expand)Author
2016-08-19Start using to XN flag to enforce that mappings without PROT_EXEC areMark Kettenis
2016-08-19Mark device memory as execute-never to prevent a speculative instruction fetchMark Kettenis
2016-08-19Adjust the definitions of L1_S_COHERENT_v7, L2_L_COHERENT_v7 andMark Kettenis
2016-08-19Use Access Flag to do page reference emulation.Mark Kettenis
2016-08-18Separate out the Access Flag bit from the Access Permission bits in theMark Kettenis
2016-08-16remove #define for /dev/mem minors. let the raw magic of the hardcodedTed Unangst
2016-08-16replace hand rolled tsleep physlock with rwlock. ok mlarkinTed Unangst
2016-08-16Fix typo/inconsistensy where L1_S_DOMAIN was used instead of L1_C_DOMAIN.Mark Kettenis
2016-08-15normalize some commentsTed Unangst
2016-08-15Don't take shortcuts cleaning/invalidating the caches. The Cortex-A7 and mostMark Kettenis
2016-08-14Remove code for Intel 80219/80321 xscale processors used by armish.Jonathan Gray
2016-08-14Fix setting the SMP bit in the Auxiliary Control Register. The old code wasMark Kettenis
2016-08-14Allow a bus_dmamap_sync() of length zero.Mark Kettenis
2016-08-11The ARMv7 ARM says that the TLB may hold translation table entries at anyMark Kettenis
2016-08-10Add defines for the Access Flag as found on armv7. Fix definition of theMark Kettenis
2016-08-10Shuffle armv7 access permission bits around to something that is compatibleMark Kettenis
2016-08-10Dynamically attach agtimer(4). Since agtimer(4) also provides the delay()Mark Kettenis
2016-08-10On armv7 we put the vector page up high and never have to bother switching it.Mark Kettenis
2016-08-09The page tables are cached now, and given the significant speedup, IMark Kettenis
2016-08-08Move the cpu_setup() call to the end of initarm(). On Cortex-A53 processorsMark Kettenis
2016-08-08Mapping non-cachable memory as cachable and subsequently changing the mappingMark Kettenis
2016-08-08ARMv7 data caches are "effectively" PIPT. This means there is in generalMark Kettenis
2016-08-07Add XOR cookies for lr and sp. Stop saving/restoring r12 to/from the jmpbuf.Philip Guenther
2016-08-06Always allocate intrhand with M_WAITOK.Patrick Wildt
2016-08-06Extend the interrupt controller API with a disestablish functionality.Patrick Wildt
2016-08-06Build ofw_pinctrl.o and ofw_gpio.o on armv7. The latters here from theMark Kettenis
2016-08-06Put page tables in normal cachable memory on armv7. Check if the MMU walksMark Kettenis
2016-08-06Rework ampintc's interrupt disestablish code to make it actually doPatrick Wildt
2016-08-06Set up the fdt attach args for devices that attach directly to mainbusJonathan Gray
2016-08-05Replace inappropriate use of CP15_CNTPCT with CP_DCCIMVAC.Mark Kettenis
2016-08-05Unmask the timer output signal for real.Mark Kettenis
2016-08-04Dynamically attach ampintc(4) and make it register itself as an interruptMark Kettenis
2016-08-04Add support for pre-registering interrupts. This allows device drivers toMark Kettenis
2016-08-03Simplify the way we handle TLB flushes. Since ARMv7 effectively has aMark Kettenis
2016-08-03The ARMv7 architecture deprecates the separate Instruction and Data TLBMark Kettenis
2016-08-01bring the light of ansi to a few more filesTed Unangst
2016-07-31Remove devmap stuff which is unused on armv7.Mark Kettenis
2016-07-31According to te armv7 ARM TLB entries that caused a Permission fault mightMark Kettenis
2016-07-31Use ansi style function declarations. No binary change.Jonathan Gray
2016-07-31Recognise Cortex A35 and Cortex A73.Jonathan Gray
2016-07-31Instead of testing MIDR values for every model of Cortex processor checkJonathan Gray
2016-07-29Only flush the virtual page if it was actually mapped. OtherwisePatrick Wildt
2016-07-27Remove a feature to re-use existing early bootstrap mappings. ThisPatrick Wildt
2016-07-27When pmap_page_remove() is called by UVM, a physical page is to bePatrick Wildt
2016-07-27Instead of passing the raw reg property to simplebus nodes,Patrick Wildt
2016-07-19Remove what appears to be a copy-paste error setting cur_ttbTom Cosgrove
2016-07-18Don't need a separate flags variable in armv7 pmap_clean_page() -Tom Cosgrove
2016-07-18Some SoCs have a ranges property set in their device trees. This canPatrick Wildt
2016-07-16Remove unused function process_frame() from arm_machdep.cTom Cosgrove
2016-07-13The "#address-cells" and "#size-cells" properties define the sizePatrick Wildt