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AgeCommit message (Expand)Author
2016-06-12Use OF_getpropintarray().Mark Kettenis
2016-06-10correct spelling of a commentJonathan Gray
2016-06-09Fetch "reg" and "interrupts" properties and pass them down as attach args toMark Kettenis
2016-06-07consistently set ipls on pmap pools.David Gwynne
2016-05-29use fdt "model" string for hw.productJonathan Gray
2016-05-27Remove the non ELF macrosTheo de Raadt
2016-05-23Place a cpu-dependent trap/illegal instruction over the remainder of theTheo de Raadt
2016-05-23Print the name from the corresponding FDT node to make identifying simplebus(4)Mark Kettenis
2016-05-23Change openprom into a pseudo-device, because not all arm platformsTheo de Raadt
2016-05-21Implement openprom(4) for armv7.Mark Kettenis
2016-05-21hand-massage sendsig() and sys_sigreturn() to be much more similar.Theo de Raadt
2016-05-18Introduce a per-platform init_mainbus() hook that can be used to attachMark Kettenis
2016-05-16Use OF_is_compatible(9) here.Mark Kettenis
2016-05-16POSTREAD needs to flush the D-cache since speculative loads might (and do)Mark Kettenis
2016-05-16Implement membar(9) for armv5. As there are no barrier instructions inJonathan Gray
2016-05-10SROP mitigation. sendsig() stores a (per-process ^ &sigcontext) cookieTheo de Raadt
2016-05-05Add Dual Data Rate support for eMMC at 52MHz.Mark Kettenis
2016-05-04Initial support for MSI-X. Only supported on amd64 for now. I have diffs toMark Kettenis
2016-05-02Rework mainbus and implement simplebus to be able to span a tree-likePatrick Wildt
2016-05-01Add support for changing the bus width to the sdmmc subsystem and the sdhc(4)Mark Kettenis
2016-04-27G/C DDB_REGS.Martin Pieuchot
2016-04-25remove systraceTed Unangst
2016-04-25use the cps instructions introduced with armv6 instead of mrs/msrJonathan Gray
2016-04-25Implement atomic operations using the atomic instructions availablePatrick Wildt
2016-04-25fix whitespaceJonathan Gray
2016-04-25Switch most of the cp14/cp15 use in .S files over to using sysreg.hJonathan Gray
2016-04-25Add macros to access cp14/cp15 registers by name instead of sixJonathan Gray
2016-04-25add dmbJonathan Gray
2016-04-24whitespace cleanupPatrick Wildt
2016-04-24EABI's Procedure Call Standard (AAPCS) requires the stack pointerPatrick Wildt
2016-04-20Don't use DDB_REGS, ok patrick@Martin Pieuchot
2016-04-08Fix match function so that the cortex bus only attaches if the attachPatrick Wildt
2016-04-04Store curcpu pointer in TPIDRPRW.Patrick Wildt
2016-04-04Read cache line sizes from CP15 Cache Type Register.Patrick Wildt
2016-04-04use fixed size unsigned variables for reading/writing the control registerJonathan Gray
2016-04-04Set the SMP/coherency bit in ACTLR on Cortex A models it is documentedJonathan Gray
2016-04-03Add cpu_auxcontrol() to clear and set bits in the implementation/modelJonathan Gray
2016-04-03Remove XSCALE preprocessor checks from a file which is only for ARMv7.Patrick Wildt
2016-04-03remove unused cpu_lock codeJonathan Gray
2016-04-03Remove tests for "processing" which was never set. It attempted toJonathan Gray
2016-03-24Kill commented out & unused CI_CURPRIORITY.Martin Pieuchot
2016-03-23Cleanup SCTLR mask to only include bits that are actually defined onPatrick Wildt
2016-03-22Remove support for ARM11. This was the last unused and unmaintainedPatrick Wildt
2016-03-22Remove support for ARM10.Patrick Wildt
2016-03-22Remove support for ARM9E. This is another step in the plan to removePatrick Wildt
2016-03-22Remove defines for unsupported chips, add V5TEJ and remove incorrectJonathan Gray
2016-03-19Remove support for the XScale 80200. We don't use it, it didn't compilePatrick Wildt
2016-03-19Remove support for IXP425. This is another architecture that is notPatrick Wildt
2016-03-19Remove support for StrongARM (SA1) and IXP12x0. Both are ARMv4 andPatrick Wildt
2016-03-18IXP425 is v5 not v4. Same change by msaitoh in NetBSD rev 1.16.Jonathan Gray
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