| Age | Commit message (Collapse) | Author | |
|---|---|---|---|
| 2013-08-08 | Remove duplicate loop. | Raphael Graf | |
| ok patrick@ | |||
| 2013-08-07 | We uniformly define size_t to be unsigned long and ssize_t to be long. Make | Mark Kettenis | |
| sure that SIZE_MAX and SSIZE_MAX are defined as constants with a matching type on all are architectures. ok millert@, matthew@ | |||
| 2013-08-06 | add Cortex A15 R4 | Jonathan Gray | |
| ok patrick@ | |||
| 2013-08-06 | The Cortex bus should be useful for Cortex-A7, too. | Patrick Wildt | |
| ok rapha@ jsg@ | |||
| 2013-08-06 | Attach amptimer only on Cortex-A9, as all Cortex-A8 doesn't have a generic | Patrick Wildt | |
| timer and the newer Cortexes have another generic timer. ok rapha@ jsg@ | |||
| 2013-07-13 | unify register_t to long on all platforms | Theo de Raadt | |
| ok miod kettenis | |||
| 2013-07-11 | Enable bus_space_set_region_4 for armv7. | Raphael Graf | |
| ok patrick@ | |||
| 2013-07-05 | Take II, this time without flubbing off_t: : move several internal | Philip Guenther | |
| type definitions that are the same across all archs from <machine/_types.h> to <sys/_types.h> ok deraadt@ kettenis@ otto@ | |||
| 2013-07-04 | backout previous; off_t must be signed and there might be other C++ API | Otto Moerbeek | |
| breakage lurking; ok kettenis@ | |||
| 2013-07-04 | To ease future changes, move several internal type definitions that are | Philip Guenther | |
| the same across all archs from <machine/_types.h> to <sys/_types.h> ok deraadt@ | |||
| 2013-06-14 | Don't pull cpufunc.h in from the machine include directory, but from | Patrick Wildt | |
| the arm one. ok bmercer@ | |||
| 2013-06-13 | ovbcopy begone | Theo de Raadt | |
| 2013-06-11 | final removal of daddr64_t. daddr_t has been 64 bit for a long enough | Theo de Raadt | |
| test period; i think 3 years ago the last bugs fell out. ok otto beck others | |||
| 2013-06-09 | typo | Miod Vallat | |
| 2013-06-03 | more fuse in more places. credit: miod | Ted Unangst | |
| 2013-06-01 | cleanup and consolidate the spinlock_lock (what a name!) code. | Ted Unangst | |
| it's now atomic_lock to better reflect its usage, and librthread now features a new spinlock that's really a ticket lock. thrlseep can handle both types of lock via a flag in the clock arg. (temp back compat hack) remove some old stuff that's accumulated along the way and no longer used. some feedback from dlg, who is concerned with all things ticket lock. (you need to boot a new kernel before installing librthread) | |||
| 2013-05-31 | remove counters for simplelocks | Ted Unangst | |
| 2013-05-30 | Enforce ca_activate tree-walks over the entire heirarchy for all events, | Theo de Raadt | |
| cleaning up some shutdown-hook related code on the way. (A few drivers related to sparc are still skipped at kettenis' request) ok kettenis mlarkin, tested by many others too | |||
| 2013-05-22 | We're handling L2 there, so use the corresponding define, not the L1 one. | Patrick Wildt | |
| ok bmercer@ | |||
| 2013-05-21 | When mapping a new entry, map it read-only, even though it should be | Patrick Wildt | |
| writable. This will cause a pmap fault on first write, so that we can mark the page as modified. Also mask the bits used for the protection settings, so that there aren't any leftovers. ok bmercer@ | |||
| 2013-05-18 | Get rid of the pmap7 header now that we merged it into the pmap one. | Patrick Wildt | |
| 2013-05-18 | Modify pmap to work with the pmap header used on armv7. Merge both | Patrick Wildt | |
| headers so that we only need one of them. "Go for it." miod@ | |||
| 2013-05-18 | Mask out the TEX remap and the Access Flag bits when setting the | Patrick Wildt | |
| system control register. Also actually use the mask. ok miod@ | |||
| 2013-05-18 | Make sure we executed the instruction before continuing. Also | Patrick Wildt | |
| replace calls to drain the write buffer with the correct ones for armv7. ok miod@ | |||
| 2013-05-18 | Use the actual armv7 dcache_inv_range function instead of the wbinv one. | Patrick Wildt | |
| ok miod@ | |||
| 2013-05-10 | whitespaces | Patrick Wildt | |
| 2013-05-10 | Convert K&R style function declaration to ANSI. | Patrick Wildt | |
| 2013-05-10 | Simplify mapping pages by just calling pmap_kenter_cache. | Patrick Wildt | |
| From oga at bitrig. ok miod@ | |||
| 2013-05-10 | Flush the secondary cache when dumping. | Patrick Wildt | |
| ok miod@ | |||
| 2013-05-10 | Remove an instruction cache sync which is not needed. | Patrick Wildt | |
| ok miod@ | |||
| 2013-05-10 | Map vector page executable when installing the fiq handler. | Patrick Wildt | |
| ok miod@ | |||
| 2013-05-09 | Don't rely on uvm_km_free() to remove the pmap mapping when unmapping | Patrick Wildt | |
| in bus space. ok miod@ | |||
| 2013-05-09 | Drain the bufs after or before we do a bus space operation on ARMv7. | Patrick Wildt | |
| ok miod@ | |||
| 2013-05-09 | On ARMv7 we can't use the cache mask to check for coherency. | Patrick Wildt | |
| Therefore we add new macros to be able to check for it properly. ok miod@ | |||
| 2013-05-09 | Implement mtx_enter_try for armv7 and handle ci_mutex_level. | Patrick Wildt | |
| From drahn and oga at bitrig. ok bmercer@ | |||
| 2013-05-09 | Have the ARM MPCore Timer use the private timer, which will be very useful | Patrick Wildt | |
| for SMP on the newer ARMv7 boards. From drahn at dalerahn.com. ok bmercer@ | |||
| 2013-05-08 | Port over NetBSD's arm dma sync code. This makes it easier to flush | Patrick Wildt | |
| the secondary cache, as we always have the physical address. tested on panda and zaurus ok miod@ | |||
| 2013-05-02 | Remove an #endif I forgot in there. | Patrick Wildt | |
| 2013-05-02 | Add a driver for the secondary cache controller on the PandaBoard and | Patrick Wildt | |
| other ARM Cortex based boards. Disabled for now, until proper secondary cache flushing is done where it's needed. ok miod@ | |||
| 2013-05-02 | remove static from a simple lock to avoid a compiler warning/error that | Ted Unangst | |
| shows up due to the lock.h simplification. noticed by patrick. stealing his commit because the tree should at least compile while we debate the future of simplelocks. | |||
| 2013-05-01 | Add a secure monitor call function, so that a secondary cache controller | Patrick Wildt | |
| driver can talk to its controller properly. From drahn at dalerahn.com. ok bmercer@ | |||
| 2013-05-01 | Fix a case where we might be cache flushing unmapped pages. | Patrick Wildt | |
| From Raphael Graf and NetBSD. ok miod@ | |||
| 2013-05-01 | Add a cortex bus which represents the ARM MPCore Complex. | Patrick Wildt | |
| It will attach only to ARM Cortex A9 and A15 SoCs. The generic interrupt controller and timer will attach to this bus, later a secondary cache controller can be added. The base address for those controllers are figured out using the periphbase register. ok bmercer@ | |||
| 2013-04-30 | Switch from pmap to pmap7. | Patrick Wildt | |
| ok bmercer@ | |||
| 2013-04-30 | Add context switching code matching to our pmap for ARMv7. | Patrick Wildt | |
| ok bmercer@ | |||
| 2013-04-30 | Add matching header for pmap7. | Patrick Wildt | |
| ok bmercer@ | |||
| 2013-04-30 | Replace the statically defined protection bits with a macro, which will | Patrick Wildt | |
| be useful for the upcoming ARMv7 changes. ok bmercer@ | |||
| 2013-04-28 | Revert the ARMv7 header split introduced in pmap7. | Patrick Wildt | |
| ok bmercer@ | |||
| 2013-04-28 | Improved dealing of ARMv7 faults. Added ARMv7 fault descriptions. | Patrick Wildt | |
| ok bmercer@ tested on zaurus by todd@ and patrick@ tested on armv7 boards | |||
| 2013-04-26 | ARMv7 userland uses a single domain. This define is already used in pmap7. | Patrick Wildt | |
| ok bmercer@ | |||
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