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2015-11-20shuffle struct ifqueue so in flight mbufs are protected by a mutex.David Gwynne
the code is refactored so the IFQ macros call newly implemented ifq functions. the ifq code is split so each discipline (priq and hfsc in our case) is an opaque set of operations that the common ifq code can call. the common code does the locking, accounting (ifq_len manipulation), and freeing of the mbuf if the disciplines enqueue function rejects it. theyre kind of like bufqs in the block layer with their fifo and nscan disciplines. the new api also supports atomic switching of disciplines at runtime. the hfsc setup in pf_ioctl.c has been tweaked to build a complete hfsc_if structure which it attaches to the send queue in a single operation, rather than attaching to the interface up front and building up a list of queues. the send queue is now mutexed, which raises the expectation that packets can be enqueued or purged on one cpu while another cpu is dequeueing them in a driver for transmission. a lot of drivers use IFQ_POLL to peek at an mbuf and attempt to fit it on the ring before committing to it with a later IFQ_DEQUEUE operation. if the mbuf gets freed in between the POLL and DEQUEUE operations, fireworks will ensue. to avoid this, the ifq api introduces ifq_deq_begin, ifq_deq_rollback, and ifq_deq_commit. ifq_deq_begin allows a driver to take the ifq mutex and get a reference to the mbuf they wish to try and tx. if there's space, they can ifq_deq_commit it to remove the mbuf and release the mutex. if there's no space, ifq_deq_rollback simply releases the mutex. this api was developed to make updating the drivers using IFQ_POLL easy, instead of having to do significant semantic changes to avoid POLL that we cannot test on all the hardware. the common code has been tested pretty hard, and all the driver modifications are straightforward except for de(4). if that breaks it can be dealt with later. ok mpi@ jmatthew@
2015-11-12get rid of IFQ_POLL.David Gwynne
IFQ_POLL(&ifp->if_snd, m); if (m == NULL) return; IFQ_DEQUEUE(&ifp->if_snd, m); is the same as IFQ_DEQUEUE(&ifp->if_snd, m); if (m == NULL) return; ok mpi@
2015-10-27arp_ifinit() is no longer needed.Martin Pieuchot
2015-09-19intr_barrier(9) for armJonathan Gray
ok kettenis@
2015-09-13remove deltaTheo de Raadt
2015-08-25Put the device name into the timeout message. OK jsg@Brandon Mercer
2015-07-19Rename the tpspmic driver so it does not contain numbers. OK jsg@Brandon Mercer
2015-07-19Make the keyboard driver poll until we can improve it more. Pulled from the ↵Brandon Mercer
original driver by Patrick Wildt, OK jsg@.
2015-07-17remove obsolete INET kernel optionTed Unangst
2015-07-17Remove {LOAD,COUNT}_TEXTA from libsa loadfile, it only made sense for a.outMiod Vallat
kernels and we no longer have any.
2015-07-17add exdisplay to chromebook_devsJonathan Gray
tested by and ok bmercer@
2015-07-17enable exynosJonathan Gray
2015-07-15The exynos gic is not at a fixed offset from periphbase unlikeJonathan Gray
the other socs. Handle this by setting variables in exynos{4,5}_init functions and calling the board_init callback earlier. tested by and ok bmercer@
2015-06-29enable vexpressJonathan Gray
2015-06-24Make ARM_KERNEL_BASE explicitely unsignedMiod Vallat
2015-06-24Increment if_ipackets in if_input().Martin Pieuchot
Note that pseudo-drivers not using if_input() are not affected by this conversion. ok mikeb@, kettenis@, claudio@, dlg@
2015-06-14correct the uart irq numbersJonathan Gray
ok bmercer@
2015-06-14add a driver for the ARM PrimeCell PL031 RTCJonathan Gray
2015-06-13When investigating an uninitialised variable in the armv7 resettodr()Jonathan Gray
miod pointed out that time_second should be compared to 1 not 0 in the md resettodr() functions as it is initialised to 1. ok miod@ deraadt@
2015-06-08enable agtimer on the ramdisk as wellJonathan Gray
2015-06-08Add initial support for the ARM Versatile Express boards as emulated byJonathan Gray
qemu with virtio memory ranges. Unfortunately the vexpress-a9 and vexpress-a15 boards/targets have different load addresses and memory maps. Code for the PL011 UART and mmio virtio attachment from Patrick Wildt in bitrig.
2015-06-07Initial exynos4 bits. Among other things the gic isn't mapped correctlyJonathan Gray
on exynos4/5 yet as it isn't at the usual offset from periphbase. ok bmercer@
2015-06-02with binutils 2.17 we can change some raw opcodes into instruction namesJonathan Gray
ok miod@ deraadt@
2015-05-30Set the usb otg port on the cubox to host mode and attach ehci to it.Jonathan Gray
While ehci attaches, devices don't seem to be recognised in the otg port. From Patrick Wildt in bitrig.
2015-05-30Set the sdmmc(4) emmc highspeed flag if the capability register claimsJonathan Gray
it is supported.
2015-05-30fix the build when SDHC_DEBUG is definedJonathan Gray
2015-05-29enable agtimer required for cortex a15Jonathan Gray
2015-05-27call exynos_platform_match() if the kernel is compiled with exynos devicesJonathan Gray
2015-05-27make the exynos code compile without fdtJonathan Gray
ok bmercer@
2015-05-26make this build with WSDISPLAY_COMPAT_RAWKBD definedJonathan Gray
ok bmercer@
2015-05-26Sync usb devices with amd64.Jonathan Gray
Prompted by djm noticing uslcom(4) was not included.
2015-05-24add the chromebook board id the exynos code usesJonathan Gray
2015-05-24imx_board_devs -> exynos_board_devsJonathan Gray
2015-05-24Add udl(4) and uvideo(4) to armv7 GENERIC. Tested on my sabre lite (imx).Matthieu Herrb
enable udl firmware and COMPAT_RAW_KBD to make udl useable with X. ok jsg@
2015-05-20Remove cubieboard specific gpio led setting.Jonathan Gray
From Artturi Alm in bitrig.
2015-05-20Now all the socs use the same va entry point and don't have anyJonathan Gray
conflicting symbols we can combine the configs. Multiple umg files are still required however. The bsd.umg target in the kernel is replaced by targets for bsd.IMX.umg, bsd.OMAP.umg and bsd.SUNXI.umg.
2015-05-20add per soc match functions instead of using armv7_matchJonathan Gray
2015-05-19change names to not conflict with omap intcJonathan Gray
From Patrick Wildt in bitrig
2015-05-19rename global variables to not conflict with gptimerJonathan Gray
2015-05-19Abstract the soc_machdep.c functions to allow a kernel to be built forJonathan Gray
multiple socs. From Patrick Wildt in bitrig with some additional changes.
2015-05-19use the same va entry point on all armv7 socsJonathan Gray
Similiar changes were made in bitrig by Patrick Wildt. As part of this change the physical load address for imx and sunxi have changed. Any u-boot settings that include it will need to be modified. imx: 0x10800000 -> 0x10300000 sunxi: 0x40800000 -> 0x40300000 Tested by bmercer, canacar and myself. ok bmercer@
2015-05-18Make armv7 startup PIC. From Dale Rahn in bitrig.Jonathan Gray
Tested by bmercer, canacar and myself. ok bmercer@
2015-05-17Checking the dts files turned up some more imx sdhc problems.Jonathan Gray
- use the correct CD gpios on phyflex and wandboard usdhc3 (unit 2) - udoo has just the one sd slot with no CD
2015-05-17add missing calls to set the gpio direction before reading theJonathan Gray
card detect gpio on phyflex/sabre lite/wandboard
2015-05-15Decrement the unit numbers on the novena sdhc devices. The imx6 dtsJonathan Gray
files seem to have labels numbered one higher than the nodes they are assigned to. Tested by djm
2015-05-15Make board attaching table driven and move it out into the socJonathan Gray
directories. Move the device tables while here as was done in bitrig. With these changes the only use of the board id defines is in the soc directories. Tested by matthieu and djm on imx and myself on omap and sunxi (qemu). ok djm@, ok jasper@ on an earlier version
2015-05-14Remove BOARD_ID* tests that do the same thing for every imx board.Jonathan Gray
Tested by and ok djm@
2015-05-14rework imxenet hardware address setup: if COTP doesn't provide anDamien Miller
address, check whether the firmware/bootloader has already programmed one. If all else fails, use ether_fakeaddr(); feedback and ok jsg@ (committed from Novena)
2015-05-13Having the same settings on the same phy across multiple boards is justJonathan Gray
asking too much in the arm world. Translate the fec parameters from the novena dtb to set a different clock skew to the same micrel phy used on sabre lite. The novena dtb sets txd[0-3]-skew-ps to 3000, the sabre lite sets them to 0. When run through the shifting/oring process from the micrel phy driver in FreeBSD this ends up being a write of 0xffff on the novena and 0x0000 on sabre lite when writing to TX_DATA_PAD_SKEW. This change resolves the stability problems djm was seeing with imxenet on novena. ok djm@
2015-05-12imxiic is known to be broken don't try attaching it on utiliteJonathan Gray