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path: root/sys/arch/armv7
AgeCommit message (Expand)Author
2016-10-24make cleandir should skip the version file; ok otto millertTheo de Raadt
2016-10-23Remove sunxi board IDs.Mark Kettenis
2016-10-23De-platformize sunxi. This removes the board initialization code that sets upMark Kettenis
2016-10-23Only attach on sun4i and sun5i. The timer implemented on later SoCs lacksMark Kettenis
2016-10-23stop disabling the external pl310 l2 cache on pandaboardJonathan Gray
2016-10-22Attach sxitimer(4) using the fdt.Mark Kettenis
2016-10-22Stop setting MIIF_AUTOTSLEEP in sxie(4)Jonathan Gray
2016-10-21Stop setting MIIF_AUTOTSLEEP in fec(4)Jonathan Gray
2016-10-21Implement a driver for Marvell's Mbus bridge. This is the componentPatrick Wildt
2016-10-21Run timers from the 24MHz; it seems the A10s doesn't have a reliable 32kHzMark Kettenis
2016-10-15cleandir: target for kernel compile directoriesTheo de Raadt
2016-10-14Kernel builds now happen in compile/CONFIG/obj@ -> /usr/obj/... [or ./obj/,Theo de Raadt
2016-10-09Add psci(4) a driver for the reset and power down portion of theJonathan Gray
2016-10-09Attach sxiccmu(4) using the fdt.Mark Kettenis
2016-10-09Change raw dsb and smc opcodes to instructions. The dsb encoding didJonathan Gray
2016-10-09Remove the vexpress platform abstraction and board id. All the devicesJonathan Gray
2016-10-09Add a power down function pointer so power down can work without theJonathan Gray
2016-10-08Simplify handling of cold reboot on armv7 to match other platformsTom Cosgrove
2016-10-08Make sxidog(4) set cpuresetfn, and cut some dead wood from the platform code.Mark Kettenis
2016-10-08Attach sxipio(4) using the fdt.Mark Kettenis
2016-10-08Dynamically attach sysreg(4) using the FDT.Jonathan Gray
2016-10-08Use the fdt root node instead of board ids to gate omap4 specific code.Jonathan Gray
2016-10-08Only set the highspeed bit in bus_clock if highspeed is supportedJonathan Gray
2016-10-07Implement a driver for Marvell Armada's clock gates. This basicallyPatrick Wildt
2016-10-07Fixup comment by removing a word.Patrick Wildt
2016-10-07Support the Marvell Armada's System Controller to be able to resetPatrick Wildt
2016-10-07Don't forget to add the CVS Id tag.Patrick Wildt
2016-10-07Add a driver for the Marvell Armada 380 core clock. This driverPatrick Wildt
2016-10-06Remove board IDs for the i.MX platform. The kernel doesn't need them anymore.Mark Kettenis
2016-10-05Make imxdog(4) set cpuresetfn, and remove all the imx platform that is noMark Kettenis
2016-10-05Some device trees use 64-bit intermediate virtual addresses. ThisPatrick Wildt
2016-10-05Introduce a global function pointer to reset the CPU akin to amd64 andPatrick Wildt
2016-10-03Disable sitaracm and add a new ompinmux driver for omap pin muxing/padJonathan Gray
2016-10-02Set IFCAP_VLAN_MTU capability in cpsw(4). AvoidsJonathan Gray
2016-10-02Save and restore the (non-standard) USBMODE register around a reset of theMark Kettenis
2016-09-24Add -Wno-pointer-sign to all our gcc4 architectures.Mark Kettenis
2016-09-24If the value of r0 upon entering the kernel is zero, interpret this as theMark Kettenis
2016-09-24Pass esym to the kernel in r0. Since u-boot passes 0 in this register, weMark Kettenis
2016-09-23Attach imxocotp(4) using the fdt. Since this means that imxtemp(4) attachesMark Kettenis
2016-09-22Periodically call mii_tick() like all our other ethernet drivers that useMark Kettenis
2016-09-21Remove some dead code and only enable tx and rx interrupts.Mark Kettenis
2016-09-18Convert imxccm(4) and imxiomuxc(4) to attach using the fdt. Use the "early"Mark Kettenis
2016-09-15Add omwugen(4) a driver for the TI logic that generates wakeup eventsJonathan Gray
2016-09-13crank bootloader version after .SUNW_ctf changeJasper Lievisse Adriaanse
2016-09-12Enable uwacom(4) where uts(4) is already present.Martin Pieuchot
2016-09-11Properly keep track of which of the two tx FIFOs is in use. Fixes theMark Kettenis
2016-09-11Remove #ifdef'ed out clock setting code, as we handle setting the clock usingMark Kettenis
2016-09-10Advertise high-speed support.Mark Kettenis
2016-09-10Use PLL6 as a parent clock for the SDx clocks for frequencies > 400 kHz.Mark Kettenis
2016-09-10Correct the path to the iomuxc fdt node so pinctrl setup will run.Jonathan Gray
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