Age | Commit message (Collapse) | Author |
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add some more trap flags and fix T_USER wrt the pa1.1 specs
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define UPAGES through USHIFT
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trapframe
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spl's do not mask Ibit anymore, prevent int lossage.
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lazy fpu context switching it could be well saved into pcb.
this brings trapframe to 256 bytes (including 5 spare words).
adjust all the code to deal w/ moved fpu regs save area.
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meaning the start of available memory.
cleanup machdep somewhat.
fix vm_map.pmap vs vm_pmap isue; 10x art@
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