Age | Commit message (Collapse) | Author |
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used and depended, mimicking new changes by guenther to amd64.
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PROT_NONE, PROT_READ, PROT_WRITE, and PROT_EXEC from mman.h.
PROT_MASK is introduced as the one true way of extracting those bits.
Remove UVM_ADV_* wrapper, using the standard names.
ok doug guenther kettenis
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gsckbd was removed back in 2008 so this was never defined.
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ok jsing@
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Architecture Reference Specification, the sum of the 8 trap entry words
*and* of the payload which address and length are to be set at well-known
positions in the aforementioned trap entry, needs to be zero; the existing
code was only enforcing that the sum of the trap entry words is zero.
This matches what Linux and NetBSD do.
ok kettenis@
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bit fields with their right sizes (the L2PARERR field on PCXL processors being
4 bits wide, not 1 bit), and make comments consistent accross these functions.
ok kettenis@
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changed a lot in the last 5 years; verified to work on a 3GB system, in
snapshots for a few weeks already.
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the disassembler initialization fails.
Correctly compute the destination of pc-relative branches.
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option DDB; some parts of trap() depend upon the whole frame being
populated (especially when running on PCXS processors).
ok kettenis@
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This makes it easier to remove components not required to do an install,
and subsequently add other desireable components ...
In snapshots (in various forks) for about a week.
Do some upgrades and installs, please.
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ok miod@
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-Wstack-larger-than-. This is what modern GCC supports as well as LLVM.
ok miod@
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RAMDISK kernels have reduced functionality compared to GENERIC. which
kind of sucks but so it is. At least if we are going to reduce functionality,
reduce it in the same way on all architectures, because that makes our
debugging burden less (the margin is too narrow for me to prove this)
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ok miod@
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ok deraadt@
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atomic_{add,sub}_{int,long}_nv. sys/atomic.h turns these into the
rest of the atomic api.
on uniprocessor hppa systems "atomic" operations are implemented
as a non-interruptable sequence by disabling all interrupts on the
cpu, doing the operation, and then restoring the interrupt mask.
this isnt enough on MP systems, so we added a global atomic memory
mutex that is taken inside the interrupt disabling above to coordinate
operations between cpus.
this is a lot of overhead though cos mutexes dance around with ipls,
which is unecessary in our case because of the interrupt disabling
that is already done. also, hppa spinlocks are implemented with
ldcw which requires the word it operates on to be 16 byte aligned.
mutexes arent guaranteed to have this alignment so they compensate
by having lots of words inside themselves so they can hit the
appropriate one to use for the ldcw op.
with this in mind, this change pulls __cpu_simple_locks, which are
simply ldcw spinlocks with a 16 byte aligned word, out of
src/sys/arch/hppa/include/lock.h into src/sys/arch/hppa/include/atomic.h
so atomic.h can use them. lock.h includes atomic.h, so it still
gets and provides the same functionality as before.
finally, this also pulls the rwlock cas implementation apart. cas
ops now share the same serialising lock on MP systems as the other
memory operations, and rw_cas is defined as a wrapper around
atomic_cas_uint.
ok kettenis@
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related to disk stastics for almost 17 years, and the remaining
userland-visible defines duplicate those found in <sys/sched.h>.
Move the remaining _KERNEL defines to <sys/tty.h> where they belong, and
update all users to cope with this.
ok kettenis@
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added. The new drivers match at a higher priority.
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of global cp_time[] for live information, as loadavg is not updated fast
enough for hz/16 blinking rate. Prompted by feedback from mickey@
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arithmetic to display the load average in leds 5-8 of 8 led systems.
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device tables and kernel config files. ok deraadt
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ok miod@, who has offerred to help with any MD fallout
ok guenther@
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- Always use either: ((x & RB_XXX) != 0) or ((x & RB_XXX) == 0) in boolean
context (mostly if (x), or x ? y : z)
- prom_halt() in alpha is confirmed to take int as boolean
Converted by coccinelle. No functional change intended.
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ok mpi@ sthen@
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"sure" miod@
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Some architectures have ability to detect hardware sanity and notify system
(NMI, firmware callback, etc.). Handle these hardware severe errors, same
as software errors, with panic(9).
According to miod@, SGI IP27 NMI is triggered by pushing some "hidden" button,
which "usual" users/admins don't know. Pushing such a button is "RB_USERREQ"
(human-triggered) in that the button is pushed by a human, but not "RB_USERREQ"
in that no user intervention in system (== no command input) is done. miod@
agreed that changing these from RB_USERREQ to !RB_USERREQ (== panic(9)) is
not a big problem.
OK miod@ kettenis@
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take away."
remove uyap. no effect except on hppa where it was strangely enabled.
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ok miod@
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architectures.
ok deraadt@
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Some ports watch temperature in MD and try to shutdown system, when overheated,
by calling directly (re)boot(9). Change this to signal init(8) from kernel,
as acpi(4) and acpitz(4) do, which has been more tested. This also helps to
clarify design that ``clean shutdown must be always started by init(8)''.
Note that SIGUSR2 causes init(8) to call reboot(2) with RB_POWERDOWN, as
acpi(4) etc. already does. It is reasonable, pointed out by kettenis@,
considering system is overheated and immediate reboot may be dangerous.
OK deraadt@ miod@
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after discussions with beck deraadt kettenis.
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