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Tested on multiple i386 and it works, amd64 works also with a few
exceptions that will get fixed.
The initial effort of importing was done by oga@, thanks!
Lots of testing and debugging by mlarkin@ and me.
Okay deraadt@, oga@, mlarkin@.
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amas defaults to disabled on both amd64 and i386.
"Go for it!" kettenis@
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of ACPI S3 suspend/resume support. This is for i386.
Help/comments from art, toby, marco, jordan, kurt
ok marco@, kurt@
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BIOSes.
ok deraadt@ (for the amd64 bit, or the i386 bit, can't remember which)
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into bus_dma.c (a-la amd64).
Discussed with art and toby in coimbra. Ok mikeb.
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defines into real functions. since machdep.c is cluttered as it is move them
into bus_space.c (like amd64). a later commit will move the stuff from machdep
across too. since machdep.c is cluttered as it is move them into bus_space.c
(like amd64). a later commit will move the stuff from machdep across too.
some shrinkage stats:
GENERIC.MP 209.66kb
RAMDISK 50.84kb
RAMDISKB 50.04kb
RAMDISC 36.28kb
RAMDISK_CD 168.03kb
don't fill it up all at once!
claudio found no network performance hit. toby thought the code went
looked alright. art@ ok.
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previously, we had a static list of pcidevs and which agp driver would
be interanlly attached. Instead, split the agp drivers so they work like
audio(4), where we attach a driver, which sets up some callbacks and
initial state, then attaches the interface (agp(4)). Since this allows
us to attach different drivers in different places, and give them
/proper/ probe functions move most of the drivers back to attaching at
pchb, where they should, and intagp (formerly agp_i810) stays attaching
at vga, since it's part of the intel integrated graphics chips.
Diff shrinks the kernel slightly, gets rid of the annoying "no integrated
graphics" warning, and allows more cleanup later.
Tested by many. fix for alpha build (the only other vga_pci.c consumer)
suggested by miod.
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has never been performance sensitive.
Running on all platforms, discussed with millert and kettenis, ok toby
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it only provides the hosts machines clock as a timedelta sensor so far.
getting it into the tree so people can work on it as suggested by fgsch@
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some AMD Geode LX systems with CS5536 companion chip. It works
similar to auich(4) and auixp(4), but the hardware dependent parts
are quite different.
Tested with various PC-Engines ALIX boards (1B, 3C3) and a WebDT 186
board.
feedback many, ok deraadt & jmc (documentation)
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Needed for the upcoming AMD Geode LX graphics processor X11 driver.
discussed with, feedback, and ok matthieu and deraadt.
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ok dlg@, jsing@, deraadt@
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ok dlg@, tested by dlg@, oga@, jsg@, deraadt@
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ok deraadt@
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agp and drm need to use the same memory mapping, the best way to deal
with that is to allow them to share (that's coming later), for this to
work cleanly we move the attach point of agp.
Ideally most agp drivers would attach at pchb, with only agp_i810
(and any that work similarly) attaching at vga, but this will do for
now.
ok kettenis@, miod@.
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disabling agp_ali solves this. Proper fix shall hopefully some sometime
after release. Shouldn't affect anyone.
ok sthen@, prodded by deraadt@.
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also assume that 386 cpus are really unknown, and promote them to 486
instead of panic.
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directive can select between MI and MD versions of these files. At
the same time, adjust the boot programs to pick exactly what they need,
instead of the 7 or 8 mechanisms previously used.
There will be some fallout from this, but testing it all by myself is a
ridiculously slow process; it will be finished in-tree.
Various developers were very nice and avoided making fun of me when I
was gibbering in the corner..
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actually get detected and attached. Also adds a kernel api for
manipulating agp.
Enable this on i386 and amd64.
"I think you should commit it" deraadt@, ok matthieu. Looked over by
several others.
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a single device node will talk to the right kernel code automatically.
ok deraadt
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gpio* at glxpcib?
Based on an initial diff from Martin Hedenfalk <martin@bzero.se> which
I largely rewrote.
Tested on the ALIX.3C1 and the Soekris net5501.
ok dlg, grange, marco
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by mickey, man page by me. Help, suggestions by Theo and jmc.
Enable this driver and glxpcib(4) in all RAMDISK kernel, but glxpcib(4)
does not provide the watchdog timer in the RAMDISK kernels.
Prodded by deraadt.
E
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found in the CS5536 companion chip to the AMD Geode LX-800 processor.
glxpcib(4) driver written by mickey, with some tweaks by me. Manpage
nits by jmc.
Tested on the Soekris net5501 (by me) and the Alix 2a2
(by earxtacy@dixinet.com)
ok kettenis
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OK henning@
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needed (not just for I686_CPU), but it and ichpcib only call the
update_cpuspeed functions for I686_CPU.
ok tedu@ deraadt@
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st(4).
ok tom@ deraadt@ jason@
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We need to include lock_machdep even on non-MP kernels now for
rw_cas.
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parings of the Intel Pentium 3 and the ich southbridges. Written by
Stefan Sperling <stsp AT tsp DOT in-berlin DOT de> based on a driver in
NetBSD and sys/arch/i386/pci/ichpcib.c.
Tested my mpf@ among others,
ok tedu
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cores by the same amount, i.e. if you do hw.setperf=50 both cores will
be scaled to the opearting state corresponing to 50%. Tested by many with
est (mainly on core2duo machines like X60 thinkpads). Only enable est
during GENERIC.MP build no one tested powernow.
ok art@
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way, rather than requiring some glue in each machines mainbus probe.
it is still commented out.
based on a discussion with miod@ ok marco@ deraadt@
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The "lapic" timer is ripped out since it wasn't actually a lapic timer,
but a hacked up tsc timer with some synchronization for MP. There is no
tsc timer right now since they are very unreliable on MP systems, systems
with apm, and systems that change the cpu clock. Which basically means
every modern machine out there. We're running with the i8259 timer now.
deraadt@ ok
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implementation of a RAID 1 is included in this but it does not deal with
failures yet. Disabled in GENERIC.
Suggestions from and ok beck@ miod@ krw@ dlg@ deraadt@
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the freezes many of us are seeing (especially on amd64 machines running
OpenBSD/i386).
Much testing by nick@ (as always - thanks!), hugh@, ian@, kettenis@
and Sam Smith (s (at) msmith (dot) net).
Requested by, input from, and ok deraadt@ ok art@, kettenis@, miod@
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Changes to either copy of amd64errata.c must be replicated in the other.
ok deraadt@
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ok deraadt, "slap it in" miod@
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Currently just uses the RNG; AES support to be added later.
ok deraadt@
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ok deraadt@ and many others.
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so that things can use it; tested on all architectures; ok kettenis
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ok mickey@, toby@
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generic bus layer, and SCSI emulation for SD/MMC memory cards.
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routing for several integrated devices on those chipsets in GENERIC.MP.
ok brad@, mickey@
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if supported by the cpu(s). currently not enabled by default and
not compiled into ramdisks. this grows paddr_t to 64bit but yet
leaves bus_addr_t at 32bits. measures are taken to favour dmaable
memory allocation from below 4g line such that buffer cache is
already allocated form below, pool backend allocator prefers lower
memory and then finally bounce buffers are used as last resort.
PAE is engaged only if global variable cpu_pae is manually set
to non-zero and there is physical memory present above 4g.
simplify pcibios address math to use u_long as we always will
be in the 32bit space.
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gpioow(4) 1-Wire bus bit-banging through GPIO pin
onewire(4) 1-Wire bus driver
owid(4) 1-Wire ID family type device
owtemp(4) 1-Wire temperature family type device
Drivers for RS-232 and USB bus masters will follow.
ok deraadt@
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