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path: root/sys/arch/i386/include
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2019-11-07Convert db_addr_t -> vaddr_t but leave the typedef for now.Martin Pieuchot
2019-08-04Fix a typo I noticed reviewing the smbios code cleanup diff.kmos
(stirng -> string) ok kettenis@ who pointed out I should fix the new arm64 smbiosvar.h too
2019-08-04Cleanup the bios(4)/smbios(4) code a bit. Fix some KNF issues, reduceMark Kettenis
differences between the i386 and amd64 versions of the code and switch to using the standard C integer exact width integer types. ok deraadt@
2019-07-26emove duplicate definitions of LAPIC_ID_MASK and LAPIC_ID_SHIFT.Kevin Lo
"yes please" guenther@
2019-06-28Write back and invalidate caches before updating CPU microcode,Alexander Bluhm
like Intel does in their patches on githup. Also add a compiler level memory barrier to the wbinvd instruction like Linux does. OK mlarkin@ guenther@ kettenis@
2019-06-14Add TSC_ADJUST CPUID flag.Mark Kettenis
ok deraadt@, mlarkin@
2019-04-10change marks[] array to uint64_t, so the code can track full 64-bitTheo de Raadt
details from the ELF header instead of faking it. Proposal from mlarkin, tested on most architectures already
2019-03-23Use the debugger mutex for `ddb_mp_mutex'. This should prevent a raceVisa Hankala
that could leave `ddb_mp_mutex' locked if one CPU incremented `db_active' while another CPU was in the critical section. When the race hit, the debugger was unable to resume execution or switch between CPUs. Race analyzed by patrick@ OK mpi@ patrick@
2019-01-22flense more trailing whitespacePeter Hessler
2019-01-22remove trailing whitespace in the Laptop Package part of the license text.Peter Hessler
no words or punctation were modified.
2019-01-18delete vmm(4) in i386pd
We will still be able to run i386 guests on amd64 vmm. Reasons to delete i386 vmm: - Been broken for a while, almost no one complained. - Had been falling out of sync from amd64 while it worked. - If your machine has vmx, you most probably can run amd64, so why not run that? ok deraadt@ mlarkin@
2018-12-05Include srp.h where struct cpu_info uses srp to avoid erroring out whenJonathan Gray
including cpu.h machine/intr.h etc without first including param.h when MULTIPROCESSOR is defined. ok visa@
2018-10-02Unify the MD byteswapping code as much as possible across architectures.Christian Weisgerber
Use inline functions instead of GNU C statement expressions, and make them available to userland. With clues from guenther@. ok guenther@ kettenis@
2018-09-11Add defines for amd microcode msrs which appear to be present since k8Jonathan Gray
though amd only provides public redistributable updates for >= family 10h.
2018-08-29First pass in bringing i386 in sync with amd64. This does not yet work, but ispd
being committed now so we can work on the rest in-tree. ok mlarkin@
2018-08-25Define __HAVE_ACPI.Mark Kettenis
ok deraadt@, krw@, jca@
2018-08-23port the amd64 code for loading intel microcode on boot to i386Jonathan Gray
ok deraadt@ mlarkin@
2018-08-21print rdtscp and xsave_ext cpuid bits on i386 as wellJonathan Gray
move printing of ecxfeatures bits to match amd64
2018-08-21print sefflags_edx cpuid bits on i386 as wellJonathan Gray
2018-08-20Remove unused spllock().Visa Hankala
OK deraadt@ mpi@
2018-08-15add cpuid and msr bits fromJonathan Gray
'Deep Dive: CPUID Enumeration and Architectural MSRs' ok deraadt@
2018-08-08Recognise 'Speculative Store Bypass Disable' support cpuid bit.Jonathan Gray
Documented in 'Speculative Execution Side Channel Mitigations' revision 2.0.
2018-07-30Use the MI interrupt enable/distable API instead of the MD one on i386 andMark Kettenis
remove the MD API. ok deraadt@
2018-07-24Do the same for i386 as amd64:Bryan Steele
Add "Mitigation G-2" per AMD's Whitepaper "Software Techniques for Managing Speculation on AMD Processors" By setting MSR C001_1029[1]=1, LFENCE becomes a dispatch serializing instruction. ok deraadt@
2018-07-12unbreak i386 build, thanks to pd@ for noticing. Same diff as I committedMike Larkin
earlier for amd64
2018-07-09Delete the VM86 kernel option and i386_vm86(3) API: it's requiredPhilip Guenther
a custom kernel for over 20 years. testing mlarkin@ ok deraadt@ phessler@ jca@ matthieu@
2018-06-30Add intr_enable() function, intended for MI use to amd64 and i386 and useMark Kettenis
this in the acpi(4) suspend/resume code paths. ok deraadt@
2018-06-22Finish the last missing piece for the i386 meltdown fix:Alexander Bluhm
- handle protection fault on iret properly - handle NMI - actually enable U-K in pmap_switch() from hshoexer@; input guenther@; OK mlarkin@ deraadt@
2018-06-21Save and restore retguard area during hibernate unpack. This copies theMike Larkin
original retguard data to the piglet and bcopys it back in place immediately before resuming via the ACPI Sx trampoline. ok deraadt, guenther, tested by many.
2018-06-15Reorder trapframe/intrframe to put %ebp next to %eip and make itAlexander Bluhm
behave like a real call frame, thus vastly simplifying the ddb back trace logic. from hshoexer@; initially from guenther@; OK deraadt@
2018-05-28More steps for i386 Meltdown fix:Alexander Bluhm
- name gdt explicitly in struct cpu_info_full - identfiy ARCH_CAPABILITIES_RDCL_NO and print in identifycpu() - in pmap.c build U-K table, handle PG_G accordingly - in pmap_switch() do not unmap the kernel, yet; but all pieces are in place - pmapae.c: on boostrap transfer pmap to pmapae tables, build U-K table and wire it, handle PG_G from hshoexer@; OK mlarkin@
2018-04-30vmd(8): unbreak i386Mike Larkin
2018-04-17- Make rnd hints avoid the brk area. The rnd allocator refuses to allocate inOtto Moerbeek
the brk area anyway. - Use a larger hint bound to spread the allocations more for the 32-bit case - Simplified the overy abstracted brs/stack allocator and switch of guard pages for the brk case. This allows i386 some extra space, depending on memory usage patterns. - Reduce brk area on i386 to give the rnd space more room ok stefan@ sthen@
2018-04-11More steps for i386 Meltdown fix:Alexander Bluhm
- provide struct cpu_info_full - prepare K-U sections - reorganize interrupt, trap, syscall entry to use K-U trampoline - prepare pmap for entering special mappings, the mappings are not setup yet This code will already trigger performance issues. We do more tlb flushes, but we do not unmap the kernel yet. The latter will be needed to prevent Meltdown. from hshoexer@; input guenther@; OK mlarkin@ deraadt@
2018-03-31Recommit preparation for i386 Meltdown fix after OpenBSD 6.3 release.Alexander Bluhm
- provide a cpu_softc for cpu_attach() etc. - replace per PCB TSS with per CPU TSS The first change prepares for cpu_info being embedded in a cpu_full_info. Therefore during autoconf/cpu_attach we hand down a softc. The second change removes the per PCB TSS. We now have one TSS per CPU, thus in cpu_switchto() we only have to patch the ring 0 stack pointer instead of loading a new TSS. This also allows for cleaning up the GDT, so we only have a single slot for the TSS. from hshoexer@; OK deraadt@
2018-03-22iBackout the preparations for fixing Meltdown on i386. The task wasAlexander Bluhm
only halfway done and the current state does not help anybody. For OpenBSD 6.3 release go back to the original code before 2018/03/13. This gives us a stable release and the changes will come back later. discussed with guenther@ deraadt@ hshoexer@
2018-03-13Preparation for i386 Meltdown fix:Alexander Bluhm
- provide a cpu_softc for cpu_attach() etc. - replace per PCB TSS with per CPU TSS The first change prepares for cpu_info being embedded in a cpu_full_info. Therefore during autoconf/cpu_attach we hand down a softc. The second change removes the per PCB TSS. We now have one TSS per CPU, thus in cpu_switchto() we only have to patch the ring 0 stack pointer instead of loading a new TSS. This also allows for cleaning up the GDT, so we only have a single slot for the TSS. from hshoexer@; OK deraadt@
2018-03-05#define _MAX_PAGE_SHIFT in MD _types.h as the maximum pagesize an archTheo de Raadt
needs (looking at you sgi, but others required this before). This is for the circumstances we need pagesize known at compile time, not getpagesize() runtime. Use it for malloc storage sizes, for shm, and to set pthread stack default sizes. The stack sizes were a mess, and pushing them towards page-aligned is healthy move (which will also be needed by the coming stack register checker) ok guenther kettenis, discussion with stefan
2018-02-10Additional AMD CPUID bits documented inJonathan Gray
"Processor Programming Reference (PPR) for AMD Family 17h Model 01h, Revision B1 Processors" ok mlarkin@ deraadt@
2018-01-25Move common mutex implementations to a MI place.Martin Pieuchot
Archs not yet converted can to the jump by defining __USE_MI_MUTEX. ok visa@
2018-01-13Define and use IPL_MPFLOOR in our common mutex implementation.Martin Pieuchot
ok kettenis@, visa@
2018-01-12Unify <machine/mutex.h> a bit further.Martin Pieuchot
`mtx_owner' becomes the first field of 'struct mutex' on i386/amd64/arm64. ok visa@
2018-01-04Unify <machine/mutex.h> a bit further.Martin Pieuchot
Remove `mtx_lock' from i386, add volatile before `mtx_owner' where it was missing. Inputs from kettenis@, ok visa@
2017-11-29make vmm(4) less responsible for initial register state, preferring to letMike Larkin
usermode daemons handle that. ok pd@
2017-11-17vmmvar.h changes for upcoming cdrom support in vmd(8).Mike Larkin
Diff from carlos cardenas, thanks
2017-10-17Add a machine-independent implementation for the mplock.Visa Hankala
This reduces code duplication and makes it easier to instrument lock primitives. The MI mplock uses the ticket lock code that has been in use on amd64, i386 and sparc64. These are the architectures that now switch to the MI code. The lock_machdep.c files are unhooked from the build but not removed yet, in case something goes wrong. OK mpi@, kettenis@
2017-09-05Move mutex, condvar, and thread-specific data routes, pthread_once, andPhilip Guenther
pthread_exit from libpthread to libc, along with low-level bits to support them. Major bump to both libc and libpthread. Requested by libressl team. Ports testing by naddy@ ok kettenis@
2017-08-21vmm (i386): Move CPUID masks to vmmvar.hpd
My previous commit to restrict vm migration broke vmd for i386. This fixes it. ok mlarkin@
2017-08-17remove the useless apmwarn and mostly obsolete apmhalt sysctls.Ted Unangst
probably ok
2017-08-16Randomly bias downwards from the top of each kernel stack, therebyTheo de Raadt
introducing more entropy into stack locations. TODO: consider if we should fill that space with something specific? discussed with mlarkin, mortimer, guenther, kettenis, etc etc etc
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