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the FPU in the kernel.
From Mike Belopuhov; Little bits by myself.
Comments/OK kettenis@
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doing thread-local storage and fix a typo in one that was already defined.
ok kettenis@ drahn@
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PAT allows setting per-mapping cachability bits. Our main interest in it
for write combining mappings so we do not have to rely so heaviliy on
mtrrs (which are stupidly set up on more and more machines). MD flags to
pmap allow setting these bits (which bus_space now uses for PREFETCHABLE
maps), if a vm page has a bit set, then we will use WC for all mappings
of a page (used for userland mappings). We also check for known errata
and fall back to UC- mappings in that case.
comments from kettenis@, tedu@ and william@. kettenis@, tedu@ ok.
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"Absolutely, don't forget i386" kettenis@.
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HARD uncached on anything since the P3), use just PCD which is UC-
(uncached but mtrrs can override it to write combining).
Now kernel mappings of WC-mtrred memory actually get write combining
memory.
the speed up is very very nice.
ok kettenis@, deraadt@, beck@ (who likes his scrollbars non-wibbly)
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into the sg_dma code instead of main bus_dma. Add identical code to i386
since this will be used in the next commit.
ok kettenis@ back in december.
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With some additions from sthen@
ok kettenis@ sthen@
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code):
pmap_flush_cache(vaddr_t, vsize_t) and pmap_flush_page(paddr_t) to flush
the cache for virtual addresses and physical pages respectively using
the clflush instruction. These apis will shortly be used by the agp
bus_dma functions to avoid doing a wbinvd on each dmamap_sync.
ok kettenis@, some comments from miod@
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instruction.
ok kettenis@ as part of a larger diff.
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the cpu.
ok kettenis@ as part of a larger diff.
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rather than defining it separately for each architecture.
Also set it to 4, to accommodate for future UTF-8 support (rfc3629).
Diff by stsp, committing to catch the libc major bump
ok kettenis@, guenther@
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ok jsing@, miod@
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some improvements suggested by jsg@
"commit" deraadt@
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issue reported by Slava Pestov.
ok deraadt@
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They break ramdisks as noticed by jasper, and have not been
adequately discussed.
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ok deraadt@
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Tested by myself, sthen, oga, kettenis, and jasper.
Input from sthen and jasper.
ok kettenis
(Manpage follows shortly.)
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some additional code.
ok toby@, oga@
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right now, we do a pmap_kenter_pa(), we then get the pte (behind pmap's
back) and check for the cache inhibit bit (if needed). If it isn't what
we want (this is the normal case) then we change it ourselves, and do a
manual tlb shootdown (i386 was a bit more stupid about it than amd64,
too).
Instead, make it so that like on some other archs (sparc64 comes to
mind) you can pass in flags in the low bits of the physical address,
pmap then does everything correctly for you.
Discovered this when I had some code doing a lot of bus_space_maps(), it
was incredibly slow, and profilling was dominated by
pmap_tlb_shootwait();
discussed with kettenis@, miod@, toby@ and art@.
ok art@
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provide and use BUS_SPACE_BARRIER_xxx.
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bus_space_alloc() as a bitmask of flags, and not a boolean controlling
cacheability; and make sure the three MI BUS_SPACE_MAP_xxx values documented
in the manual page are defined on all platforms as well.
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of the bus_space_tag_t it contains; an upcoming implementation will need
to know the rbus_tag_t for which it works at this point.
All callers updated accordingly; no functional change intended.
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allocator).
"i can't see any obvious problems" oga
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now this builds
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Tested on multiple i386 and it works, amd64 works also with a few
exceptions that will get fixed.
The initial effort of importing was done by oga@, thanks!
Lots of testing and debugging by mlarkin@ and me.
Okay deraadt@, oga@, mlarkin@.
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is active on, save a curpmap pointer in cpu_info. This lets us simplify
a few things and do lazy context switching from a user process to a
kernel thread. There's a new IPI introduced for forcing a cr3 reload
when we're tearing down a dead pmap.
kettenis@ ok (after I polished a few minor things)
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to free ranges.
Classify memory based on region with associated use-counter (which is used
to construct a priority list of where to allocate memory).
Based on code from tedu@, help from many.
Ok art@
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based on the same change in amd64.
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Saves every damned driver calling bzero(), and continues the M_ZERO,
PR_ZERO symmetry.
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simplelocks + splhigh().
First part of making it possible to make mpsafe softinterrupts.
"oh yes, definitely" miod@
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levels. This will allow for platforms where soft interrupt levels do not
map to real hardware interrupt levels to have soft ipl values overlapping
hard ipl values without breaking spl asserts.
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a define needed to get to ``private'' functions that needs to be defined
5 or more times isn't much use and may cause namespace issues anyway.
Other archs will probably follow.
Discussed in portugal. "Hell yes" weingart@, ok kettenis@, no
objections miod@
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APM_IOC_{SUSPEND,STANDBY}_REQ: This is to fix an issue with apm suspend
where a call to zzz suspended the machine immediately, not giving anyone
listening for apm events (other than apmd) a chance to deal with the
upcoming change. This hit X hard since the introduction of drm, since it
needs to have time to idle the 3d engine and otherwise get the device
into a recoverable state. Such things are needed until we support
modesetting in the kernel.
Now, instead of forcing a suspend, using ioctl sends out an event similar
to if you had put the lid down, giving all userland applications a
chance to reply.
tested by sthen@ and beck@, especial thanks to sthen for sitting there
while I tried to debug this remotely, I owe him beer.
Prompted by and ok deraadt@
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in seperate variables in struct cpu_info instead
of duplicating the process of extracting it from the signature.
Use this value when determining the bus clock on P6/family 0x6
chips, which fixes speedstep on bernd@'s ThinkPad x200s.
Discussed with several, 'just do it' weingart@, ok mikeb@
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BUS_DMA_NOCACHE flag with guarantees that the dma memory will be mapped
uncached. Some broken/odd hardware needs this.
discussion with miod, toby, art and kettenis. ok miod.
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In order to do that we have to remove all sleeping parts: sleeping
memory allocation and a sleeping lock. Thus we're moving this code
to the spinning lock (mutex) and getting rid of the GDT grow code.
Downside is that now we're pre-allocating 64kb of memory per CPU
from the start, but this might be optimized in future.
This also unifies GDT code and MAXGDTSIZ define across i386 and amd64.
With help from mickey.
ok toby, art
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of ACPI S3 suspend/resume support. This is for i386.
Help/comments from art, toby, marco, jordan, kurt
ok marco@, kurt@
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new function pmap_prealloc_lowmem_ptp() to setup kernel pmap ptp 0 without
the PG_G bit set. This fixes the remaining reaper -> pmap_page_remove
panics. With much diagnostic help from Art and Theo.
ok deraadt@
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pointless and just makes the code different for no reason. This moves i386 and
amd64 bus_dma to being a lot closer to identical.
suggestion to just remove the prefix instead of merge them from deraadt@.
no objections art@, kettenis@, ok weingart@
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the policy for the mlock(2) on this architecture: all users are allowed
to call mlock, while the limit is imposed by the current RLIMIT_MEMLOCK
value.
"makes sense" art, ok hshoexer (who was running with the same change for
about 10 months).
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In short, make cpu_unidle do what signotify used to do and
make signotify use cpu_unidle.
Also, include a cpu_unidle in need_resched, it won't change much right now
but will be needed in the future.
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defines into real functions. since machdep.c is cluttered as it is move them
into bus_space.c (like amd64). a later commit will move the stuff from machdep
across too. since machdep.c is cluttered as it is move them into bus_space.c
(like amd64). a later commit will move the stuff from machdep across too.
some shrinkage stats:
GENERIC.MP 209.66kb
RAMDISK 50.84kb
RAMDISKB 50.04kb
RAMDISC 36.28kb
RAMDISK_CD 168.03kb
don't fill it up all at once!
claudio found no network performance hit. toby thought the code went
looked alright. art@ ok.
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The beginning of i386 segment review/cleanup.
Tested by various people.
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protected by __ISO_C_VISIBLE > 1999. With a little help from miod@.
ok miod@
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which are uniform for the profclock on each cpu in a SMP system (but using
a different seed for each cpu). on all cpus, avoid seeding with a value out
of the [0, 2^31-1] range (since that is not stable)
ok kettenis drahn
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LAPIC IDs and if there are MPBIOSes we handle them with ACPI now.
ok deraadt@
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