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1) when you have a wrapper function in a dmatag that just calls the
_bus_dmamem original, you don't need it, just put the original function
in the tag
2) don't trunc_page the avail_end/ISA_BOUNCE_THRESHOLD stuff (see icb
for a discussion of why this is wrong about 00:00 gmt). make i386 and
amd64 both do this the same (the amd64 way is cleaner and makes the
third diff actually possible without a lot of pain). just do
dmamem_alloc_range(0, threshold) and if that fails do a alloc_range(0,
-1) and assume we'll bounce to pick up the pieces. Also using avail_end
for alloc_range is not nice (miod has been trying to avoid these abuses
iirc), so just use (paddr_t)-1, which is equivalent since you want "any"
memory.
3) now this is the funny one. consider point 2. then considering why
using the same bloody function to allocate your bouncebuffer is just
f'ing wrong. instead allocate with alloc_range(0, threshold) to make
sure that our bouncebuffer is actually uner 16megs.
ok deraadt@, kettenis@. Tested by several people.
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ok deraadt@
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issue reported by Slava Pestov.
ok deraadt@
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Tested by myself, sthen, oga, kettenis, and jasper.
Input from sthen and jasper.
ok kettenis
(Manpage follows shortly.)
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between instances, saving space in the kernel. feedback from many (some
incorporated, some left for future work).
ok deraadt, kettenis, "why not" miod.
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a define needed to get to ``private'' functions that needs to be defined
5 or more times isn't much use and may cause namespace issues anyway.
Other archs will probably follow.
Discussed in portugal. "Hell yes" weingart@, ok kettenis@, no
objections miod@
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interrupt. On some machines the rtc doesn't generate interrupts and we would
end up not running statclock() at all.
ok miod@, art@
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amd64 isa dma code is identical save for some formatting, and a slight
difference in bus_dmamem_alloc.
"Die x86_!" krw@.
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incorrectly.
The spec (manpage) states that using two PRE or two POST ops together is
entirely valid, but mixing pre and post is invalid. The way this was
handled before with a switch statement meant that only individual
commands actually would be recognised, so move to just checking the
commands indidually using "if (op & $command)". Additionally, add a
DIAGNOSTIC check and panic for the mixing of pre and post operations
(this is done on several other architectures already).
tested by several people; thanks!
ok dlg@, kettenis@, "the diff made sense" deraadt.
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Positive test results by a handful of people. Ok kettenis@
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pointless and just makes the code different for no reason. This moves i386 and
amd64 bus_dma to being a lot closer to identical.
suggestion to just remove the prefix instead of merge them from deraadt@.
no objections art@, kettenis@, ok weingart@
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Really just the low-hanging fruit of (hopefully) forthcoming timeout
conversions.
ok art@, krw@
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Not sure what's more surprising: how long it took for NetBSD to
catch up to the rest of the BSDs (including UCB), or the amount of
code that NetBSD has claimed for itself without attributing to the
actual authors.
OK deraadt@
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ok dlg@, jsing@, deraadt@
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ok dlg@, tested by dlg@, oga@, jsg@, deraadt@
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ok krw@
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ok weingart@
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ok deraadt@
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i386 pccom into line with com. Problem reported and first diff by Markus
Hennecke, who also tested and corrected subsequent diffs. Boot messages
and console now work with his 57K serial connections.
Suggestions and ok miod@
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the hp300 related ones currently in use. CN_NORMAL becomes CN_LOWPRI,
CN_INTERNAL becomes CN_MIDPRI and CN_REMOTE becomes CN_HIGHPRI.
ok miod@
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also assume that 386 cpus are really unknown, and promote them to 486
instead of panic.
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eyeballed and ok dlg@
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timerreg.h
ok miod@
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We need to poke the other CPU so that it processes the AST immediately
and doesn't wait for the next interrupt or syscall.
Since IPIs really shouldn't process ASTs, we need to trigger a soft
interrupt on the destination CPU to process the AST. But since we can't
send soft interrupts to other CPUs, we send an IPI, that triggers a soft
interrupt that in turn processes the AST.
Also, this marks the beginning of moving to slightly better IPI mechanism
of short and optimized IPIs instead of the large and complicated IPI
infrastructure we're using now.
tested by many, ok tholo@
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Mouse. Currently limited to USB mice.
Adapted from a diff from Gareth <garf@loveandnature.co.za> on tech@
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The "lapic" timer is ripped out since it wasn't actually a lapic timer,
but a hacked up tsc timer with some synchronization for MP. There is no
tsc timer right now since they are very unreliable on MP systems, systems
with apm, and systems that change the cpu clock. Which basically means
every modern machine out there. We're running with the i8259 timer now.
deraadt@ ok
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attachment code has to know better for now;
from Alexei G. Malinin (alexei.malinin@inetcomm.ru)
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Rename pentium_mhz to cpuspeed which is consistant with amd64 making
shared ACPI code less nasty.
ok marco, deraadt
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alternative sources for interrupt information.
ok gwk@, brad@
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as done in FreeBSD. Fixes problems on AMD Geode LX-800 where our
detection logic doesn't detect the FP exception.
ok deraadt@ kettenis@
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tested on puc@pci by fkr and meself on the cardbus.
still needs a bit more work but generally works.
deraadt@ ok and some input from miod@
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ok deraadt@ and many others.
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something, then it MUST return zero on DVACT_ACTIVATE, not EOPNOTSUPP;
this very popular bug has been cut and pasted a lot of times...
ok deraadt@ mickey@
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so that things can use it; tested on all architectures; ok kettenis
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