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if supported.
When we do memory management on intel this would lead to a LOT of
wbinvd() to deal with gpu->cpu incoherency. no one wants that.
Needed for sanity of inteldrm memory management which is coming up next.
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keep attaching bus 0 forever.
tested by mk@
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(auglx.c is not modified in this commit yet, only moved around)
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didn't quite work since the bridge seems to end up largely unconfigured, and
our PCI resource configuration code isn't quite smart enough (yet) to fix
things up. So instead switch it only into PCI-PCI bridge mode long enough to
snoop the bus number, and attach pci(4) using that number.
This is probably safer anyway, since ACPI may not like us switching things
around behind its back. Fixes PR 6253 & 6304.
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(1) use correct (message) block size of 128 byte (instead of 64
bytes) for HMAC-SHA512/384 (RFC4634).
(2) RFC4868 specifies that HMAC-SHA-{256,384,512} is truncated to
nnn/2 bits, while we still use 96 bits. 96 bits have been
specified in draft-ietf-ipsec-ciph-sha-256-00 while
draft-ietf-ipsec-ciph-sha-256-01 changed it to 128 bits.
WARNING: this change makes IPsec with SHA-256 (the default)
incompatible with older OpenBSD versions and other IPsec-implementations
that share this bug.
ok+tests naddy, fries; requested by reyk/deraadt
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i386 and amd64 to make avoid legacy ISA I/O registers. Fixes issues with
ThinkPad T-series Dock II units as reported by sobrado@
ok miod@
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This should prevent problems on systems where these areas are not reserved in
the BIOS memory map.
ok miod@, oga@, marco@
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that makes the PCIE device show up as a host bridge instead of a
PCI-PCI bridge. As a result any devices sitting behind it won't be
detected. Whack the device into PCI-PCI mode such that we can walk the
PCI bus hierarchy the normal way and detect all devices. Fixes PR 6215.
ok dlg@
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Tested by myself, sthen, oga, kettenis, and jasper.
Input from sthen and jasper.
ok kettenis
(Manpage follows shortly.)
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ok markus@
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logic to be chipset dependent; no functional change yet.
ok kettenis@
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ok deraadt@ kettenis@
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aperture, which will take your memory, bind it to agp, and return you the
aperture address. It's essentially the same as iommu on amd64 in the way it
works.
This will be used by the upcoming (works but is slow and will not be
enabled at first) drm memory management code for intel igp chipsets.
Right now the sync function for intagp is really slow (doing a wbinvd()
on every sync), this is in the process of getting fixed, but the size of
the diffs in my trees was getting silly.
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Tested on multiple i386 and it works, amd64 works also with a few
exceptions that will get fixed.
The initial effort of importing was done by oga@, thanks!
Lots of testing and debugging by mlarkin@ and me.
Okay deraadt@, oga@, mlarkin@.
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unwanted matching logic.
ok oga@ deraadt@ miod@
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can only address the first 64K but BARs can contain garbage and addresses
beyond the end of the extent would cause a panic.
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bus address space. Fixes a problem reported by david@.
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based on the BIOS memory map.
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processors, so the registers to configure addition HyperTransport links
are absent. Don't try attaching addition pci busses on these processors
to avoid probing non-existant registers.
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between instances, saving space in the kernel. feedback from many (some
incorporated, some left for future work).
ok deraadt, kettenis, "why not" miod.
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a define needed to get to ``private'' functions that needs to be defined
5 or more times isn't much use and may cause namespace issues anyway.
Other archs will probably follow.
Discussed in portugal. "Hell yes" weingart@, ok kettenis@, no
objections miod@
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mutex with ipl set to IPL_HIGH. While i'm here, unify the code with
i386, by giving the same lock to the i386 code.
This lock is mostly for MP, but could actually prevent a race where a
process is doing pci_conf_{read,write}, and then an interrupt fire and
also does pci_conf_{read,write}. Since this is a two stage process, the
interrupt could race with the one, causing the value to the written to
the wrong place, or the wrong value to be written.
Tested by many. "go ahead" kettenis@.
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ok millert@ tedu@
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originally written by Juan Romero Pardines.
Thanks to Lars Kotthoff for testing on a HeroLogic HL-463 system.
Because the CS5535 doesn't provide SMM emulated PCI access to set
DMA/PIO modes or a real PCI IDE controller we have to resort to
making MSR calls. As this is very MD specific, hide most of uglyness
away in i386 MD pciide code.
ok grange@
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#ifdef __i386__ code that can go now things have been cleaned up.
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pick a new one from the list of possible routings if it isn't or if a pin is
currently not routed. Delay re-routing interrupts until we establish a
handler for it. This prevents us from messing with unused interrupt pins
which may have fatal consequences (some machines spontaniously reboot).
The heuristics for picking an interrupt from the list of possibe ones
probably needs some tweaking still, but this makes several NVIDIA-based
boards work much better than before.
tested by many, ok marco@
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and even then it didn't work. we have higher standards than this.
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pointless and just makes the code different for no reason. This moves i386 and
amd64 bus_dma to being a lot closer to identical.
suggestion to just remove the prefix instead of merge them from deraadt@.
no objections art@, kettenis@, ok weingart@
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previously, we had a static list of pcidevs and which agp driver would
be interanlly attached. Instead, split the agp drivers so they work like
audio(4), where we attach a driver, which sets up some callbacks and
initial state, then attaches the interface (agp(4)). Since this allows
us to attach different drivers in different places, and give them
/proper/ probe functions move most of the drivers back to attaching at
pchb, where they should, and intagp (formerly agp_i810) stays attaching
at vga, since it's part of the intel integrated graphics chips.
Diff shrinks the kernel slightly, gets rid of the annoying "no integrated
graphics" warning, and allows more cleanup later.
Tested by many. fix for alpha build (the only other vga_pci.c consumer)
suggested by miod.
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values of the audio_params structure during AUDIO_SETINFO if the
hardware cannot be set to exactly the requested mode.
some drivers do this sometimes. others always return EINVAL if there
isn't an exact match.
be more consistent. only return EINVAL if an absurd parameter was
requested, otherwise return a supported set of parameters, as close
as possible to what was requested.
with/ok ratchov@
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Tested on ASUS P5E-VM DO motherboard.
ok oga
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to switch to the software implementation; ok hshoexer, tom
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pci_matchbyid(). This is the only driver that will match against
this hardware so it is not necessary to return a higher priority
than what pci_matchbyid() returns.
ok mbalmer@
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ok jsg@
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OK deraadt@ and millert@
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Not sure what's more surprising: how long it took for NetBSD to
catch up to the rest of the BSDs (including UCB), or the amount of
code that NetBSD has claimed for itself without attributing to the
actual authors.
OK deraadt@
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Initial information, half the diff, and testing from Andrew Lutomirski,
thanks!
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some AMD Geode LX systems with CS5536 companion chip. It works
similar to auich(4) and auixp(4), but the hardware dependent parts
are quite different.
Tested with various PC-Engines ALIX boards (1B, 3C3) and a WebDT 186
board.
feedback many, ok deraadt & jmc (documentation)
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or output and then read the value from either the GPIO[x]_READ_BACK or
GPIO[x]_OUT_VAL register. This allows to read back LED (output) states
as well as input states (buttons).
Problem noticed by Rolf Sommerhalder, fix by me.
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ok deraadt@
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