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interrupts. It is irreleveant, confuses people and the information is
available in pcidump(8) output anyway.
ok oga@, jsg@, deraadt@
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contains key material (note, that is not true in all drivers... hence
not always neccessary)
discussed with mikeb
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explicit_bzero() where required
ok markus mikeb
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devices on AMD Family 0Fh processors.
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advertised in the MCFG table, and fall back on the traditional method for
other busses. Fixes issue reported by henning@.
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access to PCIe extended configuration space access on modern i386 and amd64
machines.
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the hardware crypto accelerator land. This fixes aes-ni, via xcrypt,
glxsb(4), hifn(4), safe(4) and ubsec(4) drivers.
Original commit message by angelos:
Don't keep the last blocksize-bytes of ciphertext for use as the next
plaintext's IV, in CBC mode. Use arc4random() to acquire fresh IVs per
message.
with and ok deraadt, ok markus, djm
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given pcitag_t configuration address space. Currently, all pci controllers
will return the usual 0x100 bytes of PCI configuration space, but this will
eventually change on PCIe-capable controlers.
ok kettenis@
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uncommenting it is intentional.
ok deraadt@
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Specific features of the companion chip will be handled in MD land.
Okay deraadt@.
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defines for the constants used while mapping.
Okay miod@, deraadt@.
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ok pirofti
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current crypto operation to finish but doesn't do that yet.
The suspend and resume operations assume that SB_GLD_MSR_CTRL gets
trashed
ok pirofti
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we expect some specific register restoration will be needed here later
too.
ok pirofti
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compiler from doing stupid things like reordering stores around it. There is
some debate whether this will be enough for newer versions of GCC and LLVM.
If this is indeed deemed necessary, this will be addressed in a future diff.
ok miod@, oga@
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DVACT_SUSPEND, therefore DVACT_QUIECE can do standard sleeping operations
to get ready.
Discussed quite a while back with kettenis and jakemsr, oga suddenly needed
it as well and wrote half of it, so it was time to finish it.
proofread by miod.
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ok kettenis
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Simplify resource parsing function to use buffer argument
Convert namespace linked lists to use queue macros
ok marco@, deraadt@
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ok kettenis@
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are required to detect that.
Change the function to take a wait argument (used in nfs server, but
M_NOWAIT everywhere else for now) and to return an error
ok claudio@ henning@ krw@
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ok kettenis, deraadt
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ok dlg@
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things that there really isn't a decent api for elsewhere.
Since on recent intel IGPs the gtt aperture is too big (256meg is not
uncommon) to be mapped on a kva-constrained arch like i386, introduce an agp
mapping api that does things depending on arch.
On amd64 which can afford the space (and will use the direct mapping
again soon)just do bus_space_map() on init, then parcels things out
using bus_space_subregion(), thus avoiding map/unmap overhead on every
call (this is how inteldrm does things right now).
On i386, we do bus_space_map() and bus_space_unmap as appropriate. Linux
has some tricks here involving ``atomic'' maps that are on only one cpu
and that you may not sleep with to avoid the ipi overhead for tlb
flushing. For now we don't go down that route but it is being
considered.
I am also considering if it is worth abstracting this a little more,
improving the api and making it a general MD interface.
Tested by myself on i386 and amd64 and by drahn@ (who has one of the
machines with an aperture that is too big) on i386.
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sysctl.h was reliant on this particular include, and many drivers included
sysctl.h unnecessarily. remove sysctl.h or add proc.h as needed.
ok deraadt
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if supported.
When we do memory management on intel this would lead to a LOT of
wbinvd() to deal with gpu->cpu incoherency. no one wants that.
Needed for sanity of inteldrm memory management which is coming up next.
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keep attaching bus 0 forever.
tested by mk@
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(auglx.c is not modified in this commit yet, only moved around)
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didn't quite work since the bridge seems to end up largely unconfigured, and
our PCI resource configuration code isn't quite smart enough (yet) to fix
things up. So instead switch it only into PCI-PCI bridge mode long enough to
snoop the bus number, and attach pci(4) using that number.
This is probably safer anyway, since ACPI may not like us switching things
around behind its back. Fixes PR 6253 & 6304.
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(1) use correct (message) block size of 128 byte (instead of 64
bytes) for HMAC-SHA512/384 (RFC4634).
(2) RFC4868 specifies that HMAC-SHA-{256,384,512} is truncated to
nnn/2 bits, while we still use 96 bits. 96 bits have been
specified in draft-ietf-ipsec-ciph-sha-256-00 while
draft-ietf-ipsec-ciph-sha-256-01 changed it to 128 bits.
WARNING: this change makes IPsec with SHA-256 (the default)
incompatible with older OpenBSD versions and other IPsec-implementations
that share this bug.
ok+tests naddy, fries; requested by reyk/deraadt
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i386 and amd64 to make avoid legacy ISA I/O registers. Fixes issues with
ThinkPad T-series Dock II units as reported by sobrado@
ok miod@
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This should prevent problems on systems where these areas are not reserved in
the BIOS memory map.
ok miod@, oga@, marco@
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that makes the PCIE device show up as a host bridge instead of a
PCI-PCI bridge. As a result any devices sitting behind it won't be
detected. Whack the device into PCI-PCI mode such that we can walk the
PCI bus hierarchy the normal way and detect all devices. Fixes PR 6215.
ok dlg@
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Tested by myself, sthen, oga, kettenis, and jasper.
Input from sthen and jasper.
ok kettenis
(Manpage follows shortly.)
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ok markus@
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logic to be chipset dependent; no functional change yet.
ok kettenis@
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ok deraadt@ kettenis@
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aperture, which will take your memory, bind it to agp, and return you the
aperture address. It's essentially the same as iommu on amd64 in the way it
works.
This will be used by the upcoming (works but is slow and will not be
enabled at first) drm memory management code for intel igp chipsets.
Right now the sync function for intagp is really slow (doing a wbinvd()
on every sync), this is in the process of getting fixed, but the size of
the diffs in my trees was getting silly.
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