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2018-08-10Bump boot loader versions for softraid passphrase handling change.Joel Sing
2018-08-10Retry on incorrect passphrase for softraid crypto boot.Joel Sing
Historically, the softraid crypto support in the boot loaders has only given one attempt to provide the correct passphrase. There were a few reasons for this, including the fact that pkcs5_pbkdf2() allows an empty passphrase and that returning EPERM allowed for another attempt. With the event of KARL and the need for bsd.booted with hibernate resumption, this becomes much more of an issue - if you get the passphrase wrong you fail to resume. There are also other situations like using /etc/boot.conf to switch serial console, but an incorrect passphrase results in the config not being read. Also, bcrypt_pbkdf() does not permit empty passphrases. This reworks the softraid crypto support in the boot loaders so that it loops requesting a valid passphrase until one is provided, or an empty passphrase is entered (at which point it will abort). ok mortimer@ tb@
2018-08-08Recognise 'Speculative Store Bypass Disable' support cpuid bit.Jonathan Gray
Documented in 'Speculative Execution Side Channel Mitigations' revision 2.0.
2018-08-03Add mue(4), a driver for Microchip LAN75xx/LAN78xx 10/100/1000 USB EthernetKevin Lo
adapters. "go ahead commit it" deraadt@
2018-08-01On AMD CPUs, If the LFENCE serialization MSR bit is already set, thenBryan Steele
we don't need to uncondtionally set it. Worksaround a suspected bug in newer Linux KVM, which may trigger a #GP fault on writes to this MSR. ok mlarkin@
2018-07-30Use the MI interrupt enable/distable API instead of the MD one on i386 andMark Kettenis
remove the MD API. ok deraadt@
2018-07-24Do the same for i386 as amd64:Bryan Steele
Add "Mitigation G-2" per AMD's Whitepaper "Software Techniques for Managing Speculation on AMD Processors" By setting MSR C001_1029[1]=1, LFENCE becomes a dispatch serializing instruction. ok deraadt@
2018-07-13repair inconsistanciesTheo de Raadt
2018-07-12unbreak i386 build, thanks to pd@ for noticing. Same diff as I committedMike Larkin
earlier for amd64
2018-07-11Detect vmm(4) in the bootloader and automatically switch to the serialMike Larkin
console at 115200 baud. ok deraadt
2018-07-11adding __func__ identifier to panic() calls in vmm.c for amd64 and i386Nayden Markatchev
ok mlarkin@
2018-07-10Move from sendsig() to its callers the initsiginfo() calls andPhilip Guenther
instead of passing sendsig() the code+type+val, pass a siginfo_t* to copy from. Eliminate the indirection through struct emul for sendsig(); we no longer have a SunOS4-compat version of sendsig() ok deraadt@
2018-07-09Delete the VM86 kernel option and i386_vm86(3) API: it's requiredPhilip Guenther
a custom kernel for over 20 years. testing mlarkin@ ok deraadt@ phessler@ jca@ matthieu@
2018-07-05Enable bwfm(4).Patrick Wildt
Requested by brad@ Tested by fcambus@ ok stsp@
2018-07-04Properly pass around the PCI "chipset tag" in acpi(4) and refactorMark Kettenis
acpimcfg(4) to call an MD initialization functions that sets up a tag for PCI ECAM. ok guenther@, mlarkin@, krw@
2018-07-04Fix a wrong memcmp in k7/k8 powernow code.Mike Larkin
ok brynet
2018-07-04Clean up some extern definitions and includes in hibernate MD codeMike Larkin
2018-07-02clarify what is actually needed from a header file being includedMike Larkin
(previous comment was wrong, or outdated)
2018-07-01Move acpi(4) attach glue into acpi_machdep.c.Mark Kettenis
ok guenther@, deraadt@
2018-06-30Add intr_enable() function, intended for MI use to amd64 and i386 and useMark Kettenis
this in the acpi(4) suspend/resume code paths. ok deraadt@
2018-06-25Reorganize acpi(4) code a bit in preparation for upcoming arm64 support.Mark Kettenis
ok deraadt@
2018-06-22Finish the last missing piece for the i386 meltdown fix:Alexander Bluhm
- handle protection fault on iret properly - handle NMI - actually enable U-K in pmap_switch() from hshoexer@; input guenther@; OK mlarkin@ deraadt@
2018-06-21Save and restore retguard area during hibernate unpack. This copies theMike Larkin
original retguard data to the piglet and bcopys it back in place immediately before resuming via the ACPI Sx trampoline. ok deraadt, guenther, tested by many.
2018-06-18Remove the MAKE_FRAME macro to trace over ioapic interrupts in ddb.Alexander Bluhm
It is no longer needed after the trap frame %ebp cleanup. OK hshoexer@
2018-06-18"a = 1; b = 100; c = a * b; if (c == 0) c = 100;"Kenneth R Westerback
is pretty silly. Nuke the if's. ok millert@
2018-06-15Reorder trapframe/intrframe to put %ebp next to %eip and make itAlexander Bluhm
behave like a real call frame, thus vastly simplifying the ddb back trace logic. from hshoexer@; initially from guenther@; OK deraadt@
2018-06-03i386 isn't quite ready for witness yet.Theo de Raadt
2018-06-01Clear vc3_sc if the context is freed, to avoid leaving a danglingFrederic Cambus
pointer behind. Pointed out by visa@, thanks! OK visa@
2018-06-01Enable witness(4) on select architectures to help the current MP work.Visa Hankala
Requested by deraadt@
2018-05-31Return error values directly where appropriate, instead of using the errFrederic Cambus
variable. While there, remove TODO about bitching. We haven't felt the need to bitch since the driver was commited, and we do not bitch in aesni_setup() either. OK visa@
2018-05-28More steps for i386 Meltdown fix:Alexander Bluhm
- name gdt explicitly in struct cpu_info_full - identfiy ARCH_CAPABILITIES_RDCL_NO and print in identifycpu() - in pmap.c build U-K table, handle PG_G accordingly - in pmap_switch() do not unmap the kernel, yet; but all pieces are in place - pmapae.c: on boostrap transfer pmap to pmapae tables, build U-K table and wire it, handle PG_G from hshoexer@; OK mlarkin@
2018-05-24vmm(4): unbreak i386 VMM_DEBUG buildMike Larkin
2018-05-11Fix fallout from i386 Meltdown preparation which is using interruptAlexander Bluhm
gates now. Interrupts for dna, fpu, and f00f_redirect were not properly enabled. Thus npxintr() tried to get the kernel lock with interrupts disabled causing a deadlock in pmap_tlb_shootwait(). Enable interrupts for dna, fpu, and f00f_redirect. dna and fpu leave the kernel directly, thus they have to disable interrupts again; f00f_redirect goes through calltrap which will enable interrupts. from hshoexer@; OK mlarkin@
2018-05-04Initialize st_count in db_save_stack_trace().Visa Hankala
OK guenther@
2018-05-01vmmci(4) depends on pvbus(4) being available, unbreakPeter Hessler
from mlarkin@
2018-04-30vmd(8): unbreak i386Mike Larkin
2018-04-28replace add_*_randomness with enqueue_randomness()Jasper Lievisse Adriaanse
this gets rid of the source annotation which doesn't really add anything other than adding complexitiy. randomess is generally good enough that the few extra bits that the source type would add are not worth it. ok mikeb@ deraadt@
2018-04-27use nitems()Jasper Lievisse Adriaanse
verified md5 sum on amd64 ok mlarkin@
2018-04-27-fretpoline for non-RAMDISK kernels. Skylake product needs it, andTheo de Raadt
therefore all other x86 cpus must pay the performance price of the hazard workaround until Skylake disappears from the ecosystem eventually like 486. This returns your cpu's performance to pre-inflated performance. ok mlarkin guenther
2018-04-26Oups, we only need vmmci(4) for the ramdisk, not the whole vmm(4).Peter Hessler
noticed by deraadt@ and mlarkin@
2018-04-26enable vmmci(4) on the ramdisks, so bsd.rd plays nicer when it powers offPeter Hessler
OK mlarkin@
2018-04-20grammar fixes PTE's -> PTEsMike Larkin
ok guenther, jmc, tom, millert, deraadt
2018-04-17- Make rnd hints avoid the brk area. The rnd allocator refuses to allocate inOtto Moerbeek
the brk area anyway. - Use a larger hint bound to spread the allocations more for the 32-bit case - Simplified the overy abstracted brs/stack allocator and switch of guard pages for the brk case. This allows i386 some extra space, depending on memory usage patterns. - Reduce brk area on i386 to give the rnd space more room ok stefan@ sthen@
2018-04-12Implement MAP_STACK option for mmap(). Synchronous faults (pagefault andTheo de Raadt
syscall) confirm the stack register points at MAP_STACK memory, otherwise SIGSEGV is delivered. sigaltstack() and pthread_attr_setstack() are modified to create a MAP_STACK sub-region which satisfies alignment requirements. Observe that MAP_STACK can only be set/cleared by mmap(), which zeroes the contents of the region -- there is no mprotect() equivalent operation, so there is no MAP_STACK-adding gadget. This opportunistic software-emulation of a stack protection bit makes stack-pivot operations during ROPchain fragile (kind of like removing a tool from the toolbox). original discussion with tedu, uvm work by stefan, testing by mortimer ok kettenis
2018-04-11More steps for i386 Meltdown fix:Alexander Bluhm
- provide struct cpu_info_full - prepare K-U sections - reorganize interrupt, trap, syscall entry to use K-U trampoline - prepare pmap for entering special mappings, the mappings are not setup yet This code will already trigger performance issues. We do more tlb flushes, but we do not unmap the kernel yet. The latter will be needed to prevent Meltdown. from hshoexer@; input guenther@; OK mlarkin@ deraadt@
2018-03-31Change ci_dev.dv_xname to ci_dev->dv_xname in debugging printf()Alexander Bluhm
to make it compile when enabled. from hshoexer@
2018-03-31Fix a hang on i386 vmware guest that was happening on copyout() ofAlexander Bluhm
arguments for /sbin/init. For CPU 0 identifycpu() originally got called twice, once very early from cpu_startup(), then again from cpu_attach(). Now we call identifycpu() only from cpu_attach() with CPUF_PRIMARY set. So make sure, that for CPU 0 nothing is skipped. Otherwise, cpu_info might have different features set for CPU 0 than for all other CPUs. This is similar to what amd64 does. from hshoexer@; reported and fix tested by Emilio Perea; OK mlarkin@
2018-03-31Recommit preparation for i386 Meltdown fix after OpenBSD 6.3 release.Alexander Bluhm
Switching from per PCB TSS to per CPU TSS broke kvm86 calls to the BIOS. This change fixes the issues. from hshoexer@; reported and tested by semarie@; OK deraadt@
2018-03-31Recommit preparation for i386 Meltdown fix after OpenBSD 6.3 release.Alexander Bluhm
- provide a cpu_softc for cpu_attach() etc. - replace per PCB TSS with per CPU TSS The first change prepares for cpu_info being embedded in a cpu_full_info. Therefore during autoconf/cpu_attach we hand down a softc. The second change removes the per PCB TSS. We now have one TSS per CPU, thus in cpu_switchto() we only have to patch the ring 0 stack pointer instead of loading a new TSS. This also allows for cleaning up the GDT, so we only have a single slot for the TSS. from hshoexer@; OK deraadt@
2018-03-27Add acpicmos(4), a driver that implements SystemCMOS OperationRegionMark Kettenis
access support. This fixes machines where the AML doesn't check whether support for this OperationRegion type has been registered by the OS. ok mlarkin@
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