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case it is not OK to DPRINTF, so delete that code. Found by dhill
ok marco dhill
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allocator).
"i can't see any obvious problems" oga
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separately).
a change at or just before the hackathon has either exposed or added a
very very nasty memory corruption bug that is giving us hell right now.
So in the interest of kernel stability these diffs are being backed out
until such a time as that corruption bug has been found and squashed,
then the ones that are proven good may slowly return.
a quick hitlist of the main commits this backs out:
mine:
uvm_objwire
the lock change in uvm_swap.c
using trees for uvm objects instead of the hash
removing the pgo_releasepg callback.
art@'s:
putting pmap_page_protect(VM_PROT_NONE) in uvm_pagedeactivate() since
all callers called that just prior anyway.
ok beck@, ariane@.
prompted by deraadt@.
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three
commits:
1) The sysctl allowing bufcachepercent to be changed at boot time.
2) The change moving the buffer cache hash chains to a red-black tree
3) The dynamic buffer cache (Which depended on the earlier too).
ok on the backout from marco and todd
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ok deraadt@ kettenis@
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oga was warned; it is a minimum requirement for inteldrm to be on.
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this might need to be revisted later if its clear that there are machines
which only come up with a single state but more may appear after a PPC
change but for now we will just not initilize on systems with a single
state a boot. Solves a divide by zero panic when using the PDC diff on
broken hardware.
ok marco@, krw@
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ok oga@
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caused the PIC to not be initialized on resume, which caused much
badness - things attached to the ISA bus weren't getting any
interupts (for example, keyboards).
Also move around some of the lapic reinit code to handle some clock
initialization bits we weren't doing before.
Worked out by deraadt and myself.
ok deraadt@
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still support all different methods of getting states without e.g.
(highest/lowest state), and on i386 use the tables. The only change
should be the deletion of the mV from the printf at boot.
ok jsg@
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work if it interrupts userspace
ok kettenis@ "you haven't committed that yet?" art@
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IPIs are handled without blocking interrupts. This solves the random lockups
people have been seeing with apmd -C, thanks to marco@ for showing me how
to reliably recreate this hang, and claudio@ for telling me it was also
affecting his Athlon64 machine so I stopped chasing bugs in est.
ok oga@, weingart@
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aperture, which will take your memory, bind it to agp, and return you the
aperture address. It's essentially the same as iommu on amd64 in the way it
works.
This will be used by the upcoming (works but is slow and will not be
enabled at first) drm memory management code for intel igp chipsets.
Right now the sync function for intagp is really slow (doing a wbinvd()
on every sync), this is in the process of getting fixed, but the size of
the diffs in my trees was getting silly.
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now this builds
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Tested on multiple i386 and it works, amd64 works also with a few
exceptions that will get fixed.
The initial effort of importing was done by oga@, thanks!
Lots of testing and debugging by mlarkin@ and me.
Okay deraadt@, oga@, mlarkin@.
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(Allows time to flow forward after resume)
ok pirofti@
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properly. Now i386 and amd64 implementations match.
ok art
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size on a running system.
ok art@, oga@
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arches. ok todd@ beck@
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Okay jordan@ and marco@.
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is active on, save a curpmap pointer in cpu_info. This lets us simplify
a few things and do lazy context switching from a user process to a
kernel thread. There's a new IPI introduced for forcing a cr3 reload
when we're tearing down a dead pmap.
kettenis@ ok (after I polished a few minor things)
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time. Beginning of refactoring cpu identification.
ok kettenis@
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except thinkpads, they will use the acpithinkpad driver. The driver is
also hooked into wsconsole. So brightness can be adjusted via:
$ wsconsctl display.brightness=<percentage>
This is very helpfull on some laptops that have a nasty bios and get two
steps instead of one when pressing the brightness button.
Tested on various dell, fujitsu, acer, samsung and other laptops.
Okay marco@, miod@. Suggestions from kettenis@.
Lots of reviews and help from miod@, thanks!
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ok marco@
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global lock, switch the uvm object pages to being kept in a per-object
RB_TREE. Right now this is approximately the same speed, but cleaner.
When biglock usage is reduced this will improve concurrency due to lock
contention..
ok beck@ art@. Thanks to jasper for the speed testing.
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against the vendor string, then cpu family, then if the cpu claims to
have it.
requested by toby@
Also match against Via's cpu string to enable MTRR on matthieu@'s VIA Nano
compile tested on i386 by wcmaier@
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Ok guenther@
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to free ranges.
Classify memory based on region with associated use-counter (which is used
to construct a priority list of where to allocate memory).
Based on code from tedu@, help from many.
Ok art@
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ok marco@
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ok marco@
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ok toby
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have one or the other option, we won't get said kernel entry
point. Ok oga@
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unwanted matching logic.
ok oga@ deraadt@ miod@
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OK deraadt@, kettenis@
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when we pass the main PCI I/O extents to the secondary bus of subtractive
decode brigdes.
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amas defaults to disabled on both amd64 and i386.
"Go for it!" kettenis@
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based on the same change in amd64.
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can only address the first 64K but BARs can contain garbage and addresses
beyond the end of the extent would cause a panic.
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by using the pci resource accounting extents.
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landisk, and the sparc implementation is obviously wrong. That's where I
stopped looking, so who knows what else was broken. A simple comparison of
the existing mtx_enter with the new mtx_enter_try would have told anybody.
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using this soon(ish). Ok oga@, sorta yes kettenis@.
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