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so that they look in /emul/a.out first. This allows a.out's ld.so to
find its own libraries without interfering with ELF at all.
Many comments from various people. okay deraadt@
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- new sentence, new line
- some macro fixes
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Recognize more feature flags
deraadt@ ok
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rescinded 22 July 1999. Proofed by myself and Theo.
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map is expecting. Also, sparc64 was missing the equivalent check in
_load_mbuf() and the "make sure no valid mappings are returned" goop.
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various people. outside of some messy things in src/gnu, only one
thing in the main tree now violates this rule: bind
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ep0 at foobus?
ep* at foobus?
for up to three different buses. Just get rid of the ep0 entry.
To be fair, config(8) ought to complain for such a syntax - hard coded device
number should be unique.
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ok miod@
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first step on the way there. Ok deraadt@, espie@, todd@, and others.
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art@ toby@ ok.
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Not only do we have to think about PROT_EXEC while dealing with it, but we
also have to think about wiring. sigh.
We'll have to fix this with an API change.
fixes the mlockall problem.
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mickey.
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deraadt@, drahn@ OK
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niklas@ OK
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and cr0-ct4
OK by niklas@ and more or less by ho@
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option LONGRUN enables a new sysctl, allowing a userland program
to read the current CPU frequency and voltage and also set
the mininum and maximum frequencies to operate between, and switch
between performance mode and battery mode.
ok mickey@
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let us make sure it fits.
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move chrtoblk and blktochr into MI code.
tested on several archs and ok deraadt@
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stack protection when building kernels. Intended to be used on installation
media, with tight space constraints - currently, only added where
SMALL_KERNEL was already defined.
Not thoroughly tested, but requested by deraadt.
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ok deraadt@
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correct. It breaks down if we're trying to jump through a function
pointer. The protection fault trap on i386 must be one of the most
braindead traps ever invented in the history of humankind. It doesn't
give you any information about what went wrong except the instruction
that faulted. Since the problem we're trying to deal with is a
segmentation problem, we don't get the desitination that we want to
jump to, we just get the instruction and we won't add a disassembler
to trap handling just to try to figure out what went wrong.
What we want to do is to handle this as a normal fault to let noexec
accounting in pmap_enter deal with the changes to the code
segment. Unfortunately that's impossible. We don't know the faulting
address, so we need to change how the exec accounting works. Basically
the code segment must already cover the address we want to execute
before we can fault it in.
New scheme:
o Start with conservative code segment.
o If we get a protection fault, go through all mappings in the process
and find the highest executable mapping, fix up the code segment and
record that address. If the code segment didn't change, the protection
fault wasn't fixable - just die.
o If the highest executable mapping is removed, just reset the code
segment to something conservative and let the next protection fault
deal with it. We can't read all the vm mappings of the process from
the pmap because of locking hell.
This should allow floating code segment whenever someone implements that.
Also, fix the pmap_protect function to behave more like the other
pmaps we have and be slightly more agressive to force more proper
protection changes.
ok:ed by various people.
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deraadt@ ok.
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crunch stuff still needs a bit of work.
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interleave of exe/shared libs. Raise MAXDSIZ back to 1G.
This change REQUIRES a binary update on i386.
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the fault address.
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tss and not only in the frame since we might be returning that way too.
add a heuristic for detecting an exec protection fault:
iff we get a read protection fault (which we normally never
get due to our segments being always readable) we assume that
it was an exec protection indeed and go to page fault
routine which will decide the rest for us (including sending
a signal should that be needed).
problem found by drahn@ and testing by many ppl.
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The AMD-K5 Model 0 gets the PGE bit in the CPU features word wrong
using the APIC bit instead, according to the AMD Processor Recognition
App. Note. Add a fixup routine to patch up cpu_feature in this case.
XXX Need a way to kick the pmap to enable pmap_pg_g -- look at how the
MP branch deals with this.
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ok mickey@
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