Age | Commit message (Collapse) | Author |
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OK guenther@
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from mlarkin@
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this gets rid of the source annotation which doesn't really add
anything other than adding complexitiy. randomess is generally
good enough that the few extra bits that the source type would
add are not worth it.
ok mikeb@ deraadt@
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verified md5 sum on amd64
ok mlarkin@
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therefore all other x86 cpus must pay the performance price of the
hazard workaround until Skylake disappears from the ecosystem eventually
like 486. This returns your cpu's performance to pre-inflated performance.
ok mlarkin guenther
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noticed by deraadt@ and mlarkin@
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OK mlarkin@
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ok guenther, jmc, tom, millert, deraadt
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the brk area anyway.
- Use a larger hint bound to spread the allocations more for the 32-bit case
- Simplified the overy abstracted brs/stack allocator and switch of
guard pages for the brk case. This allows i386 some extra space,
depending on memory usage patterns.
- Reduce brk area on i386 to give the rnd space more room
ok stefan@ sthen@
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syscall) confirm the stack register points at MAP_STACK memory, otherwise
SIGSEGV is delivered. sigaltstack() and pthread_attr_setstack() are modified
to create a MAP_STACK sub-region which satisfies alignment requirements.
Observe that MAP_STACK can only be set/cleared by mmap(), which zeroes the
contents of the region -- there is no mprotect() equivalent operation, so
there is no MAP_STACK-adding gadget.
This opportunistic software-emulation of a stack protection bit makes
stack-pivot operations during ROPchain fragile (kind of like removing a
tool from the toolbox).
original discussion with tedu, uvm work by stefan, testing by mortimer
ok kettenis
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- provide struct cpu_info_full
- prepare K-U sections
- reorganize interrupt, trap, syscall entry to use K-U trampoline
- prepare pmap for entering special mappings, the mappings are not
setup yet
This code will already trigger performance issues. We do more tlb
flushes, but we do not unmap the kernel yet. The latter
will be needed to prevent Meltdown.
from hshoexer@; input guenther@; OK mlarkin@ deraadt@
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to make it compile when enabled.
from hshoexer@
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arguments for /sbin/init.
For CPU 0 identifycpu() originally got called twice, once very early
from cpu_startup(), then again from cpu_attach(). Now we call
identifycpu() only from cpu_attach() with CPUF_PRIMARY set. So
make sure, that for CPU 0 nothing is skipped. Otherwise, cpu_info
might have different features set for CPU 0 than for all other CPUs.
This is similar to what amd64 does.
from hshoexer@; reported and fix tested by Emilio Perea; OK mlarkin@
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Switching from per PCB TSS to per CPU TSS broke kvm86 calls to the BIOS.
This change fixes the issues.
from hshoexer@; reported and tested by semarie@; OK deraadt@
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- provide a cpu_softc for cpu_attach() etc.
- replace per PCB TSS with per CPU TSS
The first change prepares for cpu_info being embedded in a
cpu_full_info. Therefore during autoconf/cpu_attach we hand down
a softc.
The second change removes the per PCB TSS. We now have one TSS per
CPU, thus in cpu_switchto() we only have to patch the ring 0 stack
pointer instead of loading a new TSS. This also allows for cleaning
up the GDT, so we only have a single slot for the TSS.
from hshoexer@; OK deraadt@
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access support. This fixes machines where the AML doesn't check whether
support for this OperationRegion type has been registered by the OS.
ok mlarkin@
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only halfway done and the current state does not help anybody. For
OpenBSD 6.3 release go back to the original code before 2018/03/13.
This gives us a stable release and the changes will come back later.
discussed with guenther@ deraadt@ hshoexer@
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This change fixes the issues.
from hshoexer@; reported and tested by semarie@; OK deraadt@
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Extend the logic already present for panic() to any DDB-related
operation such that if ddb(4) is entered because of a fault or
other trap it is still possible to call 'boot reboot'.
While here stop printing splassert() messages as well, to not fill
the buffer.
ok visa@, deraadt@
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sdmmc chipset driver, currently only implemented in sdhc(4), but
mostly uses the regular path. sdhc(4) also needed the ability to
perform IO while cold.
ok deraadt@
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- provide a cpu_softc for cpu_attach() etc.
- replace per PCB TSS with per CPU TSS
The first change prepares for cpu_info being embedded in a
cpu_full_info. Therefore during autoconf/cpu_attach we hand down
a softc.
The second change removes the per PCB TSS. We now have one TSS per
CPU, thus in cpu_switchto() we only have to patch the ring 0 stack
pointer instead of loading a new TSS. This also allows for cleaning
up the GDT, so we only have a single slot for the TSS.
from hshoexer@; OK deraadt@
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needs (looking at you sgi, but others required this before). This is for
the circumstances we need pagesize known at compile time, not getpagesize()
runtime. Use it for malloc storage sizes, for shm, and to set pthread stack
default sizes. The stack sizes were a mess, and pushing them towards
page-aligned is healthy move (which will also be needed by the coming
stack register checker)
ok guenther kettenis, discussion with stefan
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when processing an npx interrupt. This fixes a kernel locked
assertion in postsig_done() during the libc ieeefp/except regression
test.
OK visa@
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There are no actual changes to the driver since the software crypto
driver is called to handle authentication operations.
This enabled padlock to be used when tunnels are setup with iked(8).
Tested by and OK fcambus
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Reported by Renaud Allard, fix tested by Renaud (i386) and fcambus@ (amd64).
OK visa, fcambus
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The account flag `ASU' will no longer be set but that makes suser()
mpsafe since it no longer mess with a per-process field.
No objection from millert@, ok tedu@, bluhm@
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It was already done on amd64, but not on i386. Tested on an Atom N270.
OK mpi@
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"Processor Programming Reference (PPR) for AMD Family 17h
Model 01h, Revision B1 Processors"
ok mlarkin@ deraadt@
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ok mlarkin@, deraadt@
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the number of ->dv_parent->dv_parent chains and make this more readable.
ok deraadt@ phessler@
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Fixes 'make install' when /bsd is not present for some reason.
ok rob florian, "fine with me" deraadt
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the boot device. We do the latter only for NFSCLIENT, but always the former.
While here, modernize the interface matching loop.
ok deraadt@
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ok deraadt@
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definitive list of block devices supported on an architecture.
ok kettenis@ deraadt@
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Archs not yet converted can to the jump by defining __USE_MI_MUTEX.
ok visa@
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Makes the linker generate a correct i386 gap.o file.
ok kettenis@, deraadt@
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Suggested by kettenis@, ok visa@
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ok kettenis@, visa@
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`mtx_owner' becomes the first field of 'struct mutex' on i386/amd64/arm64.
ok visa@
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Remove `mtx_lock' from i386, add volatile before `mtx_owner' where it
was missing.
Inputs from kettenis@, ok visa@
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ok millert@ krw@
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driver.
OK visa@, mlarkin@
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OK visa@
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- Do not ignore the return value of m_copyback() on i386
- Always free sc->op_buf before returning on both amd64 and i386,
pointed out by mikeb@, thanks!
OK mikeb@
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This is a step towards MI mutexes.
ok kettenis@
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OK tom@, deraadt@
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It was done a while ago in the amd64 version.
OK mlarkin@, deraadt@, dlg@
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