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bit set. While there, add an #ifdef MULTIPROCESSOR to make the diff between
amd64 and i386 smaller.
ok art@
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flush the TLB immediately after doing so, to make sure there are no stale
TLB entries. Suggested by art@
ok art@, oga@, deraadt@, weingart@
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if supported.
When we do memory management on intel this would lead to a LOT of
wbinvd() to deal with gpu->cpu incoherency. no one wants that.
Needed for sanity of inteldrm memory management which is coming up next.
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into the sg_dma code instead of main bus_dma. Add identical code to i386
since this will be used in the next commit.
ok kettenis@ back in december.
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from mlarkin@ and me, with some amd64 fixes thrown in by deraadt@
ok marco@, deraadt@, pirofti@, mlarkin@
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tested by ratchov@
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<madroach@zakweb.de>.
SiS 191 is not verified to work yet because he does not have the hardware;
if anyone has it, please contact him.
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keep attaching bus 0 forever.
tested by mk@
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Intel CPUs come up with apic id's >= 32, even on systems with less than 32
logical CPUs.
ok krw@, marco@; tested by deraadt@
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When we hit suspend time, go through all wsdisplays on the system. if
they are in mode MAPPED, but not MODE_DUMBFB then if possible do a full
vt switch to a !mapped vt, and prevent switching back until resume time.
This has to be called from MD code because this involves userland
running so that X can run the vt switch signal handler. This way, any
case where we are using the "poke registers from userland" model, we
will not be on the hardware when we go down, so the kernel can actually
handle thing properly.
Tested on several acpi laptops (by kettenis@ and ian@), x40 (me and
beck@ at LEAST) and zaurus (me). Maybe others, but if so I forgot who at
this time..
Idea from deraadt somewhere over the Faroe Islands (I thought of a
similar thing myself a while ago). Much prompting from him. Ok and
comments miod@
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Driver written by Mikko Tolmunen <oskari@sefirosu.org>
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Shouldn't change the behaviour since only the ORed in bits are checked later,
but it makes the code clearer and should shut up the clang static analyser.
ok krw@
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Found by clang and krw
ok krw
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for a long time (if ever?), so send it to the Attic.
"with prejudice" miod@; GENERIC reminder from kettenis@
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bus_dmamem_map can fail for a myriad of reasons already, so panicing if
pmap fails is just impolite. other archs will be forthcoming.
ok krw@, art@ before lock
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1) when you have a wrapper function in a dmatag that just calls the
_bus_dmamem original, you don't need it, just put the original function
in the tag
2) don't trunc_page the avail_end/ISA_BOUNCE_THRESHOLD stuff (see icb
for a discussion of why this is wrong about 00:00 gmt). make i386 and
amd64 both do this the same (the amd64 way is cleaner and makes the
third diff actually possible without a lot of pain). just do
dmamem_alloc_range(0, threshold) and if that fails do a alloc_range(0,
-1) and assume we'll bounce to pick up the pieces. Also using avail_end
for alloc_range is not nice (miod has been trying to avoid these abuses
iirc), so just use (paddr_t)-1, which is equivalent since you want "any"
memory.
3) now this is the funny one. consider point 2. then considering why
using the same bloody function to allocate your bouncebuffer is just
f'ing wrong. instead allocate with alloc_range(0, threshold) to make
sure that our bouncebuffer is actually uner 16megs.
ok deraadt@, kettenis@. Tested by several people.
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supported by the processor and use it to calculate the mask used for
manipulating the MTRR registers. If CPUID leaf function 0x80000008 isn't
supported by the processor, default to the 36-bit mask we used before.
Fixes issues on machines that don't have a 36-bit physical address space
like Intel Atom and all 64-bit AMD CPUs.
ok weingart@, deraadt@
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With some additions from sthen@
ok kettenis@ sthen@
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installboot on a mounted partition;
from J.C. Roberts
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Much prodding from deraadt.
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ok marco deraadt
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ok oga@, pirofti@
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where jumping to the "standard" video BIOS entry point locks up or even
resets the machine. This will break resume on some other machines in the
sense that the display on them will remain disabled. But hopefully those
machines make it into a state where the kernel is running and we can fix that.
ok deraadt@, marco@, mlarkin@
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(auglx.c is not modified in this commit yet, only moved around)
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didn't quite work since the bridge seems to end up largely unconfigured, and
our PCI resource configuration code isn't quite smart enough (yet) to fix
things up. So instead switch it only into PCI-PCI bridge mode long enough to
snoop the bus number, and attach pci(4) using that number.
This is probably safer anyway, since ACPI may not like us switching things
around behind its back. Fixes PR 6253 & 6304.
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like we do for PIC interrupts.
ok art@, deraadt@, oga@
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(1) use correct (message) block size of 128 byte (instead of 64
bytes) for HMAC-SHA512/384 (RFC4634).
(2) RFC4868 specifies that HMAC-SHA-{256,384,512} is truncated to
nnn/2 bits, while we still use 96 bits. 96 bits have been
specified in draft-ietf-ipsec-ciph-sha-256-00 while
draft-ietf-ipsec-ciph-sha-256-01 changed it to 128 bits.
WARNING: this change makes IPsec with SHA-256 (the default)
incompatible with older OpenBSD versions and other IPsec-implementations
that share this bug.
ok+tests naddy, fries; requested by reyk/deraadt
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Fixes most laptops out there on resume. Okay deraadt@.
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code):
pmap_flush_cache(vaddr_t, vsize_t) and pmap_flush_page(paddr_t) to flush
the cache for virtual addresses and physical pages respectively using
the clflush instruction. These apis will shortly be used by the agp
bus_dma functions to avoid doing a wbinvd on each dmamap_sync.
ok kettenis@, some comments from miod@
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instruction.
ok kettenis@ as part of a larger diff.
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the cpu.
ok kettenis@ as part of a larger diff.
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the the msr paths are sane.
ok deraadt@
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so don't try to do EST on machines we don't know the
bus_clock on for now.
ok deraadt@
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on machines reporting > 32 memory regions. ok kettenis@
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pmap_activate() should be called to force the kthread into the kernel pmap.
If it is i386 it is lazy pmap it may not be in the kernel kthread, so
it must be called so that pmap_activate can decide. If it is amd64
without lazy pmap, it must not be called.
A comment is added to remind us about this in the future in case these
assumptions change.
ok kettenis
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systems, at least with Intel graphics.
ok marco@, deraadt@
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rather than defining it separately for each architecture.
Also set it to 4, to accommodate for future UTF-8 support (rfc3629).
Diff by stsp, committing to catch the libc major bump
ok kettenis@, guenther@
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Temporarily disabled for debugging purposes, but can be turned on if
needed.
ok deraadt@
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Via CPU temperature sensor task, otherwise it is added for model 9 as well
which is not supported.
ok kevlo
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